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gerrit-public.fairphone.software / toolchain / llvm-project / c91e38c5ebf6f0cfbb29eff66c5ff6db43c3ee45 / llvm / lib / Target / X86 / Disassembler / X86DisassemblerDecoderCommon.h
  1. 4ab89ea [X86] Remove unused encoding types from disassembler. NFC by Craig Topper · 10 years ago
  2. 5eeb41c [X86] Remove unused entries from the disassembler type enum. by Craig Topper · 10 years ago
  3. 6b62b65 X86-MPX: Implemented encoding for MPX instructions. Added encoding tests. by Elena Demikhovsky · 10 years ago
  4. ef04b2b [X86] Remove some unused code from disassembler. by Craig Topper · 11 years ago
  5. 7d3c6d3 [X86] Teach disassembler to handle illegal immediates on AVX512 integer compare instructions. by Craig Topper · 11 years ago
  6. 620b50c [X86] Convert all the i8imm used by SSE and AVX instructions to u8imm. by Craig Topper · 11 years ago
  7. 23fa478 [X86] Remove some unused TYPE enums from the disassembler. by Craig Topper · 11 years ago
  8. ae8e1b3 [X86] Disassembler support for move to/from %rax with a 32-bit memory offset is REX.W and AdSize prefix are both present. by Craig Topper · 11 years ago
  9. 99bcab7 [X86] Fix disassembly of absolute moves to work correctly in 16 and 32-bit modes with all 4 combinations of OpSize and AdSize prefixes being present or not. by Craig Topper · 11 years ago
  10. a7c40ef Canonicalize header guards into a common format. by Benjamin Kramer · 11 years ago
  11. 4688a2e [X86] Increase X86_MAX_OPERANDS from 5 to 6 by Adam Nemet · 11 years ago
  12. bfa0131 [SKX] Enabling SKX target and AVX512BW, AVX512DQ, AVX512VL features. by Robert Khasanov · 11 years ago
  13. 5933c2f [X86] AVX512: Add disassembler support for compressed displacement by Adam Nemet · 11 years ago
  14. 3199838 Fix gcc -Wsign-compare warning in X86DisassemblerTables.cpp. by Patrik Hagglund · 11 years ago
  15. 6a6967e More C++ification. by Richard Smith · 11 years ago
  16. ac15f1c Don't provide two different definitions of ModRMDecision, OpcodeDecision, and ContextDecision in different source files (depending on #define magic). by Richard Smith · 11 years ago
  17. 82b47d5 Don't define llvm::X86Disassembler::InstructionSpecifier in different ways in by Richard Smith · 11 years ago
  18. 89ee75d What year is it! This file has no reason to be written in C, and has doubly no by Richard Smith · 11 years ago
  19. 0d1fd55 Remove A6/A7 opcode maps. They can all be handled with a TB map, opcode of 0xa6/0xa7, and adding MRM_C0/MRM_E0 forms. Removes 376K from the disassembler tables. by Craig Topper · 12 years ago
  20. b33c2ef [x86] Allow address-size overrides for STOS[BWLQ] (PR9385) by David Woodhouse · 12 years ago
  21. 2ef8d9c [x86] Allow segment and address-size overrides for LODS[BWLQ] (PR9385) by David Woodhouse · 12 years ago
  22. caaa285 [x86] Fix disassembly of MOV16ao16 et al. by David Woodhouse · 12 years ago
  23. 32da3c8 [x86] Fix MOV8ao8 et al for 16-bit mode, fix up disassembler to understand by David Woodhouse · 12 years ago
  24. 3321c99 Remove modifierType/Base from X86 disassembler tables as they are no longer used. Removes ~11.5K from static tables. by Craig Topper · 12 years ago
  25. 9155118 Remove need for MODIFIER_OPCODE in the disassembler tables. AddRegFrms are really more like OrRegFrm so we don't need a difference since we can just mask bits. by Craig Topper · 12 years ago
  26. 623b0d6 Second attempt at Removing special form of AddRegFrm used by FP instructions. These instructions can be handled by MRMXr instead. by Craig Topper · 12 years ago
  27. e98c8cb Revert r198238 and add FP disassembler tests. It didn't work and I didn't realized we had no FP disassembler test cases. by Craig Topper · 12 years ago
  28. 0e21bca Remove special form of AddRegFrm used by FP instructions. These instructions can be handled by MRMXr instead. by Craig Topper · 12 years ago
  29. 371e363 AVX-512: decoder for AVX-512, made by Alexey Bader. by Elena Demikhovsky · 12 years ago
  30. 47fc44e AVX-512: Added legal type MVT::i1 and VK1 register for it. by Elena Demikhovsky · 12 years ago
  31. dacddb0 AVX-512: added VPCONFLICT instruction and intrinsics, added EVEX_KZ to tablegen by Elena Demikhovsky · 12 years ago
  32. 9e3e38a Add XOP disassembler support. Fixes PR13933. by Craig Topper · 12 years ago
  33. ed59dd3 Various x86 disassembler fixes. by Craig Topper · 12 years ago
  34. 003e7d7 Added encoding prefixes for KNL instructions (EVEX). by Elena Demikhovsky · 12 years ago
  35. 963305b Add a new compression type to ModRM table that detects when the memory modRM byte represent 8 instructions and the reg modRM byte represents up to 64 instructions. Reduces modRM table from 43k entreis to 25k entries. Based on a patch from Manman Ren. by Craig Topper · 13 years ago
  36. b8aec08 Add more indirection to the disassembler tables to reduce amount of space used to store the operand types and encodings. Store only the unique combinations in a separate table and store indices in the instruction table. Saves about 32K of static data. by Craig Topper · 13 years ago
  37. 5f33d90 Tidy up trailing whitespace by Craig Topper · 13 years ago
  38. 7629d63 Add support for AVX enhanced comparison predicates. Patch from Kay Tiong Khoo. by Craig Topper · 13 years ago
  39. 6dedbae Use uint8_t instead of enums to store values in X86 disassembler table. Shaves 150k off the size of X86DisassemblerDecoder.o by Craig Topper · 14 years ago
  40. 6491c80 X86 disassembler support for jcxz, jecxz, and jrcxz. Fixes PR11643. Patch by Kay Tiong Khoo. by Craig Topper · 14 years ago
  41. b22310f Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. by Jia Liu · 14 years ago
  42. a0cd970 More tweaks to get the size of the X86 disassembler tables down. by Craig Topper · 14 years ago
  43. f01f1b5 More AVX2 instructions and their intrinsics. by Craig Topper · 14 years ago
  44. a697852 Fix disassembling of popcntw. Also remove some code that says it accounts for 64BIT_REXW_XD not existing, but it does exist. by Craig Topper · 14 years ago
  45. f18c896 Add support in the disassembler for ignoring the L-bit on certain VEX instructions. Mark instructions that have this behavior. Fixes PR10676. by Craig Topper · 14 years ago
  46. 88cb33e Fix disassembler handling of CRC32 which is an odd instruction that uses 0xf2 as an opcode extension and allows the opsize prefix. This necessitated adding IC_XD_OPSIZE and IC_64BIT_XD_OPSIZE contexts. Unfortunately, this increases the size of the disassembler tables. Fixes PR10702. by Craig Topper · 14 years ago
  47. fc4789d Add support for the VIA PadLock instructions. by Joerg Sonnenberger · 14 years ago
  48. c3fd523 X86 table-generator and disassembler support for the AVX by Sean Callanan · 15 years ago
  49. 447762d Merge System into Support. by Michael J. Spencer · 15 years ago
  50. f60062f add basic avx support to the disassembler, also teach it about ssmem/sdmem by Chris Lattner · 15 years ago
  51. e7e1cf9 Eliminated the classification of control registers into %ecr_ by Sean Callanan · 15 years ago
  52. 1efe661 Fixed a bug where the disassembler would allow an immediate by Sean Callanan · 15 years ago
  53. 36eab80 Fixes to the X86 disassembler: by Sean Callanan · 16 years ago
  54. 04cc307 Table-driven disassembler for the X86 architecture (16-, 32-, and 64-bit by Sean Callanan · 16 years ago