1. 36cd185 AMDGPU: Fix assert on n inline asm constraint by Matt Arsenault · 8 years ago
  2. 9aa45f0 AMDGPU: Add macro fusion schedule DAG mutation by Matt Arsenault · 8 years ago
  3. 3c7581b AMDGPU: Use correct register names in inline assembly by Matt Arsenault · 8 years ago
  4. 2b1f9aa AMDGPU: Start defining a calling convention by Matt Arsenault · 8 years ago
  5. 2a80369 AMDGPU: Fix copies from physical registers in SIFixSGPRCopies by Matt Arsenault · 9 years ago
  6. 0d0d6c2 AMDGPU: Fix invalid copies when copying i1 to phys reg by Matt Arsenault · 9 years ago
  7. fe78ffb AMDGPU: Fix folding reg_sequence into copy to phys reg by Matt Arsenault · 9 years ago
  8. 3dbeefa AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel by Matt Arsenault · 9 years ago
  9. 7aad8fd Enable FeatureFlatForGlobal on Volcanic Islands by Matt Arsenault · 9 years ago
  10. 5d8eb25 AMDGPU: Use unsigned compare for eq/ne by Matt Arsenault · 9 years ago
  11. accddac TII: Fix inlineasm size counting comments as insts by Matt Arsenault · 9 years ago
  12. a9720c6 AMDGPU: Use correct method for determining instruction size by Matt Arsenault · 9 years ago
  13. df3a20c AMDGPU: Add a shader calling convention by Nicolai Haehnle · 10 years ago
  14. 9f2e00d SelectionDAG: Fix a crash on inline asm when output register supports multiple types by Tom Stellard · 10 years ago
  15. bc4497b AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions by Tom Stellard · 10 years ago
  16. a61e5a8 AMDGPU/SI: Fix crash when inline assembly is used in a graphics shader by Nicolai Haehnle · 10 years ago
  17. 45bb48e R600 -> AMDGPU rename by Tom Stellard · 10 years ago[Renamed from llvm/test/CodeGen/R600/inline-asm.ll]
  18. 40ce8af R600: Move DataLayout to AMDGPUTargetMachine by Tom Stellard · 11 years ago
  19. 7517077 R600/SI: Enable all tests that pass on VI without changes by Marek Olsak · 11 years ago
  20. 3693080 R600/SI: Enable inline assembly by Tom Stellard · 11 years ago