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gerrit-public.fairphone.software / toolchain / llvm-project / d0c11cf7adb0bd2d9fdaca5eba50cd637c8f5ebc / llvm / lib / Target / Sparc / SparcInstrInfo.cpp
  1. 52adb57 This change adds co-processor condition branching and conditional traps to the Sparc back-end. by Chris Dewhurst · 10 years ago
  2. 6307eb5 CodeGen: TII: Take MachineInstr& in predicate API, NFC by Duncan P. N. Exon Smith · 10 years ago
  3. 7699494 [SPARC] Revamp AnalyzeBranch and add ReverseBranchCondition. by James Y Knight · 10 years ago
  4. e40c8a2 PseudoSourceValue: Replace global manager with a manager in a machine function. by Alex Lorenz · 10 years ago
  5. 3994be8 [Sparc] Implement i64 load/store support for 32-bit sparc. by James Y Knight · 10 years ago
  6. f238d17 [SPARC] Cleanup handling of the Y/ASR registers. by James Y Knight · 10 years ago
  7. c88bf54 [CodeGen] ArrayRef'ize cond/pred in various TII APIs. NFC. by Ahmed Bougacha · 10 years ago
  8. 8bb838a Remove the need to cache the subtarget in the Sparc TargetRegisterInfo classes. by Eric Christopher · 11 years ago
  9. 6865d6f Fix a lot of confusion around inserting nops on empty functions. by Rafael Espindola · 11 years ago
  10. 2ce0d91 Provide an implementation of getNoopForMachoTarget for SPARC. by Brad Smith · 11 years ago
  11. 062a2ba [C++] Use 'nullptr'. Target edition. by Craig Topper · 12 years ago
  12. d174b72 [cleanup] Lift using directives, DEBUG_TYPE definitions, and even some by Chandler Carruth · 12 years ago
  13. b6d0bd4 [C++11] Replace llvm::next and llvm::prior with std::next and std::prev. by Benjamin Kramer · 12 years ago
  14. 2286874 [Sparc] Add support for parsing annulled branch instructions. by Venkatraman Govindaraju · 12 years ago
  15. 50f32d9 [SparcV9] Use correct register class (I64RegClass) to hold the address of _GLOBAL_OFFSET_TABLE_ in sparcv9. by Venkatraman Govindaraju · 12 years ago
  16. d12ccbd [weak vtables] Remove a bunch of weak vtables by Juergen Ributzka · 12 years ago
  17. 49109a2 Revert r194865 and r194874. by Alexey Samsonov · 12 years ago
  18. dbedae8 [weak vtables] Remove a bunch of weak vtables by Juergen Ributzka · 12 years ago
  19. 84f1523 [Sparc] Correct the floating point conditional code mapping in GetOppositeBranchCondition(). by Venkatraman Govindaraju · 12 years ago
  20. 01cb19f [Sparc] Implement spill and load for long double(f128) registers. by Venkatraman Govindaraju · 12 years ago
  21. 6f0b450 [Sparc]: Add memory operands for the frame references in the storeRegToStackSlot by Venkatraman Govindaraju · 12 years ago
  22. b735b4d DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs by David Blaikie · 12 years ago
  23. 7dae9ce [Sparc] Delete FPMover Pass and remove Fp* Pseudo-instructions from Sparc backend. by Venkatraman Govindaraju · 12 years ago
  24. 6235c06 Don't cache the instruction and register info from the TargetMachine, because by Bill Wendling · 12 years ago
  25. a54533ed Sparc: No functionality change. Cleanup whitespaces, comment formatting etc., by Venkatraman Govindaraju · 12 years ago
  26. c7bc5fb Implement spill and fill of I64Regs. by Jakob Stoklund Olesen · 12 years ago
  27. ed0881b Use the new script to sort the includes of every file under lib. by Chandler Carruth · 13 years ago
  28. abadc66 Convert some uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent. by Craig Topper · 14 years ago
  29. b22310f Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. by Jia Liu · 14 years ago
  30. 233149c Fix some leftover control reaches end of non-void function warnings. by Benjamin Kramer · 14 years ago
  31. edbb58c5 Remove unnecessary default cases in switches that cover all enum values. by David Blaikie · 14 years ago
  32. 1fc8263 Sparc: Implement emitFrameIndexDebugValue and getDebugValue Location hooks. by Venkatraman Govindaraju · 14 years ago
  33. 7f8e563 Add bundle aware API for querying instruction properties and switch the code by Evan Cheng · 14 years ago
  34. 6dae604 Sparc CodeGen: Fix AnalyzeBranch for PR 10282. Removing addSuccessor() since by Venkatraman Govindaraju · 14 years ago
  35. 2bb4035 Move TargetRegistry and TargetSelect from Target to Support where they belong. by Evan Cheng · 14 years ago
  36. bc153d4 Next round of MC refactoring. This patch factor MC table instantiations, MC by Evan Cheng · 14 years ago
  37. c5e6d2f - Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfo by Evan Cheng · 14 years ago
  38. 703a0fb Hide the call to InitMCInstrInfo into tblgen generated ctor. by Evan Cheng · 14 years ago
  39. 194c3dc Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo. by Evan Cheng · 14 years ago
  40. 1e210d0 Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc by Evan Cheng · 14 years ago
  41. 1b0e2cb Implement AnalyzeBranch in Sparc Backend. by Venkatraman Govindaraju · 15 years ago
  42. 8289f78 Remove the isMoveInstr() hook. by Jakob Stoklund Olesen · 15 years ago
  43. 0961c55 RISC architectures get their memory operand folding for free. by Jakob Stoklund Olesen · 15 years ago
  44. 976b7b6 Replace copyRegToReg with copyPhysReg for Sparc. by Jakob Stoklund Olesen · 15 years ago
  45. 0125b64 Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This by Stuart Hastings · 15 years ago
  46. 779c69b Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it by Dan Gohman · 16 years ago
  47. efb126a Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot. by Evan Cheng · 16 years ago
  48. 6f306d7 use DebugLoc default ctor instead of DebugLoc::getUnknownLoc() by Chris Lattner · 16 years ago
  49. 840c700 several major improvements to the sparc backend: support for weak linkage by Chris Lattner · 16 years ago
  50. 95fc6ee Remove unused member functions. by Eli Friedman · 16 years ago
  51. fbcc663 llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable. by Torok Edwin · 16 years ago
  52. 56d0659 assert(0) -> LLVM_UNREACHABLE. by Torok Edwin · 16 years ago
  53. d379e89 Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the code to annotate machineoperands to LiveIntervalAnalysis. It also add markers for implicit_def that define physical registers. The rest, is just a lot of details. by Evan Cheng · 16 years ago
  54. f7b83c7 Change MachineInstrBuilder::addReg() to take a flag instead of a list of by Bill Wendling · 16 years ago
  55. 2af1f85 Factor out the code to add a MachineOperand to a MachineInstrBuilder. by Dan Gohman · 17 years ago
  56. 215a925 Remove non-DebugLoc versions of buildMI from Sparc. by Dale Johannesen · 17 years ago
  57. 6b8c76a Eliminate a couple of non-DebugLoc BuildMI variants. Modify callers. by Dale Johannesen · 17 years ago
  58. f6d609a Move debug loc info along when the spiller creates new instructions. by Bill Wendling · 17 years ago
  59. c544cb0 Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well. by Evan Cheng · 17 years ago
  60. 906152a Tidy up #includes, deleting a bunch of unnecessary #includes. by Dan Gohman · 17 years ago
  61. 3f86b51 Split foldMemoryOperand into public non-virtual and protected virtual by Dan Gohman · 17 years ago
  62. 0b27325 Add more const qualifiers. This fixes build breakage from r59540. by Dan Gohman · 17 years ago
  63. 33332bc Const-ify several TargetInstrInfo methods. by Dan Gohman · 17 years ago
  64. 0d1e9a8 Switch the MachineOperand accessors back to the short names like by Dan Gohman · 17 years ago
  65. 38453ee Remove isImm(), isReg(), and friends, in favor of by Dan Gohman · 17 years ago
  66. 27fb3dc Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy requested by Owen Anderson · 17 years ago
  67. 4f6bf04 Convert uses of std::vector in TargetInstrInfo to SmallVector. This change had to be propoagated down into all the targets and up into all clients of this API. by Owen Anderson · 17 years ago
  68. 3b46030 Pool-allocation for MachineInstrs, MachineBasicBlocks, and by Dan Gohman · 17 years ago
  69. 7d98a48 - Remove calls to copyKillDeadInfo which is an N^2 function. Instead, propagate kill / dead markers as new instructions are constructed in foldMemoryOperand, convertToThressAddress, etc. by Evan Cheng · 17 years ago
  70. 3b3286d It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned. by Evan Cheng · 18 years ago
  71. d19a6f4 Add missing newline at EOF. by Duncan Sands · 18 years ago
  72. 2a3be7b Move even more functionality from MRegisterInfo into TargetInstrInfo. by Owen Anderson · 18 years ago
  73. eee1460 Move some more instruction creation methods from RegisterInfo into InstrInfo. by Owen Anderson · 18 years ago
  74. 25568e4 Fix a problem where lib/Target/TargetInstrInfo.h would include and use by Chris Lattner · 18 years ago
  75. 7a73ae9 Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the by Owen Anderson · 18 years ago
  76. a5bb370 Add new shorter predicates for testing machine operands for various types: by Chris Lattner · 18 years ago
  77. 5c46378 Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm by Chris Lattner · 18 years ago
  78. f3ebc3f Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 18 years ago
  79. e2f23a3 Add lengthof and endof templates that hide a lot of sizeof computations. by Owen Anderson · 18 years ago
  80. e20dd92 RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted. by Evan Cheng · 18 years ago
  81. 20350c4 Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead by Evan Cheng · 19 years ago
  82. dbd3d29 Matches MachineInstr changes. by Evan Cheng · 19 years ago
  83. ed32883 fix warning about missing newline at end of file by Rafael Espindola · 19 years ago
  84. b7267bd implement uncond branch insertion for sparc to fix regressions from last night by Chris Lattner · 19 years ago
  85. 158e1f5 Rename SPARC V8 target to be the LLVM SPARC target. by Chris Lattner · 20 years ago
  86. 94e95d2 Great renaming: Sparc --> SparcV9 by Brian Gaeke · 22 years ago
  87. b01a80a Reorganized the Sparc backend to be more modular -- each different by Misha Brukman · 22 years ago
  88. 960707c Put all LLVM code into the llvm namespace, as per bug 109. by Brian Gaeke · 22 years ago
  89. bf9ed7a * Use the MachineConstantPool for storing constants instead of a hash_set; by Misha Brukman · 22 years ago
  90. 73d9355 Hrm, unbreak stuph :( by Chris Lattner · 22 years ago
  91. a62228d Fix preselection/lowerswitches bug by Chris Lattner · 22 years ago
  92. 482202a Added LLVM project notice to the top of every C++ source file. by John Criswell · 22 years ago
  93. b94550e Change the Opcode enum for PHI nodes from "Instruction::PHINode" to "Instruction::PHI" to be more consistent with the other instructions. by Chris Lattner · 22 years ago
  94. 2797c13 Don't include "Config/stdlib.h". by Brian Gaeke · 22 years ago
  95. e895c2e Unify all constant evaluations that depend on register size by Vikram S. Adve · 22 years ago
  96. 6077c31 Simplify code by using ConstantInt::getRawValue instead of checking to see by Chris Lattner · 22 years ago
  97. 8ea738a Bug fix in creating constants: need 1U << 31, not 1 << 31. by Vikram S. Adve · 22 years ago
  98. 3ef61af Merged in autoconf branch. This provides configuration via the autoconf system. by John Criswell · 22 years ago
  99. 2969ec5 * Changed Bcc instructions to behave like BPcc instructions by Misha Brukman · 22 years ago
  100. 3cdf52a Convert load/store opcodes from register to immediate forms, if necessary. by Misha Brukman · 22 years ago