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gerrit-public.fairphone.software / toolchain / llvm-project / d51a3746d0c06f7267667cf8fdf0cfd27cbf304d / llvm / lib / Target / AMDGPU / Disassembler / AMDGPUDisassembler.h
  1. 9e77d0c [AMDGPU] gfx908 register file changes by Stanislav Mekhanoshin · 6 years ago
  2. ab4f2ea [AMDGPU] gfx1010 disassembler changes for wave32 by Stanislav Mekhanoshin · 6 years ago
  3. 245b5ba [AMDGPU] gfx1010 dpp16 and dpp8 by Stanislav Mekhanoshin · 6 years ago
  4. ca64ef2 MC: Allow getMaxInstLength to depend on the subtarget by Matt Arsenault · 6 years ago
  5. 33d806a [AMDGPU] gfx1010 sgpr register changes by Stanislav Mekhanoshin · 7 years ago
  6. 6023d59 [AMDGPU][MC] Enable lds_direct operand for v_readfirstlane_b32, v_readlane_b32 and v_writelane_b32 by Dmitry Preobrazhensky · 7 years ago
  7. 2946cd7 Update the file headers across all of the LLVM projects in the monorepo by Chandler Carruth · 7 years ago
  8. 2713495 [AMDGPU][MC] Added support of 256- and 512-bit tuples of ttmp registers by Dmitry Preobrazhensky · 8 years ago
  9. cad7fa8 AMDGPU: Partially fix disassembly of MIMG instructions by Matt Arsenault · 8 years ago
  10. ac2b026 [AMDGPU][MC][GFX9] Corrected encoding of ttmp registers, disabled tba/tma by Dmitry Preobrazhensky · 8 years ago
  11. c8fbf6f [AMDGPU] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC). by Eugene Zelenko · 8 years ago
  12. ca7b0a1 AMDGPU: Add instruction definitions for some scratch_* instructions by Matt Arsenault · 8 years ago
  13. 30fc523 [AMDGPU][MC] Corrected disassembler for proper decoding of v_mqsad_u32_u8 by Dmitry Preobrazhensky · 8 years ago
  14. 549c89d [AMDGPU] SDWA: merge VI and GFX9 pseudo instructions by Sam Kolton · 8 years ago
  15. 6bda14b Sort the remaining #include lines in include/... and lib/.... by Chandler Carruth · 8 years ago
  16. 363f47a [AMDGPU] SDWA: add disassembler support for GFX9 by Sam Kolton · 8 years ago
  17. ce941c9 [AMDGPU][MC] Corrected disassembler to decode instructions with 2 literals by Dmitry Preobrazhensky · 8 years ago
  18. 9be7b0d AMDGPU: Add VOP3P instruction format by Matt Arsenault · 9 years ago
  19. 4bd7236 AMDGPU: Fix handling of 16-bit immediates by Matt Arsenault · 9 years ago
  20. 2bc2f33 [AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). by Eugene Zelenko · 9 years ago
  21. 640c44b AMDGPU: Disallow exec as SMEM instruction operand by Matt Arsenault · 9 years ago
  22. 92b355b AMDGPU: Replace assert(false) with unreachable by Matt Arsenault · 9 years ago
  23. f3dd863 AMDGPU: Whitespace fixes by Matt Arsenault · 9 years ago
  24. 3381d7a [AMDGPU] Disassembler: print label names in branch instructions by Sam Kolton · 9 years ago
  25. 9844610 Revert "[AMDGPU] Disassembler: print label names in branch instructions" by Sam Kolton · 9 years ago
  26. 1559f76 [AMDGPU] Disassembler: print label names in branch instructions by Sam Kolton · 9 years ago
  27. 212a251 [AMDGPU][llvm-mc] Disassembler: support for TTMP/TBA/TMA registers. by Artem Tamazov · 9 years ago
  28. 38e496b Fixed/Recommitted r267733 "[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD." by Artem Tamazov · 9 years ago
  29. 03e1647 Revert "[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD." by Chad Rosier · 9 years ago
  30. 3896f8f [AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD. by Artem Tamazov · 9 years ago
  31. b550cb1 [NFC] Header cleanup by Mehdi Amini · 10 years ago
  32. ac106ad [AMDGPU] Disassembler code refactored + error messages. by Nikolay Haustov · 10 years ago
  33. 161a158 [AMDGPU] Disassembler: Support for all VOP1 instructions. by Nikolay Haustov · 10 years ago
  34. e1818af [AMDGPU] Disassembler: Added basic disassembler for AMDGPU target by Tom Stellard · 10 years ago