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gerrit-public.fairphone.software / toolchain / llvm-project / d5576dee1c82c7ea15b62d84d09b0bae3eee364d / llvm / lib / CodeGen / RegAllocLinearScan.cpp
  1. c544cb0 Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well. by Evan Cheng · 17 years ago
  2. 8f79775 Make linear scan's trivial coalescer slightly more aggressive. by Evan Cheng · 17 years ago
  3. 906152a Tidy up #includes, deleting a bunch of unnecessary #includes. by Dan Gohman · 17 years ago
  4. ce3ccc1 - More pre-split fixes: spill slot live interval computation bug; restore point bug. by Evan Cheng · 17 years ago
  5. 938e201 - Rewrite code that update register live interval that's split. by Evan Cheng · 17 years ago
  6. d0d0317 Committing a good chunk of the pre-register allocation live interval splitting pass. It's handling simple cases and appear to do good things. Next: avoid splitting an interval multiple times; renumber registers when possible; record stack slot live intervals for coloring; rematerialize defs when possible. by Evan Cheng · 17 years ago
  7. 9c4b7d5 Fix command-line option printing to print two spaces where needed, by Dan Gohman · 17 years ago
  8. 1d338fc Add an option to enable StrongPHIElimination, for ease of testing. by Owen Anderson · 17 years ago
  9. 9156bd2 Re-apply 56835 along with header file changes. by Evan Cheng · 17 years ago
  10. 2b9adce Revert commit 56835 since it breaks the build. by Duncan Sands · 17 years ago
  11. 9469049 If a re-materializable instruction has a register operand, the spiller will change the register operand's spill weight to HUGE_VAL to avoid it being spilled. However, if the operand is already in the queue ready to be spilled, avoid re-materializing it. by Evan Cheng · 17 years ago
  12. c36660d Next round of earlyclobber handling. Approach the by Dale Johannesen · 17 years ago
  13. 9af7b3d Teach coalescer about earlyclobber bits. Check bits for preferred register. by Dale Johannesen · 17 years ago
  14. c042000 Fix PR2808. When regalloc runs out of register, it spill a physical register around the live interval being allocated. Do not continue to try to spill another register, just grab the physical register and move on. by Evan Cheng · 17 years ago
  15. 436aae6 Make earlyclobber stuff work when virtual regs by Dale Johannesen · 17 years ago
  16. e519bd4 Remove AsmThatEarlyClobber etc. from LiveIntervalAnalysis by Dale Johannesen · 17 years ago
  17. 3d9416c Somehow RegAllocLinearScan is keeping two pointers to MachineRegisterInfo. by Evan Cheng · 17 years ago
  18. f8610eb Add a bit to mark operands of asm's that conflict by Dale Johannesen · 17 years ago
  19. 53b728c Fix PR2757. Ignore liveinterval register allocation preference if the preference register is not in the right register class. This can happen due to sub-register coalescing. by Evan Cheng · 17 years ago
  20. a79db30 Tidy up several unbeseeming casts from pointer to intptr_t. by Dan Gohman · 17 years ago
  21. d669b9b Convert several std::vectors over to SmallVector, and use reserve() as appropriate for cases where std::vector is still used. by Owen Anderson · 17 years ago
  22. 99e911f Get rid of a use of std::map. by Owen Anderson · 17 years ago
  23. 51f689a Make the allocation of LiveIntervals explicit, rather than holding them in the r2iMap_ by value. This will prevent references to them from being invalidated by Owen Anderson · 17 years ago
  24. 7c800ad Fix a compile-time regression introduced by my heuristic-changing patch. I forgot by Owen Anderson · 17 years ago
  25. 029182f Change the heuristics used in the coalescer, register allocator, and within by Owen Anderson · 17 years ago
  26. 9cc3f68 A brief survey of priority_queue usage in the tree turned this up by Dan Gohman · 17 years ago
  27. efc67e7 Enhanced heuristic to determine the *best* register to spill. Instead of picking the register with the lowest spill weight. Consider (up to) 2 additional registers with spill weights that are close to the lowest spill weight. The one with fewest defs and uses that conflicts with the current interval (weighted by loop depth) is the spill candidate. by Evan Cheng · 17 years ago
  28. 6d7a144 Refine stack slot interval weight computation. by Evan Cheng · 17 years ago
  29. 12a0222 Add a stack slot coloring pass. Not yet enabled. by Evan Cheng · 17 years ago
  30. 305d268 Do not add empty live intervals to handled_. They should never be undone for backtracking. by Evan Cheng · 18 years ago
  31. 6d07b62 Special handling of zero-sized live intervals. by Evan Cheng · 18 years ago
  32. 6e22517 Add an assertion to catch register of illegal class. by Evan Cheng · 18 years ago
  33. e21a68b Undo tweak. It had no obvious benefit. by Evan Cheng · 18 years ago
  34. e88a625 When the register allocator runs out of registers, spill a physical register around the def's and use's of the interval being allocated to make it possible for the interval to target a register and spill it right away and restore a register for uses. This likely generates terrible code but is before than aborting. by Evan Cheng · 18 years ago
  35. 850e143 Temporarily revert 48175. by Evan Cheng · 18 years ago
  36. 7abdb43 If the register allocator ran out of registers, just abort for now. by Evan Cheng · 18 years ago
  37. d6bd311 Use a smallvector for inactiveCounts and initialize it lazily by Chris Lattner · 18 years ago
  38. d7a258d Rename PrintableName to Name. by Bill Wendling · 18 years ago
  39. c24ea4f Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool by Bill Wendling · 18 years ago
  40. 18991d7 Fix newly-introduced 4.3 warnings by Anton Korobeynikov · 18 years ago
  41. 3a4be0f Rename MRegisterInfo to TargetRegisterInfo. by Dan Gohman · 18 years ago
  42. 0c20943 Don't recalculate the loop info and loop dominators analyses if they're by Bill Wendling · 18 years ago
  43. a10fff5 Rename SSARegMap -> MachineRegisterInfo in keeping with the idea by Chris Lattner · 18 years ago
  44. f3ebc3f Remove attribution from file headers, per discussion on llvmdev. by Chris Lattner · 18 years ago
  45. 303417d Switch over to MachineLoopInfo. by Evan Cheng · 18 years ago
  46. 8e22379 Live interval splitting: by Evan Cheng · 18 years ago
  47. b3712f8 Adding debug output during coalescing. by Bill Wendling · 18 years ago
  48. 8269925 Need to increment the iterator. by Bill Wendling · 18 years ago
  49. be51f28 Refactor some code. by Evan Cheng · 18 years ago
  50. 5c1b044 If an interval is being undone clear its preference as well since the source interval may have been undone as well. by Evan Cheng · 18 years ago
  51. 66298e2 There are times when the coalescer would not coalesce away a copy but the copy by Evan Cheng · 18 years ago
  52. 0dde6e5 Apply Chris' suggestions. by Evan Cheng · 18 years ago
  53. a6fd8bc Clean up code that calculate MBB live-in's. by Evan Cheng · 18 years ago
  54. 8f644ce Some clean up. by Evan Cheng · 18 years ago
  55. 89d5916 Some clean up. by Evan Cheng · 18 years ago
  56. 65d2a69 by David Greene · 18 years ago
  57. 33820da Re-implement trivial rematerialization. This allows def MIs whose live intervals that are coalesced to be rematerialized. by Evan Cheng · 18 years ago
  58. 02f6e9b Factor live variable analysis so it does not do register coalescing by David Greene · 18 years ago
  59. 31fd60b Change names from RA to something unique to get rid of naming conflicts with by Bill Wendling · 18 years ago
  60. 8c78a0b Drop 'const' by Devang Patel · 19 years ago
  61. e95c6ad Use 'static const char' instead of 'static const int'. by Devang Patel · 19 years ago
  62. 09f162c Do not use typeinfo to identify pass in pass manager. by Devang Patel · 19 years ago
  63. 0ba1745 Match MachineFunction::UsedPhysRegs changes. by Evan Cheng · 19 years ago
  64. 11dc5ab Clean up. by Evan Cheng · 19 years ago
  65. b881bda Copy coalescing change to prevent a physical register from being pin to a by Evan Cheng · 19 years ago
  66. 0e3278e First cut trivial re-materialization support. by Evan Cheng · 19 years ago
  67. 220a7af Only add liveinterval to livein set if it isn't assigned a stack slot. by Evan Cheng · 19 years ago
  68. f7ed82d Re-apply my liveintervalanalysis changes. Now with PR1207 fixes. by Evan Cheng · 19 years ago
  69. da81bf4 For PR1207: by Reid Spencer · 19 years ago
  70. a3d3599 Do not add livein's to entry MBB twice. by Evan Cheng · 19 years ago
  71. 7238410 Add live-ins to every BB. by Evan Cheng · 19 years ago
  72. aee775a Eliminate static ctors from Statistics by Chris Lattner · 19 years ago
  73. 700b873 Detemplatize the Statistic class. The only type it is instantiated with by Chris Lattner · 19 years ago
  74. 979804d eliminate fp statistic by Chris Lattner · 19 years ago
  75. cc08c83 Unbreak VC++ build. by Jeff Cohen · 19 years ago
  76. d108b9a Replace std::cerr uses of the "DEBUG" macro with "DOUT" instead. Removes by Bill Wendling · 19 years ago
  77. 61feeb9 Remove redundant <cmath>. by Jim Laskey · 19 years ago
  78. 6a93421 Use correct value for float HUGH_VAL. by Jim Laskey · 19 years ago
  79. a916192 LinearScanner hotspot. by Jim Laskey · 19 years ago
  80. 3d27be1 s|llvm/Support/Visibility.h|llvm/Support/Compiler.h| by Chris Lattner · 19 years ago
  81. 29e635d Final polish on machine pass registries. by Jim Laskey · 19 years ago
  82. 95eda5b Introducing plugable register allocators and instruction schedulers. by Jim Laskey · 19 years ago
  83. c496b41 Reduce number of exported symbols by Andrew Lenharth · 19 years ago
  84. e097e6f Shave another 27K off libllvmgcc.dylib with visibility hidden by Chris Lattner · 19 years ago
  85. a726fc6 If the register allocator cannot find a register to spill, try the aliases. If by Evan Cheng · 19 years ago
  86. db6aa48 Backing out previous check-in. by Evan Cheng · 19 years ago
  87. 6ad040a If the live interval legnth is essentially zero, i.e. in every live range by Evan Cheng · 19 years ago
  88. b6e2d00 Add some comments. by Chris Lattner · 20 years ago
  89. 2988921 Code cleanups, no functionality change by Chris Lattner · 20 years ago
  90. de02d77 Add explicit #includes of <iostream> by Chris Lattner · 20 years ago
  91. e47d9d0 HB is *the* code janitor. by Duraid Madina · 20 years ago
  92. f28b3bd I think I know what you meant here, but just to be safe I'll let you do it. :) by Duraid Madina · 20 years ago
  93. 2ea5c99 Add section switching to common code generator code. Add a couple of asserts. by Chris Lattner · 20 years ago
  94. b1f8982 Expose the LiveInterval interfaces as public headers. by Chris Lattner · 20 years ago
  95. 4d602be When checking the fixed intervals, don't forget to check for register aliases. by Chris Lattner · 20 years ago
  96. 22e91cc Keep track of which registers are related to which other registers. by Chris Lattner · 20 years ago
  97. 834a231 Try to avoid scanning the fixed list. On architectures with a non-stupid by Chris Lattner · 20 years ago
  98. 95a157a Move some code in the register assignment case that only needs to happen if by Chris Lattner · 20 years ago
  99. 83b821b Speed up this loop a bit, based on some observations that Nate made, and by Chris Lattner · 20 years ago
  100. 835702a Remove trailing whitespace by Misha Brukman · 21 years ago