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gerrit-public.fairphone.software / toolchain / llvm-project / dfed941eec93d257ce0671dec032bb67074acdf6 / llvm / lib / Target / RISCV / RISCVMCInstLower.cpp
  1. 80c8eb7 [RISCV] Add codegen for RV32F floating point load/store by Alex Bradbury · 8 years ago
  2. 315cd3a [RISCV] Implement support for the BranchRelaxation pass by Alex Bradbury · 8 years ago
  3. ffc435e [RISCV] Support and tests for a variety of additional LLVM IR constructs by Alex Bradbury · 8 years ago
  4. a337675 [RISCV] Initial support for function calls by Alex Bradbury · 8 years ago
  5. 74913e1 [RISCV] Codegen for conditional branches by Alex Bradbury · 8 years ago
  6. ec8aa91 [RISCV] Codegen support for memory operations on global addresses by Alex Bradbury · 8 years ago
  7. 8971842 [RISCV] Initial codegen support for ALU operations by Alex Bradbury · 8 years ago