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gerrit-public.fairphone.software / toolchain / llvm-project / e33c95d39b4a315be12c79f710cb1550650cb457 / llvm / lib / Target / ARM / Thumb1InstrInfo.cpp
  1. e9cc901 Refact ARM Thumb1 tMOVr instruction family. by Jim Grosbach · 14 years ago
  2. b98ab91 Thumb1 register to register MOV instruction is predicable. by Jim Grosbach · 14 years ago
  3. d86f34d Refactor away tSpill and tRestore pseudos in ARM backend. by Jim Grosbach · 14 years ago
  4. 1e210d0 Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc by Evan Cheng · 14 years ago
  5. d08fbd1 Move callee-saved regs spills / reloads to TFI by Anton Korobeynikov · 15 years ago
  6. e3d864b convert targets to the new MF.getMachineMemOperand interface. by Chris Lattner · 15 years ago
  7. 0961c55 RISC architectures get their memory operand folding for free. by Jakob Stoklund Olesen · 15 years ago
  8. d7b3300 Replace copyRegToReg with copyPhysReg for ARM. by Jakob Stoklund Olesen · 15 years ago
  9. c5d7122 Thumb1 functions using @llvm.returnaddress were not saving the incoming LR. by Bob Wilson · 15 years ago
  10. 44f9dfc Next round of tail call changes. Register used in a tail by Dale Johannesen · 15 years ago
  11. 168ced9 Implement @llvm.returnaddress. rdar://8015977. by Evan Cheng · 15 years ago
  12. 779c69b Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it by Dan Gohman · 16 years ago
  13. efb126a Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot. by Evan Cheng · 16 years ago
  14. 6f306d7 use DebugLoc default ctor instead of DebugLoc::getUnknownLoc() by Chris Lattner · 16 years ago
  15. 7d116ce Don't leak a MachineInstruction from Thumb1InstrInfo::restoreCalleeSavedRegisters. by Jeffrey Yasskin · 16 years ago
  16. 947f04b Change ARM ld/st multiple instructions to have variant instructions for by Bob Wilson · 16 years ago
  17. d1a8a78 Update Thumb1 storeRegToStackSlot() and loadRegFromStackSlot() to properly by Jim Grosbach · 16 years ago
  18. 30f2ac7 Silence a clang warning about the deprecated (but perfectly reasonable in by John McCall · 16 years ago
  19. 047a767 Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of by Dan Gohman · 16 years ago
  20. fe86442 Refactor code. by Evan Cheng · 16 years ago
  21. 4e9f379 80-column cleanup of file header comments by Jim Grosbach · 16 years ago
  22. 8b5278a t2ldrpci_pic can be used for blockaddress as well. by Evan Cheng · 16 years ago
  23. 207b246 - Add pseudo instructions tLDRpci_pic and t2LDRpci_pic which does a pc-relative by Evan Cheng · 16 years ago
  24. 14635da Use NEON reg-reg moves, where profitable. This reduces "domain-cross" stalls, when we used to mix vfp and neon code (the former were used for reg-reg moves) by Anton Korobeynikov · 16 years ago
  25. 1a4492b Fix a couple more places where we are creating ld / st instructions without memoperands. by Evan Cheng · 16 years ago
  26. 73789b8 Add a Thumb BRIND pattern. Change the ARM BRIND assembly to separate the by Bob Wilson · 16 years ago
  27. b659dff Forgot about ARM::tPUSH. It also has a new writeback operand. by Evan Cheng · 16 years ago
  28. 6f012d8 ARM::tPOP and tPOP_RET each has an extra writeback operand now. by Evan Cheng · 16 years ago
  29. e5801bd It's ok to spill a tGPR register as long as it's still allocated a low register. by Evan Cheng · 16 years ago
  30. cc9ca35 Shrinkify Thumb2 load / store multiple instructions. by Evan Cheng · 16 years ago
  31. e98a3c3 Move the getInlineAsmLength virtual method from TAI to TII, where by Chris Lattner · 16 years ago
  32. 780748d - More refactoring. This gets rid of all of the getOpcode calls. by Evan Cheng · 16 years ago
  33. 38b7eee More DCE. by Evan Cheng · 16 years ago
  34. 18688f4 Get rid of more dead code. by Evan Cheng · 16 years ago
  35. 056c669 Get rid of some more getOpcode calls. by Evan Cheng · 16 years ago
  36. c47e109 Use t2LDRi12 and t2STRi12 to load / store to / from stack frames. Eliminate more getOpcode calls. by Evan Cheng · 16 years ago
  37. 0e5b149 Merge isLoadFromStackSlot into one since it behaves the same regardless of sub-target. by Evan Cheng · 16 years ago
  38. 26b51b1 Just use a single isMoveInstr to catch all the cases. by Evan Cheng · 16 years ago
  39. faede73 Rename tMOVhi2lor to tMOVgpr2tgpr. It's not moving from a high register to a low register. It's moving from a GPR register class to a more restrictive tGPR class. Also change tMOVlor2hir, and tMOVhir2hir. by Evan Cheng · 16 years ago
  40. f3a1fce Change Thumb2 jumptable codegen to one that uses two level jumps: by Evan Cheng · 16 years ago
  41. 95fc6ee Remove unused member functions. by Eli Friedman · 16 years ago
  42. 6cfbe61 FLDD, FLDS, FCPYD, FCPYS, FSTD, FSTS, VMOVD, VMOVQ maps to the same instructions on all sub-targets. by Evan Cheng · 16 years ago
  43. cdd405d Correctly handle the Thumb-2 imm8 addrmode. Specialize frame index elimination more exactly for Thumb-2 to get better code gen. by David Goodwin · 16 years ago
  44. 6deba28 Fix frame index elimination to correctly handle thumb-2 addressing modes that don't allow negative offsets. During frame elimination convert *i12 opcode to a *i8 when necessary due to a negative offset. by David Goodwin · 16 years ago
  45. c5df7e2 Emit cross regclass register moves for thumb2. Minor code duplication cleanup. by Anton Korobeynikov · 16 years ago
  46. cd4cdd1 Major changes to Thumb (not Thumb2). Many 16-bit instructions either modifies CPSR when they are outside the IT blocks, or they can predicated when in Thumb2. Move the implicit def of CPSR to an optional def which defaults CPSR. This allows the 's' bit to be toggled dynamically. by Evan Cheng · 16 years ago
  47. 03ab0bb Generalize opcode selection in ARMBaseRegisterInfo. by David Goodwin · 16 years ago
  48. af7451b Checkpoint Thumb2 Instr info work. Generalized base code so that it can be shared between ARM and Thumb2. Not yet activated because register information must be generalized first. by David Goodwin · 16 years ago
  49. ade05a3 Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into Thumb1InstrInfo, Thumb2InstrInfo, Thumb1RegisterInfo and Thumb2RegisterInfo. Move methods from ARMInstrInfo to ARMBaseInstrInfo to prepare for sharing with Thumb2. by David Goodwin · 16 years ago[Copied (83%) from llvm/lib/Target/ARM/ThumbInstrInfo.cpp]
  50. 0f2158b Simplify a bit by Anton Korobeynikov · 16 years ago
  51. a1b5b18 ARM refactoring. Step 2: split RegisterInfo by Anton Korobeynikov · 16 years ago
  52. 99152f3 Split thumb-related stuff into separate classes. by Anton Korobeynikov · 16 years ago