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gerrit-public.fairphone.software / toolchain / llvm-project / e4aedb55d696ef9f02b1d511ca48c66a4c48f9d5 / llvm / lib / CodeGen / SelectionDAG / InstrEmitter.cpp
  1. 36b718f Avoid a Symbol -> Name -> Symbol conversion. by Rafael Espindola · 10 years ago
  2. a9308c4 IR: Give 'DI' prefix to debug info metadata by Duncan P. N. Exon Smith · 11 years ago
  3. 1e5733b [InlineAsm] Remove EarlyClobber on registers that are also inputs by Hal Finkel · 11 years ago
  4. e686f15 CodeGen: Stop using DIDescriptor::is*() and auto-casting by Duncan P. N. Exon Smith · 11 years ago
  5. 3bef6a3 CodeGen: Assert that inlined-at locations agree by Duncan P. N. Exon Smith · 11 years ago
  6. 8b77065 Move DataLayout back to the TargetMachine from TargetSubtargetInfo by Eric Christopher · 11 years ago
  7. 147c2ea Remove the uses of getSubtargetImpl from InstrEmitter and remove by Eric Christopher · 11 years ago
  8. 87b7eb9 Move the complex address expression out of DIVariable and into an extra by Adrian Prantl · 11 years ago
  9. b458dc2 Revert r218778 while investigating buldbot breakage. by Adrian Prantl · 11 years ago
  10. 25a7174 Move the complex address expression out of DIVariable and into an extra by Adrian Prantl · 11 years ago
  11. 529efcf SelectionDAG: Remove #if NDEBUG from check for a post-isel hook by Tom Stellard · 11 years ago
  12. d913448 Remove the TargetMachine forwards for TargetSubtargetInfo based by Eric Christopher · 11 years ago
  13. eae2d28 [SDAG] Don't insert the VRBase into a mapping from SDValues when the def by Chandler Carruth · 11 years ago
  14. 32da889 This reapplies r207235 with an additional bugfixes caught by the msan by Adrian Prantl · 12 years ago
  15. d2d9b76 Revert "This reapplies r207130 with an additional testcase+and a missing check for" by Adrian Prantl · 12 years ago
  16. f5834a4 This reapplies r207130 with an additional testcase+and a missing check for by Adrian Prantl · 12 years ago
  17. 6e5de2e Revert "This reapplies r207130 with an additional testcase+and a missing check for" by Adrian Prantl · 12 years ago
  18. 3512190 This reapplies r207130 with an additional testcase+and a missing check for by Adrian Prantl · 12 years ago
  19. ff4282a Revert "Debug info for optimized code: Support variables that are on the stack and" by Adrian Prantl · 12 years ago
  20. f422391 Debug info for optimized code: Support variables that are on the stack and by Adrian Prantl · 12 years ago
  21. 1b9dde0 [Modules] Remove potential ODR violations by sinking the DEBUG_TYPE by Chandler Carruth · 12 years ago
  22. c0196b1 [C++11] More 'nullptr' conversion. In some cases just using a boolean check instead of comparing to nullptr. by Craig Topper · 12 years ago
  23. 5d049b9 [c++11] Range'ify use list loops in InstrEmitter. by Jim Grosbach · 12 years ago
  24. 840beec Make consistent use of MCPhysReg instead of uint16_t throughout the tree. by Craig Topper · 12 years ago
  25. fbb278c Make stackmap machineinstrs clobber the scratch regs too. by Andrew Trick · 12 years ago
  26. b6b35a4 Always let value types influence register classes. by Jakob Stoklund Olesen · 12 years ago
  27. 1f54e80 Fix patchpoint comments. by Andrew Trick · 12 years ago
  28. 87ed906 [Stackmap] Materialize the jump address within the patchpoint noop slide. by Juergen Ributzka · 12 years ago
  29. 9969d3e [Stackmap] Add AnyReg calling convention support for patchpoint intrinsic. by Juergen Ributzka · 12 years ago
  30. 418d1d1 Reapply an improved version of r180816/180817. by Adrian Prantl · 12 years ago
  31. 0252265b Debug Info: Simplify Frame Index handling in DBG_VALUE Machine Instructions by David Blaikie · 12 years ago
  32. a2888e7 Temporarily revert "Change the informal convention of DBG_VALUE so that we can express a" by Adrian Prantl · 13 years ago
  33. 9a57664 Change the informal convention of DBG_VALUE so that we can express a by Adrian Prantl · 13 years ago
  34. 9fb823b Move all of the header files which are involved in modelling the LLVM IR by Chandler Carruth · 13 years ago
  35. b109a7b Use MachineInstrBuilder in InstrEmitter. by Jakob Stoklund Olesen · 13 years ago
  36. 5e6c361 Change TargetLowering::getRegClassFor to take an MVT, instead of EVT. by Patrik Hagglund · 13 years ago
  37. e98b7a0 Revert EVT->MVT changes, r169836-169851, due to buildbot failures. by Patrik Hagglund · 13 years ago
  38. 3708e54 Change TargetLowering::getRegClassFor to take an MVT, instead of EVT. by Patrik Hagglund · 13 years ago
  39. ed0881b Use the new script to sort the includes of every file under lib. by Chandler Carruth · 13 years ago
  40. 909f6a0 [inline asm] Get the mayLoad/mayStore directly from the MIOp_ExtraInfo operand. by Chad Rosier · 13 years ago
  41. 9e1274f [inline asm] Implement mayLoad and mayStore for inline assembly. In general, by Chad Rosier · 13 years ago
  42. cdfe20b Move TargetData to DataLayout. by Micah Villmow · 13 years ago
  43. abb87d4 Fix PR11985 by Michael Liao · 13 years ago
  44. 6f9dace Remove an overly-aggressive assertion. The code following this assertion already knows how to handle the case where DstRC was NULL, so it's not actually protecting us from anything, and this pattern can come up when using unknown_class operands in the SelectionDAG. by Owen Anderson · 13 years ago
  45. 7c277da Add a new optimization pass: Stack Coloring, that merges disjoint static allocations (allocas). Allocas are known to be by Nadav Rotem · 13 years ago
  46. 5c8eda0 Add MachineInstr::tieOperands, remove setIsTied(). by Jakob Stoklund Olesen · 13 years ago
  47. 96f8706 Don't enforce ordered inline asm operands. by Jakob Stoklund Olesen · 13 years ago
  48. ffba07b Verify the order of tied operands in inline asm. by Jakob Stoklund Olesen · 13 years ago
  49. b2bef48 Set the isTied flags when building INLINEASM MachineInstrs. by Jakob Stoklund Olesen · 13 years ago
  50. 10cdd09 Avoid including explicit uses when counting SDNode imp-uses. by Jakob Stoklund Olesen · 13 years ago
  51. 505715d Add SelectionDAG::getTargetIndex. by Jakob Stoklund Olesen · 13 years ago
  52. b171228 InstrEmitter::EmitSubregNode() optimize extract_subreg in this case: by Evan Cheng · 13 years ago
  53. c300ef0 Allow trailing physreg RegisterSDNode operands on non-variadic instructions. by Jakob Stoklund Olesen · 13 years ago
  54. 3e3cdec Clear kill flags in InstrEmitter::EmitSubregNode(). by Jakob Stoklund Olesen · 13 years ago
  55. 3c52f02 Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass(). by Jakob Stoklund Olesen · 13 years ago
  56. 32aea35 Added TargetRegisterInfo::getAllocatableClass. by Andrew Trick · 14 years ago
  57. b9a3d61 Don't crash when a glue node contains an internal CopyToReg by Hal Finkel · 14 years ago
  58. f650732 Handle all live physreg defs in the same place. by Jakob Stoklund Olesen · 14 years ago
  59. 46a9f01 More dead code removal (using -Wunreachable-code) by David Blaikie · 14 years ago
  60. 9349351d Add a RegisterMaskSDNode class. by Jakob Stoklund Olesen · 14 years ago
  61. c52eeed Fix ISD::REG_SEQUENCE to accept physical registers and change TwoAddressInstructionPass to insert copies for any physical reg operands of the REG_SEQUENCE by Pete Cooper · 14 years ago
  62. 7f8e563 Add bundle aware API for querying instruction properties and switch the code by Evan Cheng · 14 years ago
  63. f7957a9 Simplify EXTRACT_SUBREG emission. by Jakob Stoklund Olesen · 14 years ago
  64. 8ff52c4 Simplify INSERT_SUBREG emission. by Jakob Stoklund Olesen · 14 years ago
  65. 1352be2 Move getCommonSubClass() into TRI. by Jakob Stoklund Olesen · 14 years ago
  66. e92e5ee Constrain register classes instead of emitting copies. by Jakob Stoklund Olesen · 14 years ago
  67. 924123a Lower ARM adds/subs to add/sub after adding optional CPSR operand. by Andrew Trick · 14 years ago
  68. 52363bd Restore hasPostISelHook tblgen flag. by Andrew Trick · 14 years ago
  69. 8586e62 ARM isel bug fix for adds/subs operands. by Andrew Trick · 14 years ago
  70. 53df4b6 whitespace by Andrew Trick · 14 years ago
  71. e6fba77 Follow up to r138791. by Evan Cheng · 14 years ago
  72. 229907c land David Blaikie's patch to de-constify Type, with a few tweaks. by Chris Lattner · 14 years ago
  73. 6cc775f - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and by Evan Cheng · 14 years ago
  74. 8d71a75 More refactoring. Move getRegClass from TargetOperandInfo to TargetInstrInfo. by Evan Cheng · 14 years ago
  75. 537a302 Distinguish early clobber output operands from clobbered registers. by Jakob Stoklund Olesen · 14 years ago
  76. f071d72 Handle debug info for i128 constants. by Devang Patel · 14 years ago
  77. c826df9 Don't use register classes larger than TLI->getRegClassFor(VT). by Jakob Stoklund Olesen · 14 years ago
  78. 5fc8b77 Change the REG_SEQUENCE SDNode to take an explict register class ID as its first operand. This operand is lowered away by the time we reach MachineInstrs, so the actual register-allocation handling of them doesn't need to change. by Owen Anderson · 14 years ago
  79. aff1060 Use TRI::has{Sub,Super}ClassEq() where possible. by Jakob Stoklund Olesen · 14 years ago
  80. 2fb5b31 Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic. by Jakob Stoklund Olesen · 15 years ago
  81. 6eb516d Do not model all INLINEASM instructions as having unmodelled side effects. by Evan Cheng · 15 years ago
  82. 260acf3 Optimize: by Evan Cheng · 15 years ago
  83. 11a3381 flags -> glue for selectiondag by Chris Lattner · 15 years ago
  84. 9b43f33 Change all self assignments X=X to (void)X, so that we can turn on a by Jeffrey Yasskin · 15 years ago
  85. 3e5fbd7 rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for by Chris Lattner · 15 years ago
  86. bfc6904 Fix crash compiling a QQQQ REG_SEQUENCE for a Neon vld3_lane operation. by Bob Wilson · 15 years ago
  87. 1b93e7b Reword comment slightly. by Eric Christopher · 15 years ago
  88. 8b67c72 Split pseudo-instruction expansion into a separate pass, to make it by Dan Gohman · 15 years ago
  89. f824489 Revert r112461. It was failing on PPC... by Bill Wendling · 15 years ago
  90. 938f299 When adding a register, we should mark it as "def" if it can optionally define by Bill Wendling · 15 years ago
  91. e50d30d Emit COPY instructions instead of using copyRegToReg in InstrEmitter, by Jakob Stoklund Olesen · 15 years ago
  92. fbdba81 Insert IMPLICIT_DEF instructions at the current insert position, not by Dan Gohman · 15 years ago
  93. d7b5ce3 Reapply bottom-up fast-isel, with several fixes for x86-32: by Dan Gohman · 15 years ago
  94. 6586e9b --- Reverse-merging r107947 into '.': by Bob Wilson · 15 years ago
  95. 0b5aa1c Re-apply bottom-up fast-isel, with fixes. Be very careful to avoid emitting by Dan Gohman · 15 years ago
  96. 0026462 Convert EXTRACT_SUBREG to COPY when emitting machine instrs. by Jakob Stoklund Olesen · 15 years ago
  97. e757043 Revert 107840 107839 107813 107804 107800 107797 107791. by Dan Gohman · 15 years ago
  98. 25d5c1b Not all custom inserters create new basic blocks. If the inserter by Dan Gohman · 15 years ago
  99. 637ee5f Update comment. by Devang Patel · 15 years ago
  100. 3439629 Reapply r107655 with fixes; insert the pseudo instruction into by Dan Gohman · 15 years ago