Gitiles
Code Review Sign In
gerrit-public.fairphone.software / toolchain / llvm-project / e85b06d65f695c576df1e529ee37cb15e6902401 / llvm / lib / CodeGen / PostRASchedulerList.cpp
  1. f1caa28 MachineFunction: Return reference from getFunction(); NFC by Matthias Braun · 8 years ago
  2. c468b64 Remove redundant includes from lib/CodeGen. by Michael Zolotukhin · 8 years ago
  3. 25528d6 [CodeGen] Unify MBB reference format in both MIR and debug output by Francis Visoiu Mistrih · 8 years ago
  4. b3bde2e Fix a bunch more layering of CodeGen headers that are in Target by David Blaikie · 8 years ago
  5. 3f833ed Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering by David Blaikie · 8 years ago
  6. 615eb47 Reverting r315590; it did not include changes for llvm-tblgen, which is causing link errors for several people. by Aaron Ballman · 8 years ago
  7. 3e0199f [dump] Remove NDEBUG from test to enable dump methods [NFC] by Don Hinton · 8 years ago
  8. 868bbd4 ScheduleDAGInstrs: Fix fixupKills() by Matthias Braun · 8 years ago
  9. 1527baa CodeGen: Rename DEBUG_TYPE to match passnames by Matthias Braun · 8 years ago
  10. 8c209aa Cleanup dump() functions. by Matthias Braun · 9 years ago
  11. 1eb4736 MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it by Matthias Braun · 9 years ago
  12. 762c5ca CodeGen: Use MachineInstr& in PostRASchedulerList, NFC by Duncan P. N. Exon Smith · 9 years ago
  13. 9cfc75c CodeGen: Use MachineInstr& in TargetInstrInfo, NFC by Duncan P. N. Exon Smith · 9 years ago
  14. 6453501 CodeGen: Move check of EnablePostRAScheduler to avoid disabling antidependency breaker by Mitch Bodart · 9 years ago
  15. 31d19d4 CodeGen: Move TargetPassConfig from Passes.h to an own header; NFC by Matthias Braun · 9 years ago
  16. aa641a5 Re-commit optimization bisect support (r267022) without new pass manager support. by Andrew Kaylor · 9 years ago
  17. 6013f45 Revert "Initial implementation of optimization bisect support." by Vedant Kumar · 9 years ago
  18. f0f2792 Initial implementation of optimization bisect support. by Andrew Kaylor · 9 years ago
  19. b550cb1 [NFC] Header cleanup by Mehdi Amini · 9 years ago
  20. ad154c8 Introduce MachineFunctionProperties and the AllVRegsAllocated property by Derek Schuff · 10 years ago
  21. cd99e36 Invoke DAG postprocessing in the post-RA scheduler by Krzysztof Parzyszek · 10 years ago
  22. 5c61d11 Add DAG mutation interface to the post-RA scheduler by Krzysztof Parzyszek · 10 years ago
  23. 5e6e8c7 CodeGen: Use MachineInstr& in AntiDepBreaker API, NFC by Duncan P. N. Exon Smith · 10 years ago
  24. 9198c67 MachineScheduler: Add regpressure information to debug dump by Matthias Braun · 10 years ago
  25. 93563e7 ScheduleDAGInstrs: Remove IsPostRA flag; NFC by Matthias Braun · 10 years ago
  26. 1ff4098 CodeGen: Use range-based for in PostRAScheduler, NFC by Duncan P. N. Exon Smith · 10 years ago
  27. 7b560d4 [PM/AA] Rebuild LLVM's alias analysis infrastructure in a way compatible by Chandler Carruth · 10 years ago
  28. f00654e Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) by Alexander Kornienko · 10 years ago
  29. 70bc5f1 Fixed/added namespace ending comments using clang-tidy. NFC by Alexander Kornienko · 10 years ago
  30. 39a2afc Rename TargetSubtargetInfo::enablePostMachineScheduler() to enablePostRAScheduler() by Matthias Braun · 10 years ago
  31. f817c1c Use 'override/final' instead of 'virtual' for overridden methods by Alexander Kornienko · 10 years ago
  32. 3d4276f The subtarget is cached on the MachineFunction. Access it directly. by Eric Christopher · 11 years ago
  33. f51a34e Whitespace. by NAKAMURA Takumi · 11 years ago
  34. b66367a Grab the subtarget and subtarget dependent variables off of by Eric Christopher · 11 years ago
  35. ea0aee6 Cleanup: Delete seemingly unused reference to MachineDominatorTree from ScheduleDAGInstrs. by Alexey Samsonov · 11 years ago
  36. 8968e6d Fix null reference creation in ScheduleDAGInstrs constructor call. by Alexey Samsonov · 11 years ago
  37. fc6de42 Have MachineFunction cache a pointer to the subtarget to make lookups by Eric Christopher · 11 years ago
  38. d913448 Remove the TargetMachine forwards for TargetSubtargetInfo based by Eric Christopher · 11 years ago
  39. a2f658d Move Post RA Scheduling flag bit into SchedMachineModel by Sanjay Patel · 11 years ago
  40. 1b9dde0 [Modules] Remove potential ODR violations by sinking the DEBUG_TYPE by Chandler Carruth · 11 years ago
  41. c0196b1 [C++11] More 'nullptr' conversion. In some cases just using a boolean check instead of comparing to nullptr. by Craig Topper · 11 years ago
  42. 7c99ec5 Disable each MachineFunctionPass for 'optnone' functions, unless that by Paul Robinson · 11 years ago
  43. 3161726 remove a bunch of unused private methods by Nuno Lopes · 12 years ago
  44. 4584cd5 [C++11] Add 'override' keyword to virtual methods that override their base class. by Craig Topper · 12 years ago
  45. b6d0bd4 [C++11] Replace llvm::next and llvm::prior with std::next and std::prev. by Benjamin Kramer · 12 years ago
  46. 6b104f8 Move the PostRA scheduler's fixupKills function for reuse. by Andrew Trick · 12 years ago
  47. 4fd3b1d Add two additional hazard recognizer functions by Hal Finkel · 12 years ago
  48. 811a2ef After PostRA scheduling, don't set kill flags on undef operands. by Andrew Trick · 12 years ago
  49. a53e101 mi-sched: Don't call MBB.size() in initSUnits. The driver already has instr count. by Andrew Trick · 12 years ago
  50. abdb1d6 Simplify logic now that r182490 is in place. No functional change intended. by Chad Rosier · 12 years ago
  51. c338679 Remove special-casing of return blocks for liveness. by Jakob Stoklund Olesen · 13 years ago
  52. f623e98 Use MachineInstrBuilder in a few CodeGen passes. by Jakob Stoklund Olesen · 13 years ago
  53. ed0881b Use the new script to sort the includes of every file under lib. by Chandler Carruth · 13 years ago
  54. 4b1f9e3 misched: Don't consider artificial edges weak edges. by Andrew Trick · 13 years ago
  55. f1ff84c misched: Infrastructure for weak DAG edges. by Andrew Trick · 13 years ago
  56. c30a9af Switch most getReservedRegs() clients to the MRI equivalent. by Jakob Stoklund Olesen · 13 years ago
  57. 19f49ac Release build: guard dump functions with by Manman Ren · 13 years ago
  58. 742534c Release build: guard dump functions with "ifndef NDEBUG" by Manman Ren · 13 years ago
  59. a538d83 Add a getName function to MachineFunction. Use it in places that previously did getFunction()->getName(). Remove includes of Function.h that are no longer needed. by Craig Topper · 13 years ago
  60. 05ff466 Move RegisterClassInfo.h. by Andrew Trick · 13 years ago
  61. 628a39f Remove unused private fields found by clang's new -Wunused-private-field. by Benjamin Kramer · 13 years ago
  62. 54038d7 Switch all register list clients to the new MC*Iterator interface. by Jakob Stoklund Olesen · 13 years ago
  63. 9a09147 This patch fixes a problem which arose when using the Post-RA scheduler by Preston Gurd · 13 years ago
  64. 8c207e4 misched interface: rename Begin/End to RegionBegin/RegionEnd since they are not private. by Andrew Trick · 14 years ago
  65. 9a0c583 misched prep: Expose the ScheduleDAGInstrs interface so targets may by Andrew Trick · 14 years ago
  66. a316faa misched prep: rename InsertPos to End. by Andrew Trick · 14 years ago
  67. 52226d4 misched preparation: rename core scheduler methods for consistency. by Andrew Trick · 14 years ago
  68. 60cf03e misched preparation: clarify ScheduleDAG and ScheduleDAGInstrs roles. by Andrew Trick · 14 years ago
  69. e932bb7 misched preparation: modularize schedule emission. by Andrew Trick · 14 years ago
  70. edee68c misched preparation: modularize schedule printing. by Andrew Trick · 14 years ago
  71. 46a5866 misched preparation: modularize schedule verification. by Andrew Trick · 14 years ago
  72. 4b02a29 Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce static data size. by Craig Topper · 14 years ago
  73. ef8bf39 BitVectorize loop. by Benjamin Kramer · 14 years ago
  74. 796fd46 post-ra-sched: Turn the KillIndices vector into a bitvector, it only stored two meaningful states. by Benjamin Kramer · 14 years ago
  75. 21974b1 post-ra-sched: Replace a std::set of regs with a bitvector. by Benjamin Kramer · 14 years ago
  76. a793a59 Make calls scheduling boundaries post-ra. by Jakob Stoklund Olesen · 14 years ago
  77. 28d4803 Handle regmasks in FixupKills. by Jakob Stoklund Olesen · 14 years ago
  78. 760b134 Make all pointers to TargetRegisterClass const since they are all pointers to static data that should not be modified. by Craig Topper · 14 years ago
  79. 1fa5bcb Codegen pass definition cleanup. No functionality. by Andrew Trick · 14 years ago
  80. df7e376 Move pass configuration out of pass constructors: PostRAScheduler. by Andrew Trick · 14 years ago
  81. 1d028a3 misched: Added ScheduleDAGInstrs::IsPostRA by Andrew Trick · 14 years ago
  82. 7fae11b - Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a function by Evan Cheng · 14 years ago
  83. 7f8e563 Add bundle aware API for querying instruction properties and switch the code by Evan Cheng · 14 years ago
  84. 1f97a5a Remove all remaining uses of Value::getNameStr(). by Benjamin Kramer · 14 years ago
  85. 0d639a2 Rename TargetSubtarget to TargetSubtargetInfo for consistency. by Evan Cheng · 14 years ago
  86. 4f5f84c Teach antidependency breakers to use RegisterClassInfo. by Jakob Stoklund Olesen · 14 years ago
  87. f02a376 Update DBG_VALUEs while breaking anti dependencies. by Devang Patel · 14 years ago
  88. 18c9b37 Add an issue width check to the postRA scheduler. Patch by Max Kazakov! by Andrew Trick · 14 years ago
  89. 84f9ad9 Typo: Reviewed by Alistair. by Andrew Trick · 14 years ago
  90. aab77fe Post-RA scheduler compile time fix. Quadratic computation of DAG node depth. by Andrew Trick · 14 years ago
  91. 10ffc2b Various bits of framework needed for precise machine-level selection by Andrew Trick · 15 years ago
  92. bf40707 Teach if-converter to be more careful with predicating instructions that would by Evan Cheng · 15 years ago
  93. a7aed18 Reapply r110396, with fixes to appease the Linux buildbot gods. by Owen Anderson · 15 years ago
  94. bda59bd Revert r110396 to fix buildbots. by Owen Anderson · 15 years ago
  95. 755aceb Don't use PassInfo* as a type identifier for passes. Instead, use the address of the static by Owen Anderson · 15 years ago
  96. dd5e9d8 Use std::vector instead of TargetRegisterInfo::FirstVirtualRegister. by Bill Wendling · 15 years ago
  97. 2d51c7c Allow ARM if-converter to be run after post allocation scheduling. by Evan Cheng · 15 years ago
  98. 078f4ce - Do away with SimpleHazardRecognizer.h. It's not used and offers little value. by Evan Cheng · 15 years ago
  99. e60273f Allow target to provide its own hazard recognizer to post-ra scheduler. by Evan Cheng · 15 years ago
  100. 3858451 - Change MachineInstr::findRegisterDefOperandIdx so it can also look for defs by Evan Cheng · 15 years ago