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gerrit-public.fairphone.software / toolchain / llvm-project / e85b06d65f695c576df1e529ee37cb15e6902401 / llvm / test / CodeGen / AMDGPU / ds_write2.ll
  1. 84445dd AMDGPU: Use gfx9 carry-less add/sub instructions by Matt Arsenault · 8 years ago
  2. 3f71c0e AMDGPU: Select DS insts without m0 initialization by Matt Arsenault · 8 years ago
  3. 5fa289f [AMDGPU] Narrow lshl from 64 to 32 bit if possible by Stanislav Mekhanoshin · 8 years ago
  4. 3dbeefa AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel by Matt Arsenault · 9 years ago
  5. c2ff0eb AMDGPU/SI: Improve SILoadStoreOptimizer and run it before the scheduler by Tom Stellard · 9 years ago
  6. 45f8216 AMDGPU: Remove superfluous string attributes from tests by Matt Arsenault · 9 years ago
  7. 44e5483 AMDGPU: Add volatile to test loads and stores by Matt Arsenault · 10 years ago
  8. 0bc954e AMDGPU/SI: Enable lanemask tracking in misched by Tom Stellard · 10 years ago
  9. 9c47dd5 AMDGPU: Remove some old intrinsic uses from tests by Matt Arsenault · 10 years ago
  10. 2aed6ca AMDGPU: Switch barrier intrinsics to using convergent by Matt Arsenault · 10 years ago
  11. 61001bb AMDGPU: Make v2i64/v2f64 legal types. by Matt Arsenault · 10 years ago
  12. 84db5d9 AMDGPU/SI: Fix read2 merging into a super register. by Matt Arsenault · 10 years ago
  13. 45bb48e R600 -> AMDGPU rename by Tom Stellard · 10 years ago[Renamed from llvm/test/CodeGen/R600/ds_write2.ll]
  14. 1f3416a R600/SI: Don't print offset0/offset1 DS operands when they are 0 by Tom Stellard · 11 years ago
  15. f72d05b [opaque pointer type] Add textual IR support for explicit type parameter to gep operator by David Blaikie · 11 years ago
  16. a79ac14 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction by David Blaikie · 11 years ago
  17. 79e6c74 [opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction by David Blaikie · 11 years ago
  18. eb05c61 R600/SI: Remove M0 from DS assembly strings by Tom Stellard · 11 years ago
  19. 49f8bfd R600/SI: Add a stub GCNTargetMachine by Tom Stellard · 11 years ago
  20. fb13b22 R600/SI: Change mubuf offsets to print as decimal by Matt Arsenault · 11 years ago
  21. cc8d3b8 R600: Error on initializer for LDS. by Matt Arsenault · 11 years ago
  22. 326d6ec R600/SI: Change all instruction assembly names to lowercase. by Tom Stellard · 11 years ago
  23. 1a74aff R600/SI: Also try to use 0 base for misaligned 8-byte DS loads. by Matt Arsenault · 11 years ago
  24. e775f5f R600/SI: Use DS offsets for constant addresses by Matt Arsenault · 11 years ago
  25. 61cc908 R600/SI: Change how DS offsets are printed by Matt Arsenault · 11 years ago
  26. fe0a2e6 R600/SI: Match read2/write2 stride 64 versions by Matt Arsenault · 11 years ago
  27. 4103328 R600/SI: Add load / store machine optimizer pass. by Matt Arsenault · 11 years ago