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gerrit-public.fairphone.software / toolchain / llvm-project / e85b06d65f695c576df1e529ee37cb15e6902401 / llvm / test / CodeGen / AMDGPU / schedule-vs-if-nested-loop-failure.ll
  1. 4c519d3 AMDGPU/R600: Replace barrier intrinsics by Matt Arsenault · 9 years ago
  2. df3a20c AMDGPU: Add a shader calling convention by Nicolai Haehnle · 9 years ago
  3. 2aed6ca AMDGPU: Switch barrier intrinsics to using convergent by Matt Arsenault · 10 years ago
  4. 45bb48e R600 -> AMDGPU rename by Tom Stellard · 10 years ago[Renamed from llvm/test/CodeGen/R600/schedule-vs-if-nested-loop-failure.ll]
  5. f72d05b [opaque pointer type] Add textual IR support for explicit type parameter to gep operator by David Blaikie · 11 years ago
  6. a79ac14 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction by David Blaikie · 11 years ago
  7. 7517077 R600/SI: Enable all tests that pass on VI without changes by Marek Olsak · 11 years ago
  8. 49f8bfd R600/SI: Add a stub GCNTargetMachine by Tom Stellard · 11 years ago
  9. 79243d9 R600: Call EmitFunctionHeader() in the AsmPrinter to populate the ELF symbol table by Tom Stellard · 11 years ago
  10. 919bb6b R600/SI: Custom lower SI_IF and SI_ELSE to avoid machine verifier errors by Tom Stellard · 11 years ago
  11. 2430958 R600: Add failing control flow tests. by Matt Arsenault · 12 years ago