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gerrit-public.fairphone.software / toolchain / llvm-project / e8aab7480c2550b51fd60d6eb102b361e70931d7 / llvm / lib / CodeGen / MachineCSE.cpp
  1. dd6e12d In Machine CSE pass, the source register of a COPY machine instruction can by Jiangning Liu · 11 years ago
  2. fc6de42 Have MachineFunction cache a pointer to the subtarget to make lookups by Eric Christopher · 11 years ago
  3. d913448 Remove the TargetMachine forwards for TargetSubtargetInfo based by Eric Christopher · 11 years ago
  4. c305312 Add TargetInstrInfo interface isAsCheapAsAMove. by Jiangning Liu · 11 years ago
  5. 1b9dde0 [Modules] Remove potential ODR violations by sinking the DEBUG_TYPE by Chandler Carruth · 11 years ago
  6. 7c99ec5 Disable each MachineFunctionPass for 'optnone' functions, unless that by Paul Robinson · 12 years ago
  7. b36376e Switch a number of loops in lib/CodeGen over to range-based for-loops, now that by Owen Anderson · 12 years ago
  8. 16c6bf4 Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changing by Owen Anderson · 12 years ago
  9. 4584cd5 [C++11] Add 'override' keyword to virtual methods that override their base class. by Craig Topper · 12 years ago
  10. b1f25f1 Replace PROLOG_LABEL with a new CFI_INSTRUCTION. by Rafael Espindola · 12 years ago
  11. b6d0bd4 [C++11] Replace llvm::next and llvm::prior with std::next and std::prev. by Benjamin Kramer · 12 years ago
  12. e4083f9 Disabled subregister copy coalescing during MachineCSE. by Andrew Trick · 12 years ago
  13. e339828 Allow MachineCSE to coalesce trivial subregister copies the same way that it coalesces normal copies. by Andrew Trick · 12 years ago
  14. f152836 Revert "Allow MachineCSE to coalesce trivial subregister copies the same way that it coalesces normal copies." by Rafael Espindola · 12 years ago
  15. 88bd862 Allow MachineCSE to coalesce trivial subregister copies the same way by Andrew Trick · 12 years ago
  16. cccd82f whitespace by Andrew Trick · 12 years ago
  17. b94011f Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size. by Craig Topper · 12 years ago
  18. ed0881b Use the new script to sort the includes of every file under lib. by Chandler Carruth · 13 years ago
  19. f89406a CSE: allow PerformTrivialCoalescing to check copies across basic block by Manman Ren · 13 years ago
  20. f18753b Don't use iterator after being erased. by Jakub Staszak · 13 years ago
  21. 3946877 Do not consider a machine instruction that uses and defines the same by Ulrich Weigand · 13 years ago
  22. 244beb4 Remove unused BitVectors from getAllocatableSet(). by Jakob Stoklund Olesen · 13 years ago
  23. c30a9af Switch most getReservedRegs() clients to the MRI equivalent. by Jakob Stoklund Olesen · 13 years ago
  24. 59c8b41 MachineCSE: Hoist isConstantPhysReg out of the loop, it checks for overlaps already. by Benjamin Kramer · 13 years ago
  25. ef6494f PR13578: Teach MachineCSE that instructions that use a constant register can be CSE'd safely. by Benjamin Kramer · 13 years ago
  26. 1be131b X86: enable CSE between CMP and SUB by Manman Ren · 13 years ago
  27. cb36b8c MachineCSE: Update the heuristics for isProfitableToCSE. by Manman Ren · 13 years ago
  28. d163405 Remove tabs. by Bill Wendling · 13 years ago
  29. 765c699 Remove ParentMap. You can just ask the domnode for its parent. No functionality by Nick Lewycky · 13 years ago
  30. 92a0083 Switch some getAliasSet clients to MCRegAliasIterator. by Jakob Stoklund Olesen · 13 years ago
  31. 1d32658 Use uint16_t to store register overlaps to reduce static data. by Craig Topper · 14 years ago
  32. 4c5ad2b Handle regmasks in MachineCSE. by Jakob Stoklund Olesen · 14 years ago
  33. 5bade3d Re-enable 150652 and 150654 - Make FPSCR non-reserved, and make MachineCSE bail on reserved registers. This *should* be safe as of r150786. by Lang Hames · 14 years ago
  34. 55a2a96 Oop - r150653 + r150654 broke one of my test cases. Backing out for now... by Lang Hames · 14 years ago
  35. 2055493 MachineCSE shouldn't extend the live ranges of reserved or allocatable registers. by Lang Hames · 14 years ago
  36. 1fa5bcb Codegen pass definition cleanup. No functionality. by Andrew Trick · 14 years ago
  37. 9e76199 whitespace by Andrew Trick · 14 years ago
  38. ae22c60 Persuade GCC that there is nothing worth warning about here (there isn't). by Duncan Sands · 14 years ago
  39. d9725a3 Avoid CSE of instructions which define physical registers across MBBs unless by Evan Cheng · 14 years ago
  40. 0be4144 Allow machine-cse to look across MBB boundary when cse'ing instructions that by Evan Cheng · 14 years ago
  41. 7f8e563 Add bundle aware API for querying instruction properties and switch the code by Evan Cheng · 14 years ago
  42. 3e5409d We need to verify that the machine instruction we're using as a replacement for by Bill Wendling · 14 years ago
  43. 6cc775f - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and by Evan Cheng · 14 years ago
  44. 5401962 Re-revert r130877; it's apparently causing a regression on 197.parser, by Eli Friedman · 14 years ago
  45. 2311bdf Minor correction to r130877; fixes PR9846 and hopefully the buildbot failures. by Eli Friedman · 14 years ago
  46. 0fe4608 Re-commit r130862 with a minor change to avoid an iterator running off the edge in some cases. by Eli Friedman · 14 years ago
  47. 3bd79ba Back out r130862; it appears to be breaking bootstrap. by Eli Friedman · 14 years ago
  48. a16fc2f Teach MachineCSE how to do simple cross-block CSE involving physregs. This allows, for example, eliminating duplicate cmpl's on x86. Part of rdar://problem/8259436 . by Eli Friedman · 14 years ago
  49. fe917ef Fix a couple of places where changes are made but not tracked. by Evan Cheng · 15 years ago
  50. 6c8b8dd fit in 80 cols and use MBB::isSuccessor instead of a hand rolled std::find. by Chris Lattner · 15 years ago
  51. 2fb5b31 Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic. by Jakob Stoklund Olesen · 15 years ago
  52. 6eb516d Do not model all INLINEASM instructions as having unmodelled side effects. by Evan Cheng · 15 years ago
  53. 18f164f Use a RecyclingAllocator to allocate values for MachineCSE's ScopedHashTable for by Cameron Zwarich · 15 years ago
  54. b7ff5a0 Teach machine cse to commute instructions. by Evan Cheng · 15 years ago
  55. 2b3f25e Teach machine cse to eliminate instructions with multiple physreg uses and defs. rdar://8610857. by Evan Cheng · 15 years ago
  56. 6c18d1a Get rid of static constructors for pass registration. Instead, every pass exposes an initializeMyPassFunction(), which by Owen Anderson · 15 years ago
  57. 8ac477f Begin adding static dependence information to passes, which will allow us to by Owen Anderson · 15 years ago
  58. df7a4f2 Now with fewer extraneous semicolons! by Owen Anderson · 15 years ago
  59. 1884278 Add MachineRegisterInfo::constrainRegClass and use it in MachineCSE. by Jakob Stoklund Olesen · 15 years ago
  60. b08377e Machine CSE was forgetting to clear some data structures. by Evan Cheng · 15 years ago
  61. 0dcd336 Fix a potential bug that can cause miscomparison with and without debug info. by Evan Cheng · 15 years ago
  62. e0db9d0 Machine CSE preserves CFG. Pass manager was freeing machineloopinfo after machine cse before. by Evan Cheng · 15 years ago
  63. a7aed18 Reapply r110396, with fixes to appease the Linux buildbot gods. by Owen Anderson · 15 years ago
  64. bda59bd Revert r110396 to fix buildbots. by Owen Anderson · 15 years ago
  65. 755aceb Don't use PassInfo* as a type identifier for passes. Instead, use the address of the static by Owen Anderson · 15 years ago
  66. a57b97e Fix batch of converting RegisterPass<> to INTIALIZE_PASS(). by Owen Anderson · 15 years ago
  67. 37c42a3 Remove many calls to TII::isMoveInstr. Targets should be producing COPY anyway. by Jakob Stoklund Olesen · 15 years ago
  68. 0026462 Convert EXTRACT_SUBREG to COPY when emitting machine instrs. by Jakob Stoklund Olesen · 15 years ago
  69. 4c82a9e Detect and handle COPY in many places. by Jakob Stoklund Olesen · 15 years ago
  70. a03e6f8 Re-apply 105308 with fix. by Evan Cheng · 15 years ago
  71. 30093b5 Revert 105308. by Bob Wilson · 15 years ago
  72. a2da227 Enable machine cse of instructions which define physical registers. by Evan Cheng · 15 years ago
  73. 53ff992 Make this LookAheadLimit, not the uninitialized LookAheadLeft. by Eric Christopher · 15 years ago
  74. 2c8bdea Allow machine cse to cse instructions which define physical registers. Controlled by option -machine-cse-phys-defs. by Evan Cheng · 15 years ago
  75. 7767d27 Add a utility function for conservatively clearing kill flags, and make by Dan Gohman · 15 years ago
  76. 4b2ef56 Rewrite machine cse to avoid recursion. by Evan Cheng · 16 years ago
  77. 4019d57 Typo. by Evan Cheng · 16 years ago
  78. 604bc16 After trivial coalescing, the MI being visited may have become a copy. Avoid adding it to CSE hash table since copies aren't being considered for CSE and they may be deleted. by Evan Cheng · 16 years ago
  79. cf7be39 dbg_value may end a block. by Evan Cheng · 16 years ago
  80. c7d721a Code clean up. by Evan Cheng · 16 years ago
  81. 197bd3e Fix debug_value handling. by Dale Johannesen · 16 years ago
  82. 4c5f7a7 Add a couple more heuristics to neuter machine cse some more. by Evan Cheng · 16 years ago
  83. 5106373 Allow more cross-rc coalescing. by Evan Cheng · 16 years ago
  84. 7c699f9 Don't do illegal cross-class coalescing. by Jakob Stoklund Olesen · 16 years ago
  85. 19e44b4 - Make the machine cse dumb coalescer (as opposed to the more awesome simple by Evan Cheng · 16 years ago
  86. c9e8621 Don't waste time trying to CSE labels, phis, inline asm. Definitely avoid cse implicit-def for obvious performance reason. by Evan Cheng · 16 years ago
  87. 6ec41ee Restrict machine cse to really trivial coalescing. Leave the heavy lifting to a real coalescer. by Evan Cheng · 16 years ago
  88. 0f5f547 Don't update physical register def. by Evan Cheng · 16 years ago
  89. 1abd1a9 Avoid cse load instructions unless they are known to be invariant loads. by Evan Cheng · 16 years ago
  90. 36f8aab Look ahead a bit to determine if a physical register def that is not marked dead is really alive. This is necessary to catch a lot of common cse opportunities for targets like x86. by Evan Cheng · 16 years ago
  91. 2922641 Fix a logic error. An instruction that has a live physical register def cannot be CSE'ed, but it *can* be used to replace a common subexpression. by Evan Cheng · 16 years ago
  92. 0abbb39 Re-apply r97667 but with a little bit of thought put into the patch. This implements a special DenseMapInfo trait for DenseMap<MachineInstr*> that compare the value of the MachineInstr rather than the pointer value. Since the hashing and equality test functions ignore defs it's useful for doing CSE kind optimization. by Evan Cheng · 16 years ago
  93. a791914 Revert 97667. It broke a bunch of tests. by Dan Gohman · 16 years ago
  94. 0dd0c47 Move DenseMapInfo for MachineInstr* to MachineInstr.h by Evan Cheng · 16 years ago
  95. b386cd3 Machine CSE work in progress. It's doing some CSE now. But implicit def of physical registers are getting in the way. by Evan Cheng · 16 years ago
  96. 4eab008 Work in progress. Finding some cse now. by Evan Cheng · 16 years ago
  97. 10194a4 Fix typo. by Evan Cheng · 16 years ago
  98. 036aa49 Add skeleton of a machine level cse pass. by Evan Cheng · 16 years ago