1. 5bfbae5 AMDGPU: Refactor Subtarget classes by Tom Stellard · 7 years ago
  2. c5a154d AMDGPU: Separate R600 and GCN TableGen files by Tom Stellard · 7 years ago
  3. 44b30b4 AMDGPU: Remove #include "MCTargetDesc/AMDGPUMCTargetDesc.h" from common headers by Tom Stellard · 7 years ago
  4. d34e60c Rename DEBUG macro to LLVM_DEBUG. by Nicola Zaghen · 7 years ago
  5. b03c98d AMDGPU: Make getSubRegFromChannel a static member of AMDGPURegisterInfo by Tom Stellard · 7 years ago
  6. f1caa28 MachineFunction: Return reference from getFunction(); NFC by Matthias Braun · 8 years ago
  7. c8fbf6f [AMDGPU] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC). by Eugene Zelenko · 8 years ago
  8. a2f57be AMDGPU/R600: Initialize more passes by Tom Stellard · 8 years ago
  9. 0f5b350 [AMDGPU] Fix -Wimplicit-fallthrough warnings. NFCI. by Simon Pilgrim · 8 years ago
  10. 6bda14b Sort the remaining #include lines in include/... and lib/.... by Chandler Carruth · 8 years ago
  11. 8b61764 [LegacyPassManager] Remove TargetMachine constructors by Francis Visoiu Mistrih · 8 years ago
  12. 734bb7b [AMDGPU] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). by Eugene Zelenko · 9 years ago
  13. 117296c Use StringRef in Pass/PassManager APIs (NFC) by Mehdi Amini · 9 years ago
  14. db53d99 AMDGPU: Avoid looking for the DebugLoc in end() by Duncan P. N. Exon Smith · 9 years ago
  15. 562e829 Use the range variant of find_if instead of unpacking begin/end by David Majnemer · 9 years ago
  16. f9245b7 AMDGPU: Delete more dead code by Matt Arsenault · 9 years ago
  17. 4d29511 AMDGPU: Remove implicit iterator conversions, NFC by Duncan P. N. Exon Smith · 9 years ago
  18. 9cfc75c CodeGen: Use MachineInstr& in TargetInstrInfo, NFC by Duncan P. N. Exon Smith · 9 years ago
  19. 43e92fe AMDGPU: Cleanup subtarget handling. by Matt Arsenault · 9 years ago
  20. 37fefd6 AMDGPU: Fix trailing whitespace by Matt Arsenault · 9 years ago
  21. f97de00 AMDGPU/R600: Implement memory loads from constant AS by Jan Vesely · 9 years ago
  22. 4368c1c AMDGPU/R600: Use machine operands instead of ints to track literals by Jan Vesely · 9 years ago
  23. df3a20c AMDGPU: Add a shader calling convention by Nicolai Haehnle · 10 years ago
  24. f2a0d34 AMDGPU: Fix a use-after free and a missing break by Justin Bogner · 10 years ago
  25. d84f600 CodeGen: Bring back MachineBasicBlock::iterator::getInstrIterator()... by Duncan P. N. Exon Smith · 10 years ago
  26. c5b668d Revert "CodeGen: MachineInstr::getIterator() => getInstrIterator(), NFC" by Duncan P. N. Exon Smith · 10 years ago
  27. da00f2f Update to use new name alignTo(). by Rui Ueyama · 10 years ago
  28. a73371a AMDGPU: Remove implicit ilist iterator conversions, NFC by Duncan P. N. Exon Smith · 10 years ago
  29. 45bb48e R600 -> AMDGPU rename by Tom Stellard · 10 years ago[Renamed from llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp]
  30. 7792e32 Reuse a bunch of cached subtargets and remove getSubtarget calls by Eric Christopher · 11 years ago
  31. c6cc58e Remove unnecessary copying or replace it with moves in a bunch of places. by Benjamin Kramer · 11 years ago
  32. e12a6ba Eliminate some deep std::vector copies. NFC. by Benjamin Kramer · 11 years ago
  33. fc6de42 Have MachineFunction cache a pointer to the subtarget to make lookups by Eric Christopher · 11 years ago
  34. d913448 Remove the TargetMachine forwards for TargetSubtargetInfo based by Eric Christopher · 11 years ago
  35. 762af96 R600: Make ShaderType private by Matt Arsenault · 11 years ago
  36. 2e59a45 R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget by Tom Stellard · 11 years ago
  37. 5656db4 [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. R600 edition by Craig Topper · 11 years ago
  38. 062a2ba [C++] Use 'nullptr'. Target edition. by Craig Topper · 12 years ago
  39. 84e68b2 [Modules] Fix potential ODR violations by sinking the DEBUG_TYPE by Chandler Carruth · 12 years ago
  40. 805890b R600: Correctly handle vertex fetch clauses the precede ENDIFs by Tom Stellard · 12 years ago
  41. 348273d R600: Recommit 199842: Add work-around for the CF stack entry HW bug by Tom Stellard · 12 years ago
  42. 31e1638 Revert "R600: Add work-around for the CF stack entry HW bug" by Tom Stellard · 12 years ago
  43. e89373e R600: Add work-around for the CF stack entry HW bug by Tom Stellard · 12 years ago
  44. a40f971 R600: Refactor stack size calculation by Tom Stellard · 12 years ago
  45. afbb697 R600: CF_PUSH is the same on Evergreen and Cayman by Tom Stellard · 12 years ago
  46. 4b8d9e3 R600: Workaround for cayman loop bug by Vincent Lejeune · 12 years ago
  47. 676c16d R600: Add IsExport bit to TableGen instruction definitions by Tom Stellard · 12 years ago
  48. ac00f9d R600: Change the RAT instruction assembly names so they match the docs by Tom Stellard · 12 years ago
  49. 0344cdf R600: Add 64-bit float load/store support by Tom Stellard · 12 years ago
  50. 0c5ed2b R600: Remove predicated_break inst by Vincent Lejeune · 12 years ago
  51. 8b8a7b5 R600: Don't emit empty then clause and use alu_pop_after by Vincent Lejeune · 12 years ago
  52. 0afd0ab Make some arrays 'static const' by Craig Topper · 12 years ago
  53. ce49974 R600: Do not predicated basic block with multiple alu clause by Vincent Lejeune · 12 years ago
  54. 6aa0d55 R600: Use EXPORT_RAT_INST_STORE_DWORD for stores on Cayman by Tom Stellard · 12 years ago
  55. 4d14332 R600: Anti dep better handled in tex clause by Vincent Lejeune · 12 years ago
  56. a6c6e1b R600: Rework subtarget info and remove AMDILDevice classes by Tom Stellard · 12 years ago
  57. 37e9adb Don't cache the instruction and register info from the TargetMachine, because by Bill Wendling · 12 years ago
  58. eabf83e R600: CALL_FS consumes a stack size entry by Vincent Lejeune · 12 years ago
  59. 1b086cb R600: Fix R600ControlFlowFinalizer not considering VTX_READ 128 bit dst reg by Tom Stellard · 12 years ago
  60. d78bb46 Move passes from namespace llvm into anonymous namespaces. Sort includes while there. by Benjamin Kramer · 12 years ago
  61. 15f193a Setting the default value (fixes CRT assertions about uninitialized variable use when doing debug MSVC builds), and fixing coding style. by Aaron Ballman · 12 years ago
  62. 0fca91d R600: Some factorization by Vincent Lejeune · 12 years ago
  63. f9f4e1e R600: Factorize Fetch size limit inside AMDGPUSubTarget by Vincent Lejeune · 12 years ago
  64. ddd4338 R600: Signed literals are 64bits wide by Vincent Lejeune · 12 years ago
  65. 3abdbf1 R600: use native for alu by Vincent Lejeune · 12 years ago
  66. 7c395f7 R600: Take inner dependency into tex/vtx clauses by Vincent Lejeune · 12 years ago
  67. 3f1d136 R600: Turn TEX/VTX into native instructions by Vincent Lejeune · 12 years ago
  68. c299164 R600: Add FetchInst bit to instruction defs to denote vertex/tex instructions by Vincent Lejeune · 12 years ago
  69. 119ad03 R600: Use correct CF_END instruction on Northern Island GPUs by Tom Stellard · 12 years ago
  70. 117f075 R600: Use .AMDGPU.config section to emit stacksize by Vincent Lejeune · 13 years ago
  71. b6bfe85 R600: Add CF_END by Vincent Lejeune · 13 years ago
  72. 3ee2b1e R600ControlFlowFinalizer.cpp: Fix a warning. [-Wunused-variable] by NAKAMURA Takumi · 13 years ago
  73. 3b0853b Whitespace. by NAKAMURA Takumi · 13 years ago
  74. 04d9aa4 R600: Add VTX_READ_* and RAT_WRITE_CACHELESS_* when computing cf addr by Vincent Lejeune · 13 years ago
  75. 5f11dd3 R600: Control Flow support for pre EG gen by Vincent Lejeune · 13 years ago
  76. 8e377fd R600: Fix wrong address when substituting ENDIF by Vincent Lejeune · 13 years ago
  77. c44fa99 R600: Take export into account when computing cf address by Vincent Lejeune · 13 years ago
  78. b6d6c0d R600: Simplify data structure and add DEBUG to R600ControlFlowFinalizer by Vincent Lejeune · 13 years ago
  79. 9931298 R600: Consider KILLGT as an ALU instruction by Vincent Lejeune · 13 years ago
  80. bfaa63a6 R600: Add support for native control flow by Vincent Lejeune · 13 years ago