Log - eb952fd93b71ecb83b1510c47b00b65ce3d26a26 - toolchain/llvm-project

69e3001 AMDGPU: Fix folding immediates into mac src2 by Matt Arsenault · 9 years ago
51818c1 AMDGPU: Constant fold when immediate is materialized by Matt Arsenault · 9 years ago
4bd7236 AMDGPU: Fix handling of 16-bit immediates by Matt Arsenault · 9 years ago
8485fa0 AMDGPU : Add S_SETREG instructions to fix fdiv precision issues. by Tom Stellard · 9 years ago
ff8bb49 AMDGPU: Refactor immediate folding logic by Matt Arsenault · 9 years ago
a24d84b AMDGPU: Cleanup immediate folding code by Matt Arsenault · 9 years ago
391c3ea AMDGPU: Fix debug printing by Matt Arsenault · 9 years ago
f86e4b7 [AMDGPU] Add f16 support (VI+) by Konstantin Zhuravlyov · 9 years ago
5e63a04 AMDGPU: Don't fold undef uses or copies with implicit uses by Matt Arsenault · 9 years ago
c2ee42c AMDGPU: Remove leftover implicit operands when folding immediates by Matt Arsenault · 9 years ago
117296c Use StringRef in Pass/PassManager APIs (NFC) by Mehdi Amini · 9 years ago
2bc198a AMDGPU: Support folding FrameIndex operands by Matt Arsenault · 9 years ago
fa5f767 AMDGPU: Improve splitting 64-bit bit ops by constants by Matt Arsenault · 9 years ago
3661e90 AMDGPU: Don't fold subregister extracts into tied operands by Matt Arsenault · 9 years ago
9cfc75c CodeGen: Use MachineInstr& in TargetInstrInfo, NFC by Duncan P. N. Exon Smith · 9 years ago
43e92fe AMDGPU: Cleanup subtarget handling. by Matt Arsenault · 9 years ago
7de74af Add optimization bisect opt-in calls for AMDGPU passes by Andrew Kaylor · 10 years ago
427c548 AMDGPU: Fix passes depending on dominator tree for no reason by Matt Arsenault · 10 years ago
926c56f AMDGPU/SI: Fix a bug in SIFoldOperands by Marek Olsak · 10 years ago
82fc962 AMDGPU/SI: Fold operands with sub-registers by Nicolai Haehnle · 10 years ago
e8c0891 AMDGPU: Fix verifier error in SIFoldOperands by Matt Arsenault · 10 years ago
16c4da0 Improved the interface of methods commuting operands, improved X86-FMA3 mem-folding&coalescing. by Andrew Kaylor · 10 years ago
0cb8517 AMDGPU: Fix recomputing dominator tree unnecessarily by Matt Arsenault · 10 years ago
ad46e0c AMDGPU/SI: Fix creating v_mov_b32s without exec uses by Matt Arsenault · 10 years ago
9a19767 AMDGPU/SI: Fold operands through REG_SEQUENCE instructions by Tom Stellard · 10 years ago
eea72cc AMDGPU/SI: Fix some invaild assumptions when folding 64-bit immediates by Tom Stellard · 10 years ago
b8ce14c AMDGPU/SI: Factor operand folding code into its own function by Tom Stellard · 10 years ago
db5a11f AMDGPU/SI: Select mad patterns to v_mac_f32 by Tom Stellard · 10 years ago
45bb48e R600 -> AMDGPU rename by Tom Stellard · 10 years ago[Renamed from llvm/lib/Target/R600/SIFoldOperands.cpp]
d33d7f1 R600/SI: Replace TRI->getRegClass(Reg) with TRI->getPhysRegClass(Reg) by Tom Stellard · 10 years ago
799003b Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used. by Benjamin Kramer · 11 years ago
7b3aa88 R600/SI: Fix asam errors in SIFoldOperands by Tom Stellard · 11 years ago
95546b4 R600/SI: Fix phys reg copies in SIFoldOperands by Matt Arsenault · 11 years ago
11a4d67 R600/SI: Allow f64 inline immediates in i64 operands by Matt Arsenault · 11 years ago
25f61a6 Fix typo by Matt Arsenault · 11 years ago
fb77f00 R600/SI: Add pattern for bitcasting fp immediates to integers by Tom Stellard · 11 years ago
0599297 R600/SI: Commute instructions to enable more folding opportunities by Tom Stellard · 11 years ago
26cc18d R600/SI: Only fold immediates that have one use by Tom Stellard · 11 years ago
4842c05 R600/SI: Add a V_MOV_B64 pseudo instruction by Tom Stellard · 11 years ago
ef3b864 R600/SI: Teach SIFoldOperands to split 64-bit constants when folding by Tom Stellard · 11 years ago
bb763e6 R600/SI: Refactor SIFoldOperands to simplify immediate folding by Tom Stellard · 11 years ago
6596ba7 R600/SI: Add SIFoldOperands pass by Tom Stellard · 11 years ago