arch/arm/boot/dts/msm8910.dtsi - fp2-dev/kernel/msm - Gitiles

 /* Copyright (c) 2012, The Linux Foundation. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 and
  * only version 2 as published by the Free Software Foundation.
  *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  */

 /include/ "skeleton.dtsi"
 /include/ "msm-iommu-v1.dtsi"
 /include/ "msm8910-ion.dtsi"
 /include/ "msm-gdsc.dtsi"

 / {
 	model = "Qualcomm MSM 8910";
 	compatible = "qcom,msm8910";
 	interrupt-parent = <&intc>;

 	intc: interrupt-controller@f9000000 {
 		compatible = "qcom,msm-qgic2";
 		interrupt-controller;
 		#interrupt-cells = <3>;
 		reg = <0xf9000000 0x1000>,
 		      <0xf9002000 0x1000>;
 	};

 	msmgpio: gpio@fd510000 {
 		compatible = "qcom,msm-gpio";
 		interrupt-controller;
 		#interrupt-cells = <2>;
 		reg = <0xfd510000 0x4000>;
 		gpio-controller;
 		#gpio-cells = <2>;
 		interrupts = <0 208 0>;
 	};

 	timer {
 		compatible = "arm,armv7-timer";
 		interrupts = <1 2 0 1 3 0>;
 		clock-frequency = <19200000>;
 	};

 	serial@f991f000 {
 		compatible = "qcom,msm-lsuart-v14";
 		reg = <0xf991f000 0x1000>;
 		interrupts = <0 109 0>;
 		status = "disabled";
 	};

 	usb@f9a55000 {
 		compatible = "qcom,hsusb-otg";
 		reg = <0xf9a55000 0x400>;
 		interrupts = <0 134 0>;
 		interrupt-names = "core_irq";
 		HSUSB_VDDCX-supply = <&pm8110_s1>;
 		HSUSB_1p8-supply = <&pm8110_l10>;
 		HSUSB_3p3-supply = <&pm8110_l20>;

 		qcom,hsusb-otg-phy-type = <2>;
 		qcom,hsusb-otg-mode = <1>;
 		qcom,hsusb-otg-otg-control = <1>;
 		qcom,hsusb-otg-disable-reset;
 	};

 	android_usb {
 		compatible = "qcom,android-usb";
 	};

 	sdcc1: qcom,sdcc@f9824000 {
 		cell-index = <1>; /* SDC1 eMMC slot */
 		compatible = "qcom,msm-sdcc";
 		reg = <0xf9824000 0x800>,
 		      <0xf9824800 0x100>,
 		      <0xf9804000 0x7000>;
 		reg-names = "core_mem", "dml_mem", "bam_mem";
 		interrupts = <0 123 0>, <0 137 0>;
 		interrupt-names = "core_irq", "bam_irq";

 		vdd-supply = <&pm8110_l17>;
 		qcom,vdd-always-on;
 		qcom,vdd-lpm-sup;
 		qcom,vdd-voltage-level = <2900000 2900000>;
 		qcom,vdd-current-level = <9000 400000>;

 		vdd-io-supply = <&pm8110_l6>;
 		qcom,vdd-io-always-on;
 		qcom,vdd-io-lpm-sup;
 		qcom,vdd-io-voltage-level = <1800000 1800000>;
 		qcom,vdd-io-current-level = <9000 60000>;

 		qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
 		qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
 		qcom,pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */
 		qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */

 		qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
 		qcom,sup-voltages = <2900 2900>;
 		qcom,bus-width = <8>;
 		qcom,nonremovable;
 		qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
 	};

 	sdcc2: qcom,sdcc@f98a4000 {
 		cell-index = <2>; /* SDC2 SD card slot */
 		compatible = "qcom,msm-sdcc";
 		reg = <0xf98a4000 0x800>,
 		      <0xf98a4800 0x100>,
 		      <0xf9884000 0x7000>;
 		reg-names = "core_mem", "dml_mem", "bam_mem";
 		interrupts = <0 125 0>, <0 220 0>;
 		interrupt-names = "core_irq", "bam_irq";

 		vdd-supply = <&pm8110_l18>;
 		qcom,vdd-voltage-level = <2950000 2950000>;
 		qcom,vdd-current-level = <9000 400000>;

 		vdd-io-supply = <&pm8110_l21>;
 		qcom,vdd-io-voltage-level = <1800000 2950000>;
 		qcom,vdd-io-current-level = <9000 50000>;

 		qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
 		qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
 		qcom,pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */
 		qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */

 		qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
 		qcom,sup-voltages = <2950 2950>;
 		qcom,bus-width = <4>;
 		qcom,xpc;
 		qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
 		qcom,current-limit = <800>;
 	};

 	qcom,sps {
 		compatible = "qcom,msm_sps";
 		qcom,device-type = <3>;
 	};

 	qcom,smem@d600000 {
 		compatible = "qcom,smem";
 		reg = <0xd600000 0x200000>,
 			<0xfa006000 0x1000>,
 			<0xfc428000 0x4000>;
 		reg-names = "smem", "irq-reg-base", "aux-mem1";

 		qcom,smd-modem {
 			compatible = "qcom,smd";
 			qcom,smd-edge = <0>;
 			qcom,smd-irq-offset = <0x8>;
 			qcom,smd-irq-bitmask = <0x1000>;
 			qcom,pil-string = "modem";
 			interrupts = <0 25 1>;
 		};

 		qcom,smsm-modem {
 			compatible = "qcom,smsm";
 			qcom,smsm-edge = <0>;
 			qcom,smsm-irq-offset = <0x8>;
 			qcom,smsm-irq-bitmask = <0x2000>;
 			interrupts = <0 26 1>;
 		};

 		qcom,smd-adsp {
 			compatible = "qcom,smd";
 			qcom,smd-edge = <1>;
 			qcom,smd-irq-offset = <0x8>;
 			qcom,smd-irq-bitmask = <0x100>;
 			qcom,pil-string = "adsp";
 			interrupts = <0 156 1>;
 		};

 		qcom,smsm-adsp {
 			compatible = "qcom,smsm";
 			qcom,smsm-edge = <1>;
 			qcom,smsm-irq-offset = <0x8>;
 			qcom,smsm-irq-bitmask = <0x200>;
 			interrupts = <0 157 1>;
 		};

 		qcom,smd-wcnss {
 			compatible = "qcom,smd";
 			qcom,smd-edge = <6>;
 			qcom,smd-irq-offset = <0x8>;
 			qcom,smd-irq-bitmask = <0x20000>;
 			qcom,pil-string = "wcnss";
 			interrupts = <0 142 1>;
 		};

 		qcom,smsm-wcnss {
 			compatible = "qcom,smsm";
 			qcom,smsm-edge = <6>;
 			qcom,smsm-irq-offset = <0x8>;
 			qcom,smsm-irq-bitmask = <0x80000>;
 			interrupts = <0 144 1>;
 		};

 		qcom,smd-rpm {
 			compatible = "qcom,smd";
 			qcom,smd-edge = <15>;
 			qcom,smd-irq-offset = <0x8>;
 			qcom,smd-irq-bitmask = <0x1>;
 			interrupts = <0 168 1>;
 			qcom,irq-no-suspend;
 		};
 	};

 	qcom,wdt@f9017000 {
 		compatible = "qcom,msm-watchdog";
 		reg = <0xf9017000 0x1000>;
 		interrupts = <0 3 0>, <0 4 0>;
 		qcom,bark-time = <11000>;
 		qcom,pet-time = <10000>;
 		qcom,ipi-ping;
 	};

 	spmi_bus: qcom,spmi@fc4c0000 {
 		cell-index = <0>;
 		compatible = "qcom,spmi-pmic-arb";
 		reg = <0xfc4cf000 0x1000>,
 		      <0Xfc4cb000 0x1000>;
 		/* 190,ee0_krait_hlos_spmi_periph_irq */
 		/* 187,channel_0_krait_hlos_trans_done_irq */
 		interrupts = <0 190 0>, <0 187 0>;
 		qcom,not-wakeup;
 		qcom,pmic-arb-ee = <0>;
 		qcom,pmic-arb-channel = <0>;
 		qcom,pmic-arb-ppid-map = <0x001000a0>, /* PM8110 */
 					 <0x005000a2>, /* INTERRUPT */
 					 <0x006000a3>, /* SPMI_0 */
 					 <0x00800000>, /* PON0 */
 					 <0x01000002>, /* SMBB_CHG */
 					 <0x01100003>, /* SMBB_BUCK */
 					 <0x01200004>, /* SMBB_BIF */
 					 <0x01300005>, /* SMBB_USB */
 					 <0x01500006>, /* SMBB_BOOST */
 					 <0x01600007>, /* SMBB_MISC */
 					 <0x0280000a>, /* COINCELL */
 					 <0x02c000a5>, /* MBG */
 					 <0x0310000b>, /* VADC1_LC_USR */
 					 <0x03200041>, /* VADC3_LC_MDM */
 					 <0x0330000c>, /* VADC3_LC_BMS */
 					 <0x0340000d>, /* VADC2_LC_BTM */
 					 <0x0360000e>, /* IADC1_USR */
 					 <0x03700042>, /* IADC2_MDM */
 					 <0x0380000f>, /* IADC2_BMS */
 					 <0x04000010>, /* BMS_1 */
 					 <0x050000a6>, /* SHARED_XO */
 					 <0x051000a7>, /* BB_CLK1 */
 					 <0x054000a8>, /* RF_CLK1 */
 					 <0x055000a9>, /* RF_CLK1 */
 					 <0x05a000ab>, /* SLEEP_CLK */
 					 <0x06000043>, /* RTC_RW */
 					 <0x06100011>, /* RTC_ALARM */
 					 <0x070000ac>, /* PBS_CORE */
 					 <0x071000ad>, /* PBS_CLIENT_1 */
 					 <0x072000ae>, /* PBS_CLIENT_2 */
 					 <0x07300013>, /* PBS_CLIENT_3 */
 					 <0x07400044>, /* PBS_CLIENT_4 */
 					 <0x0a000014>, /* MPP_1 */
 					 <0x0a100015>, /* MPP_2 */
 					 <0x0a200016>, /* MPP_3 */
 					 <0x0a300045>, /* MPP_4 */
 					 <0x0c000046>, /* GPIO_1 */
 					 <0x0c1000f0>, /* GPIO_2 */
 					 <0x0c2000af>, /* GPIO_3 */
 					 <0x0c300047>, /* GPIO_4 */
 					 <0x0fe000b0>, /* TRIM_0 */
 					 <0x110000b1>, /* BUCK_CMN_1 */
 					 <0x11400048>, /* SMPS1 */
 					 <0x115000b2>, /* SMPS_1_PS1 */
 					 <0x116000b3>, /* BUCK_FREQ_1 */
 					 <0x11700017>, /* SMPS2 */
 					 <0x11800018>, /* FTPS1_2 */
 					 <0x11900019>, /* BUCK_FREQ_2 */
 					 <0x11a000b4>, /* SMPS3 */
 					 <0x11b000b5>, /* SMPS_3_PS1 */
 					 <0x11c000b6>, /* BUCK_FREQ_3 */
 					 <0x11d000b7>, /* SMPS4 */
 					 <0x11e000b8>, /* SMPS_4_PS1 */
 					 <0x11f000b9>, /* BUCK_FREQ_4 */
 					 <0x140000ba>, /* LDO_1 */
 					 <0x141000bb>, /* LDO_2 */
 					 <0x142000bc>, /* LDO_3 */
 					 <0x143000bd>, /* LDO_4 */
 					 <0x144000be>, /* LDO_5 */
 					 <0x145000bf>, /* LDO_6 */
 					 <0x146000c0>, /* LDO_7 */
 					 <0x147000c1>, /* LDO_8 */
 					 <0x148000c2>, /* LDO_9 */
 					 <0x149000c3>, /* LDO_10 */
 					 <0x14a000c4>, /* LDO_11 */
 					 <0x14b000c5>, /* LDO_12 */
 					 <0x14c000c6>, /* LDO_13 */
 					 <0x14d000c7>, /* LDO_14 */
 					 <0x14e000c8>, /* LDO_15 */
 					 <0x14f000c9>, /* LDO_16 */
 					 <0x150000ca>, /* LDO_17 */
 					 <0x151000cb>, /* LDO_18 */
 					 <0x152000cc>, /* LDO_19 */
 					 <0x153000cd>, /* LDO_20 */
 					 <0x154000ce>, /* LDO_21 */
 					 <0x155000cf>; /* LDO_22 */
 	};

 };

 &gdsc_vfe {
 	status = "ok";
 };

 &gdsc_oxili_cx {
 	status = "ok";
 };

 &lpass_iommu {
 	status = "ok";
 };

 &copss_iommu {
 	status = "ok";
 };

 &mdpe_iommu {
 	status = "ok";
 };

 &mdps_iommu {
 	status = "ok";
 };

 &gfx_iommu {
 	status = "ok";
 };

 &vfe_iommu {
 	status = "ok";
 };

 /include/ "msm8910-regulator.dtsi"
 /include/ "msm-pm8110.dtsi"
	/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
	*
	* This program is free software; you can redistribute it and/or modify
	* it under the terms of the GNU General Public License version 2 and
	* only version 2 as published by the Free Software Foundation.
	*
	* This program is distributed in the hope that it will be useful,
	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	* GNU General Public License for more details.
	*/

	/include/ "skeleton.dtsi"
	/include/ "msm-iommu-v1.dtsi"
	/include/ "msm8910-ion.dtsi"
	/include/ "msm-gdsc.dtsi"

	/ {
	model = "Qualcomm MSM 8910";
	compatible = "qcom,msm8910";
	interrupt-parent = <&intc>;

	intc: interrupt-controller@f9000000 {
	compatible = "qcom,msm-qgic2";
	interrupt-controller;
	#interrupt-cells = <3>;
	reg = <0xf9000000 0x1000>,
	<0xf9002000 0x1000>;
	};

	msmgpio: gpio@fd510000 {
	compatible = "qcom,msm-gpio";
	interrupt-controller;
	#interrupt-cells = <2>;
	reg = <0xfd510000 0x4000>;
	gpio-controller;
	#gpio-cells = <2>;
	interrupts = <0 208 0>;
	};

	timer {
	compatible = "arm,armv7-timer";
	interrupts = <1 2 0 1 3 0>;
	clock-frequency = <19200000>;
	};

	serial@f991f000 {
	compatible = "qcom,msm-lsuart-v14";
	reg = <0xf991f000 0x1000>;
	interrupts = <0 109 0>;
	status = "disabled";
	};

	usb@f9a55000 {
	compatible = "qcom,hsusb-otg";
	reg = <0xf9a55000 0x400>;
	interrupts = <0 134 0>;
	interrupt-names = "core_irq";
	HSUSB_VDDCX-supply = <&pm8110_s1>;
	HSUSB_1p8-supply = <&pm8110_l10>;
	HSUSB_3p3-supply = <&pm8110_l20>;

	qcom,hsusb-otg-phy-type = <2>;
	qcom,hsusb-otg-mode = <1>;
	qcom,hsusb-otg-otg-control = <1>;
	qcom,hsusb-otg-disable-reset;
	};

	android_usb {
	compatible = "qcom,android-usb";
	};

	sdcc1: qcom,sdcc@f9824000 {
	cell-index = <1>; /* SDC1 eMMC slot */
	compatible = "qcom,msm-sdcc";
	reg = <0xf9824000 0x800>,
	<0xf9824800 0x100>,
	<0xf9804000 0x7000>;
	reg-names = "core_mem", "dml_mem", "bam_mem";
	interrupts = <0 123 0>, <0 137 0>;
	interrupt-names = "core_irq", "bam_irq";

	vdd-supply = <&pm8110_l17>;
	qcom,vdd-always-on;
	qcom,vdd-lpm-sup;
	qcom,vdd-voltage-level = <2900000 2900000>;
	qcom,vdd-current-level = <9000 400000>;

	vdd-io-supply = <&pm8110_l6>;
	qcom,vdd-io-always-on;
	qcom,vdd-io-lpm-sup;
	qcom,vdd-io-voltage-level = <1800000 1800000>;
	qcom,vdd-io-current-level = <9000 60000>;

	qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
	qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
	qcom,pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */
	qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */

	qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
	qcom,sup-voltages = <2900 2900>;
	qcom,bus-width = <8>;
	qcom,nonremovable;
	qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
	};

	sdcc2: qcom,sdcc@f98a4000 {
	cell-index = <2>; /* SDC2 SD card slot */
	compatible = "qcom,msm-sdcc";
	reg = <0xf98a4000 0x800>,
	<0xf98a4800 0x100>,
	<0xf9884000 0x7000>;
	reg-names = "core_mem", "dml_mem", "bam_mem";
	interrupts = <0 125 0>, <0 220 0>;
	interrupt-names = "core_irq", "bam_irq";

	vdd-supply = <&pm8110_l18>;
	qcom,vdd-voltage-level = <2950000 2950000>;
	qcom,vdd-current-level = <9000 400000>;

	vdd-io-supply = <&pm8110_l21>;
	qcom,vdd-io-voltage-level = <1800000 2950000>;
	qcom,vdd-io-current-level = <9000 50000>;

	qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
	qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
	qcom,pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */
	qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */

	qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
	qcom,sup-voltages = <2950 2950>;
	qcom,bus-width = <4>;
	qcom,xpc;
	qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
	qcom,current-limit = <800>;
	};

	qcom,sps {
	compatible = "qcom,msm_sps";
	qcom,device-type = <3>;
	};

	qcom,smem@d600000 {
	compatible = "qcom,smem";
	reg = <0xd600000 0x200000>,
	<0xfa006000 0x1000>,
	<0xfc428000 0x4000>;
	reg-names = "smem", "irq-reg-base", "aux-mem1";

	qcom,smd-modem {
	compatible = "qcom,smd";
	qcom,smd-edge = <0>;
	qcom,smd-irq-offset = <0x8>;
	qcom,smd-irq-bitmask = <0x1000>;
	qcom,pil-string = "modem";
	interrupts = <0 25 1>;
	};

	qcom,smsm-modem {
	compatible = "qcom,smsm";
	qcom,smsm-edge = <0>;
	qcom,smsm-irq-offset = <0x8>;
	qcom,smsm-irq-bitmask = <0x2000>;
	interrupts = <0 26 1>;
	};

	qcom,smd-adsp {
	compatible = "qcom,smd";
	qcom,smd-edge = <1>;
	qcom,smd-irq-offset = <0x8>;
	qcom,smd-irq-bitmask = <0x100>;
	qcom,pil-string = "adsp";
	interrupts = <0 156 1>;
	};

	qcom,smsm-adsp {
	compatible = "qcom,smsm";
	qcom,smsm-edge = <1>;
	qcom,smsm-irq-offset = <0x8>;
	qcom,smsm-irq-bitmask = <0x200>;
	interrupts = <0 157 1>;
	};

	qcom,smd-wcnss {
	compatible = "qcom,smd";
	qcom,smd-edge = <6>;
	qcom,smd-irq-offset = <0x8>;
	qcom,smd-irq-bitmask = <0x20000>;
	qcom,pil-string = "wcnss";
	interrupts = <0 142 1>;
	};

	qcom,smsm-wcnss {
	compatible = "qcom,smsm";
	qcom,smsm-edge = <6>;
	qcom,smsm-irq-offset = <0x8>;
	qcom,smsm-irq-bitmask = <0x80000>;
	interrupts = <0 144 1>;
	};

	qcom,smd-rpm {
	compatible = "qcom,smd";
	qcom,smd-edge = <15>;
	qcom,smd-irq-offset = <0x8>;
	qcom,smd-irq-bitmask = <0x1>;
	interrupts = <0 168 1>;
	qcom,irq-no-suspend;
	};
	};

	qcom,wdt@f9017000 {
	compatible = "qcom,msm-watchdog";
	reg = <0xf9017000 0x1000>;
	interrupts = <0 3 0>, <0 4 0>;
	qcom,bark-time = <11000>;
	qcom,pet-time = <10000>;
	qcom,ipi-ping;
	};

	spmi_bus: qcom,spmi@fc4c0000 {
	cell-index = <0>;
	compatible = "qcom,spmi-pmic-arb";
	reg = <0xfc4cf000 0x1000>,
	<0Xfc4cb000 0x1000>;
	/* 190,ee0_krait_hlos_spmi_periph_irq */
	/* 187,channel_0_krait_hlos_trans_done_irq */
	interrupts = <0 190 0>, <0 187 0>;
	qcom,not-wakeup;
	qcom,pmic-arb-ee = <0>;
	qcom,pmic-arb-channel = <0>;
	qcom,pmic-arb-ppid-map = <0x001000a0>, /* PM8110 */
	<0x005000a2>, /* INTERRUPT */
	<0x006000a3>, /* SPMI_0 */
	<0x00800000>, /* PON0 */
	<0x01000002>, /* SMBB_CHG */
	<0x01100003>, /* SMBB_BUCK */
	<0x01200004>, /* SMBB_BIF */
	<0x01300005>, /* SMBB_USB */
	<0x01500006>, /* SMBB_BOOST */
	<0x01600007>, /* SMBB_MISC */
	<0x0280000a>, /* COINCELL */
	<0x02c000a5>, /* MBG */
	<0x0310000b>, /* VADC1_LC_USR */
	<0x03200041>, /* VADC3_LC_MDM */
	<0x0330000c>, /* VADC3_LC_BMS */
	<0x0340000d>, /* VADC2_LC_BTM */
	<0x0360000e>, /* IADC1_USR */
	<0x03700042>, /* IADC2_MDM */
	<0x0380000f>, /* IADC2_BMS */
	<0x04000010>, /* BMS_1 */
	<0x050000a6>, /* SHARED_XO */
	<0x051000a7>, /* BB_CLK1 */
	<0x054000a8>, /* RF_CLK1 */
	<0x055000a9>, /* RF_CLK1 */
	<0x05a000ab>, /* SLEEP_CLK */
	<0x06000043>, /* RTC_RW */
	<0x06100011>, /* RTC_ALARM */
	<0x070000ac>, /* PBS_CORE */
	<0x071000ad>, /* PBS_CLIENT_1 */
	<0x072000ae>, /* PBS_CLIENT_2 */
	<0x07300013>, /* PBS_CLIENT_3 */
	<0x07400044>, /* PBS_CLIENT_4 */
	<0x0a000014>, /* MPP_1 */
	<0x0a100015>, /* MPP_2 */
	<0x0a200016>, /* MPP_3 */
	<0x0a300045>, /* MPP_4 */
	<0x0c000046>, /* GPIO_1 */
	<0x0c1000f0>, /* GPIO_2 */
	<0x0c2000af>, /* GPIO_3 */
	<0x0c300047>, /* GPIO_4 */
	<0x0fe000b0>, /* TRIM_0 */
	<0x110000b1>, /* BUCK_CMN_1 */
	<0x11400048>, /* SMPS1 */
	<0x115000b2>, /* SMPS_1_PS1 */
	<0x116000b3>, /* BUCK_FREQ_1 */
	<0x11700017>, /* SMPS2 */
	<0x11800018>, /* FTPS1_2 */
	<0x11900019>, /* BUCK_FREQ_2 */
	<0x11a000b4>, /* SMPS3 */
	<0x11b000b5>, /* SMPS_3_PS1 */
	<0x11c000b6>, /* BUCK_FREQ_3 */
	<0x11d000b7>, /* SMPS4 */
	<0x11e000b8>, /* SMPS_4_PS1 */
	<0x11f000b9>, /* BUCK_FREQ_4 */
	<0x140000ba>, /* LDO_1 */
	<0x141000bb>, /* LDO_2 */
	<0x142000bc>, /* LDO_3 */
	<0x143000bd>, /* LDO_4 */
	<0x144000be>, /* LDO_5 */
	<0x145000bf>, /* LDO_6 */
	<0x146000c0>, /* LDO_7 */
	<0x147000c1>, /* LDO_8 */
	<0x148000c2>, /* LDO_9 */
	<0x149000c3>, /* LDO_10 */
	<0x14a000c4>, /* LDO_11 */
	<0x14b000c5>, /* LDO_12 */
	<0x14c000c6>, /* LDO_13 */
	<0x14d000c7>, /* LDO_14 */
	<0x14e000c8>, /* LDO_15 */
	<0x14f000c9>, /* LDO_16 */
	<0x150000ca>, /* LDO_17 */
	<0x151000cb>, /* LDO_18 */
	<0x152000cc>, /* LDO_19 */
	<0x153000cd>, /* LDO_20 */
	<0x154000ce>, /* LDO_21 */
	<0x155000cf>; /* LDO_22 */
	};

	};

	&gdsc_vfe {
	status = "ok";
	};

	&gdsc_oxili_cx {
	status = "ok";
	};

	&lpass_iommu {
	status = "ok";
	};

	&copss_iommu {
	status = "ok";
	};

	&mdpe_iommu {
	status = "ok";
	};

	&mdps_iommu {
	status = "ok";
	};

	&gfx_iommu {
	status = "ok";
	};

	&vfe_iommu {
	status = "ok";
	};

	/include/ "msm8910-regulator.dtsi"
	/include/ "msm-pm8110.dtsi"