| MSM SoC HSUSB controllers |
| |
| OTG: |
| |
| Required properties : |
| - compatible : should be "qcom,hsusb-otg" |
| - regs : offset and length of the register set in the memory map |
| - interrupts: IRQ line |
| - interrupt-names: OTG interrupt name(s) referenced in interrupts above |
| HSUSB OTG expects "core_irq" which is IRQ line from CORE and |
| optional ones are described in next section. |
| - qcom,hsusb-otg-phy-type: PHY type can be one of |
| 1 - Chipidea 45nm PHY |
| 2 - Synopsis 28nm PHY |
| - qcom,hsusb-otg-mode: Operational mode. Can be one of |
| 1 - Peripheral only mode |
| 2 - Host only mode |
| 3 - OTG mode |
| Based on the mode, OTG driver registers platform devices for |
| gadget and host. |
| - qcom,hsusb-otg-control: OTG control (VBUS and ID notifications) |
| can be one of |
| 1 - PHY control |
| 2 - PMIC control |
| 3 - User control (via debugfs) |
| - <supply-name>-supply: handle to the regulator device tree node |
| Required "supply-name" is "HSUSB_VDDCX" (when voting for VDDCX) or |
| "hsusb_vdd_dig" (when voting for VDDCX Corner voltage), |
| "HSUSB_1p8-supply" and "HSUSB_3p3-supply". |
| |
| Optional properties : |
| - interrupt-names : Optional interrupt resource entries are: |
| "async_irq" : Interrupt from HSPHY for asynchronous wakeup events in LPM. |
| "pmic_id_irq" : Interrupt from PMIC for external ID pin notification. |
| - qcom,hsusb-otg-disable-reset: If present then core is RESET only during |
| init, otherwise core is RESET for every cable disconnect as well |
| - qcom,hsusb-otg-pnoc-errata-fix: If present then workaround for PNOC |
| performance issue is applied which requires changing the mem-type |
| attribute via VMIDMT. |
| - qcom,hsusb-otg-default-mode: The default USB mode after boot-up. |
| Applicable only when OTG is controlled by user. Can be one of |
| 0 - None. Low power mode |
| 1 - Peripheral |
| 2 - Host |
| - qcom,hsusb-otg-phy-init-seq: PHY configuration sequence. val, reg pairs |
| terminate with -1 |
| - qcom,hsusb-otg-power-budget: VBUS power budget in mA |
| 0 will be treated as 500mA |
| - qcom,hsusb-otg-pclk-src-name: The source of pclk |
| - Refer to "Documentation/devicetree/bindings/arm/msm/msm_bus.txt" for |
| below optional properties: |
| - qcom,msm_bus,name |
| - qcom,msm_bus,num_cases |
| - qcom,msm_bus,active_only |
| - qcom,msm_bus,num_paths |
| - qcom,msm_bus,vectors |
| - qcom,hsusb-otg-lpm-on-dev-suspend: If present then USB enter to |
| low power mode upon receiving bus suspend. |
| - qcom,hsusb-otg-clk-always-on-workaround: If present then USB core clocks |
| remain active upon receiving bus suspend and USB cable is connected. |
| Used for allowing USB to respond for remote wakup. |
| - qcom,hsusb-otg-delay-lpm: If present then USB core will wait one second |
| after disconnect before entering low power mode. |
| - qcom,hsusb-otg-delay-lpm-hndshk-on-disconnect: If present then USB core will |
| wait for the handshake with the IPA to complete before entering low |
| power mode. |
| - <supply-name>-supply: handle to the regulator device tree node. |
| Optional "supply-name" is "vbus_otg" to supply vbus in host mode. |
| - qcom,vdd-voltage-level: This property must be a list of three integer |
| values (no, min, max) where each value represents either a voltage |
| in microvolts or a value corresponding to voltage corner. |
| - qcom,dp-manual-pullup: If present, vbus is not routed to USB controller/phy |
| and controller driver therefore enables pull-up explicitly before |
| starting controller using usbcmd run/stop bit. |
| - qcom,usb2-enable-hsphy2: If present then USB2 controller is connected to 2nd |
| HSPHY. |
| - qcom,hsusb-log2-itc: value of 2^(log2_itc-1) will be used as the |
| interrupt threshold (ITC), when log2_itc is between 1 to 7. |
| - qcom,hsusb-l1-supported: If present, the device supports l1 (Link power |
| management). |
| |
| Example HSUSB OTG controller device node : |
| usb@f9690000 { |
| compatible = "qcom,hsusb-otg"; |
| reg = <0xf9690000 0x400>; |
| interrupts = <134>; |
| interrupt-names = "core_irq"; |
| |
| qcom,hsusb-otg-phy-type = <2>; |
| qcom,hsusb-otg-mode = <1>; |
| qcom,hsusb-otg-otg-control = <1>; |
| qcom,hsusb-otg-disable-reset; |
| qcom,hsusb-otg-pnoc-errata-fix; |
| qcom,hsusb-otg-default-mode = <2>; |
| qcom,hsusb-otg-phy-init-seq = <0x01 0x90 0xffffffff>; |
| qcom,hsusb-otg-power-budget = <500>; |
| qcom,hsusb-otg-pclk-src-name = "dfab_usb_clk"; |
| qcom,hsusb-otg-lpm-on-dev-suspend; |
| qcom,hsusb-otg-clk-always-on-workaround; |
| hsusb_vdd_dig-supply = <&pm8226_s1_corner>; |
| HSUSB_1p8-supply = <&pm8226_l10>; |
| HSUSB_3p3-supply = <&pm8226_l20>; |
| qcom,vdd-voltage-level = <1 5 7>; |
| qcom,dp-manual-pullup; |
| qcom,msm_bus,name = "usb2"; |
| qcom,msm_bus,num_cases = <2>; |
| qcom,msm_bus,active_only = <0>; |
| qcom,msm_bus,num_paths = <1>; |
| qcom,msm_bus,vectors = |
| <87 512 0 0>, |
| <87 512 60000000 960000000>; |
| }; |
| |
| MSM HSUSB EHCI controller |
| |
| Required properties : |
| - compatible : should be "qcom,ehci-host" |
| - reg : offset and length of the register set in the memory map |
| - interrupts: IRQ lines used by this controller |
| - interrupt-names : Required interrupt resource entries are: |
| HSUSB EHCI expects "core_irq" and optionally "async_irq". |
| - <supply-name>-supply: handle to the regulator device tree node |
| Required "supply-name" is "HSUSB_VDDCX" "HSUSB_1p8-supply" "HSUSB_3p3-supply". |
| - qcom,usb2-power-budget: maximum vbus power (in mA) that can be provided. |
| |
| Optional properties : |
| - qcom,usb2-enable-hsphy2: If present, select second PHY for USB operation. |
| |
| Example MSM HSUSB EHCI controller device node : |
| ehci: qcom,ehci-host@f9a55000 { |
| compatible = "qcom,ehci-host"; |
| reg = <0xf9a55000 0x400>; |
| interrupts = <0 134 0>, <0 140 0>; |
| interrupt-names = "core_irq", "async_irq"; |
| HSUSB_VDDCX-supply = <&pm8841_s2>; |
| HSUSB_1p8-supply = <&pm8941_l6>; |
| HSUSB_3p3-supply = <&pm8941_l24>; |
| qcom,usb2-enable-hsphy2; |
| qcom,usb2-power-budget = <500>; |
| }; |
| |
| ANDROID USB: |
| |
| Required properties: |
| - compatible: should be "qcom,android-usb" |
| |
| Optional properties : |
| - reg : offset and length of memory region that is used by device to |
| update USB PID and serial numbers used by bootloader in DLOAD mode. |
| - qcom,android-usb-swfi-latency : value to be used by device to vote |
| for DMA latency in microsecs. |
| - qcom,android-usb-cdrom : if this property is present then device creates |
| a new LUN as CD-ROM |
| |
| Example Android USB device node : |
| android_usb@fc42b0c8 { |
| compatible = "qcom,android-usb"; |
| reg = <0xfc42b0c8 0xc8>; |
| qcom,android-usb-swfi-latency = <1>; |
| }; |
| |
| |
| BAM: |
| |
| Required properties: |
| - compatible: should be "qcom,usb-bam-msm" |
| - reg : pairs of physical base addresses and region sizes |
| of all the memory mapped BAM devices present |
| - reg-names : Register region name(s), in 1-1 correspondence with the |
| registers in 'reg'. This list should contain at least as many names |
| as the number of unique values given in both 'usb-active-bam' and |
| all the subnodes' 'usb-bam-type' properties. |
| |
| If SSUSB_BAM is used, "ssusb" should be present. |
| If HSUSB_BAM is used, "hsusb" should be present. |
| If HSIC_BAM is used, "hsic" should be present. |
| |
| If a QSCRATCH RAM1 register is designated for providing USB3 |
| private memory to use as a BAM FIFO, specify "qscratch_ram1_reg". |
| - interrupts: IRQ lines for BAM devices |
| - interrupt-names: BAM interrupt name(s), in 1-1 correspondence with |
| 'interrupts' above. |
| |
| If SSUSB_BAM is used, "ssusb" should be present. |
| If HSUSB_BAM is used, "hsusb" should be present. |
| If HSIC_BAM is used, "hsic" should be present. |
| - qcom,usb-bam-num-pipes: max number of pipes that can be used |
| |
| Optional properties: |
| - qcom,usb-bam-fifo-baseaddr: base address for bam pipe's data and descriptor |
| fifos. This can be on chip memory (ocimem) or usb private memory. This |
| property is required if sub-node's mem-type is ocimem or usb private mem. |
| |
| A number of USB BAM pipe parameters are represented as sub-nodes: |
| |
| Subnode Required: |
| - label: a string describing uniquely the usb bam pipe. The string can be |
| constracted as follows: <core>-<peer>-<direction>-<pipe num>. |
| core options: hsusb, ssusb/dwc3, hsic |
| peer options: qdss, ipa, a2 |
| direction options: in (from peer to usb), out (from usb to peer) |
| pipe num options: 0..127 |
| - qcom,usb-bam-mem-type: Type of memory used by this PIPE. Can be one of |
| 0 - Uses SPS's dedicated pipe memory |
| 1 - USB's private memory residing @ 'qcom,usb-bam-fifo-baseaddr' |
| 2 - System RAM allocated by driver |
| 3 - OCI memory residing @ 'qcom,usb-bam-fifo-baseaddr' |
| - qcom,bam-type: BAM type can be one of |
| 0 - SSUSB_BAM |
| 1 - HSUSB_BAM |
| 2 - HSIC_BAM |
| - qcom,dir: pipe direction |
| 0 - from usb (out) |
| 1 - to usb (in) |
| - qcom,pipe-num: pipe number |
| - qcom,peer-bam: peer BAM can be one of |
| 0 - A2_P_BAM |
| 1 - QDSS_P_BAM |
| 2 - IPA_P_BAM |
| - qcom,data-fifo-size: data fifo size |
| - qcom,descriptor-fifo-size: descriptor fifo size |
| |
| Optional Properties for Subnode: |
| - qcom,reset-bam-on-connect: If present then BAM is RESET before connecting |
| pipe. This may be required if BAM peripheral is also reset before connect. |
| - qcom,dst-bam-physical-address: destination BAM physical address |
| - qcom,dst-bam-pipe-index: destination BAM pipe index |
| - qcom,src-bam-physical-address: source BAM physical address |
| - qcom,src-bam-pipe-index: source BAM pipe index |
| - qcom,data-fifo-offset: data fifo offset address |
| - qcom,descriptor-fifo-offset: descriptor fifo offset address |
| |
| Optional properties : |
| - qcom,ignore-core-reset-ack: If present then BAM ignores ACK from USB core |
| while performing PIPE RESET |
| - qcom,disable-clk-gating: If present then disable BAM clock gating. |
| |
| Example USB BAM controller device node: |
| |
| qcom,usbbam@f9a44000 { |
| compatible = "qcom,usb-bam-msm"; |
| reg = <0xf9a44000 0x11000>; |
| reg-names = "hsusb"; |
| interrupts = <0 135 0>; |
| interrupt-names = "hsusb"; |
| qcom,usb-bam-num-pipes = <16>; |
| qcom,ignore-core-reset-ack; |
| qcom,disable-clk-gating; |
| |
| qcom,pipe0 { |
| label = "hsusb-ipa-out-0"; |
| qcom,usb-bam-mem-type = <0>; |
| qcom,bam-type = <1>; |
| qcom,dir = <0>; |
| qcom,pipe-num = <0>; |
| qcom,peer-bam = <2>; |
| qcom,src-bam-physical-address = <0xf9a44000>; |
| qcom,src-bam-pipe-index = <1>; |
| qcom,data-fifo-offset = <0x2200>; |
| qcom,data-fifo-size = <0x1e00>; |
| qcom,descriptor-fifo-offset = <0x2100>; |
| qcom,descriptor-fifo-size = <0x100>; |
| }; |
| qcom,pipe1 { |
| label = "hsusb-ipa-in-0"; |
| qcom,usb-bam-mem-type = <0>; |
| qcom,bam-type = <1>; |
| qcom,dir = <1>; |
| qcom,pipe-num = <0>; |
| qcom,peer-bam = <2>; |
| qcom,dst-bam-physical-address = <0xf9a44000>; |
| qcom,dst-bam-pipe-index = <0>; |
| qcom,data-fifo-offset = <0x300>; |
| qcom,data-fifo-size = <0x1e00>; |
| qcom,descriptor-fifo-offset = <0>; |
| qcom,descriptor-fifo-size = <0x300>; |
| }; |
| }; |