Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Digi RightSwitch SE-X loadable device driver for Linux |
| 3 | * |
| 4 | * The RightSwitch is a 4 (EISA) or 6 (PCI) port etherswitch and |
| 5 | * a NIC on an internal board. |
| 6 | * |
| 7 | * Author: Rick Richardson, rick@remotepoint.com |
| 8 | * Derived from the SVR4.2 (UnixWare) driver for the same card. |
| 9 | * |
| 10 | * Copyright 1995-1996 Digi International Inc. |
| 11 | * |
| 12 | * This software may be used and distributed according to the terms |
| 13 | * of the GNU General Public License, incorporated herein by reference. |
| 14 | * |
| 15 | * For information on purchasing a RightSwitch SE-4 or SE-6 |
| 16 | * board, please contact Digi's sales department at 1-612-912-3444 |
| 17 | * or 1-800-DIGIBRD. Outside the U.S., please check our Web page |
| 18 | * at http://www.dgii.com for sales offices worldwide. |
| 19 | * |
| 20 | * OPERATION: |
| 21 | * When compiled as a loadable module, this driver can operate |
| 22 | * the board as either a 4/6 port switch with a 5th or 7th port |
| 23 | * that is a conventional NIC interface as far as the host is |
| 24 | * concerned, OR as 4/6 independent NICs. To select multi-NIC |
| 25 | * mode, add "nicmode=1" on the insmod load line for the driver. |
| 26 | * |
| 27 | * This driver uses the "dev" common ethernet device structure |
| 28 | * and a private "priv" (dev->priv) structure that contains |
| 29 | * mostly DGRS-specific information and statistics. To keep |
| 30 | * the code for both the switch mode and the multi-NIC mode |
| 31 | * as similar as possible, I have introduced the concept of |
| 32 | * "dev0"/"priv0" and "devN"/"privN" pointer pairs in subroutines |
| 33 | * where needed. The first pair of pointers points to the |
| 34 | * "dev" and "priv" structures of the zeroth (0th) device |
| 35 | * interface associated with a board. The second pair of |
| 36 | * pointers points to the current (Nth) device interface |
| 37 | * for the board: the one for which we are processing data. |
| 38 | * |
| 39 | * In switch mode, the pairs of pointers are always the same, |
| 40 | * that is, dev0 == devN and priv0 == privN. This is just |
| 41 | * like previous releases of this driver which did not support |
| 42 | * NIC mode. |
| 43 | * |
| 44 | * In multi-NIC mode, the pairs of pointers may be different. |
| 45 | * We use the devN and privN pointers to reference just the |
| 46 | * name, port number, and statistics for the current interface. |
| 47 | * We use the dev0 and priv0 pointers to access the variables |
| 48 | * that control access to the board, such as board address |
| 49 | * and simulated 82596 variables. This is because there is |
| 50 | * only one "fake" 82596 that serves as the interface to |
| 51 | * the board. We do not want to try to keep the variables |
| 52 | * associated with this 82596 in sync across all devices. |
| 53 | * |
| 54 | * This scheme works well. As you will see, except for |
| 55 | * initialization, there is very little difference between |
| 56 | * the two modes as far as this driver is concerned. On the |
| 57 | * receive side in NIC mode, the interrupt *always* comes in on |
| 58 | * the 0th interface (dev0/priv0). We then figure out which |
| 59 | * real 82596 port it came in on from looking at the "chan" |
| 60 | * member that the board firmware adds at the end of each |
| 61 | * RBD (a.k.a. TBD). We get the channel number like this: |
| 62 | * int chan = ((I596_RBD *) S2H(cbp->xmit.tbdp))->chan; |
| 63 | * |
| 64 | * On the transmit side in multi-NIC mode, we specify the |
| 65 | * output 82596 port by setting the new "dstchan" structure |
| 66 | * member that is at the end of the RFD, like this: |
| 67 | * priv0->rfdp->dstchan = privN->chan; |
| 68 | * |
| 69 | * TODO: |
| 70 | * - Multi-NIC mode is not yet supported when the driver is linked |
| 71 | * into the kernel. |
| 72 | * - Better handling of multicast addresses. |
| 73 | * |
| 74 | * Fixes: |
| 75 | * Arnaldo Carvalho de Melo <acme@conectiva.com.br> - 11/01/2001 |
| 76 | * - fix dgrs_found_device wrt checking kmalloc return and |
| 77 | * rollbacking the partial steps of the whole process when |
| 78 | * one of the devices can't be allocated. Fix SET_MODULE_OWNER |
| 79 | * on the loop to use devN instead of repeated calls to dev. |
| 80 | * |
| 81 | * davej <davej@suse.de> - 9/2/2001 |
| 82 | * - Enable PCI device before reading ioaddr/irq |
| 83 | * |
| 84 | */ |
| 85 | |
| 86 | #include <linux/module.h> |
| 87 | #include <linux/eisa.h> |
| 88 | #include <linux/kernel.h> |
| 89 | #include <linux/string.h> |
| 90 | #include <linux/delay.h> |
| 91 | #include <linux/errno.h> |
| 92 | #include <linux/ioport.h> |
| 93 | #include <linux/slab.h> |
| 94 | #include <linux/interrupt.h> |
| 95 | #include <linux/pci.h> |
| 96 | #include <linux/init.h> |
| 97 | #include <linux/netdevice.h> |
| 98 | #include <linux/etherdevice.h> |
| 99 | #include <linux/skbuff.h> |
| 100 | #include <linux/bitops.h> |
| 101 | |
| 102 | #include <asm/io.h> |
| 103 | #include <asm/byteorder.h> |
| 104 | #include <asm/uaccess.h> |
| 105 | |
| 106 | static char version[] __initdata = |
| 107 | "$Id: dgrs.c,v 1.13 2000/06/06 04:07:00 rick Exp $"; |
| 108 | |
| 109 | /* |
| 110 | * DGRS include files |
| 111 | */ |
| 112 | typedef unsigned char uchar; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 113 | #define vol volatile |
| 114 | |
| 115 | #include "dgrs.h" |
| 116 | #include "dgrs_es4h.h" |
| 117 | #include "dgrs_plx9060.h" |
| 118 | #include "dgrs_i82596.h" |
| 119 | #include "dgrs_ether.h" |
| 120 | #include "dgrs_asstruct.h" |
| 121 | #include "dgrs_bcomm.h" |
| 122 | |
| 123 | #ifdef CONFIG_PCI |
| 124 | static struct pci_device_id dgrs_pci_tbl[] = { |
| 125 | { SE6_PCI_VENDOR_ID, SE6_PCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID, }, |
| 126 | { } /* Terminating entry */ |
| 127 | }; |
| 128 | MODULE_DEVICE_TABLE(pci, dgrs_pci_tbl); |
| 129 | #endif |
| 130 | |
| 131 | #ifdef CONFIG_EISA |
| 132 | static struct eisa_device_id dgrs_eisa_tbl[] = { |
| 133 | { "DBI0A01" }, |
| 134 | { } |
| 135 | }; |
| 136 | MODULE_DEVICE_TABLE(eisa, dgrs_eisa_tbl); |
| 137 | #endif |
| 138 | |
| 139 | MODULE_LICENSE("GPL"); |
| 140 | |
| 141 | |
| 142 | /* |
| 143 | * Firmware. Compiled separately for local compilation, |
| 144 | * but #included for Linux distribution. |
| 145 | */ |
| 146 | #ifndef NOFW |
| 147 | #include "dgrs_firmware.c" |
| 148 | #else |
| 149 | extern int dgrs_firmnum; |
| 150 | extern char dgrs_firmver[]; |
| 151 | extern char dgrs_firmdate[]; |
| 152 | extern uchar dgrs_code[]; |
| 153 | extern int dgrs_ncode; |
| 154 | #endif |
| 155 | |
| 156 | /* |
| 157 | * Linux out*() is backwards from all other operating systems |
| 158 | */ |
| 159 | #define OUTB(ADDR, VAL) outb(VAL, ADDR) |
| 160 | #define OUTW(ADDR, VAL) outw(VAL, ADDR) |
| 161 | #define OUTL(ADDR, VAL) outl(VAL, ADDR) |
| 162 | |
| 163 | /* |
| 164 | * Macros to convert switch to host and host to switch addresses |
| 165 | * (assumes a local variable priv points to board dependent struct) |
| 166 | */ |
| 167 | #define S2H(A) ( ((unsigned long)(A)&0x00ffffff) + priv0->vmem ) |
| 168 | #define S2HN(A) ( ((unsigned long)(A)&0x00ffffff) + privN->vmem ) |
| 169 | #define H2S(A) ( ((char *) (A) - priv0->vmem) + 0xA3000000 ) |
| 170 | |
| 171 | /* |
| 172 | * Convert a switch address to a "safe" address for use with the |
| 173 | * PLX 9060 DMA registers and the associated HW kludge that allows |
| 174 | * for host access of the DMA registers. |
| 175 | */ |
| 176 | #define S2DMA(A) ( (unsigned long)(A) & 0x00ffffff) |
| 177 | |
| 178 | /* |
| 179 | * "Space.c" variables, now settable from module interface |
| 180 | * Use the name below, minus the "dgrs_" prefix. See init_module(). |
| 181 | */ |
| 182 | static int dgrs_debug = 1; |
| 183 | static int dgrs_dma = 1; |
| 184 | static int dgrs_spantree = -1; |
| 185 | static int dgrs_hashexpire = -1; |
| 186 | static uchar dgrs_ipaddr[4] = { 0xff, 0xff, 0xff, 0xff}; |
| 187 | static uchar dgrs_iptrap[4] = { 0xff, 0xff, 0xff, 0xff}; |
| 188 | static __u32 dgrs_ipxnet = -1; |
| 189 | static int dgrs_nicmode; |
| 190 | |
| 191 | /* |
| 192 | * Private per-board data structure (dev->priv) |
| 193 | */ |
| 194 | typedef struct |
| 195 | { |
| 196 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 197 | * DGRS specific data |
| 198 | */ |
| 199 | char *vmem; |
| 200 | |
| 201 | struct bios_comm *bcomm; /* Firmware BIOS comm structure */ |
| 202 | PORT *port; /* Ptr to PORT[0] struct in VM */ |
| 203 | I596_SCB *scbp; /* Ptr to SCB struct in VM */ |
| 204 | I596_RFD *rfdp; /* Current RFD list */ |
| 205 | I596_RBD *rbdp; /* Current RBD list */ |
| 206 | |
| 207 | volatile int intrcnt; /* Count of interrupts */ |
| 208 | |
| 209 | /* |
| 210 | * SE-4 (EISA) board variables |
| 211 | */ |
| 212 | uchar is_reg; /* EISA: Value for ES4H_IS reg */ |
| 213 | |
| 214 | /* |
| 215 | * SE-6 (PCI) board variables |
| 216 | * |
| 217 | * The PLX "expansion rom" space is used for DMA register |
| 218 | * access from the host on the SE-6. These are the physical |
| 219 | * and virtual addresses of that space. |
| 220 | */ |
| 221 | ulong plxreg; /* Phys address of PLX chip */ |
| 222 | char *vplxreg; /* Virtual address of PLX chip */ |
| 223 | ulong plxdma; /* Phys addr of PLX "expansion rom" */ |
| 224 | ulong volatile *vplxdma; /* Virtual addr of "expansion rom" */ |
| 225 | int use_dma; /* Flag: use DMA */ |
| 226 | DMACHAIN *dmadesc_s; /* area for DMA chains (SW addr.) */ |
| 227 | DMACHAIN *dmadesc_h; /* area for DMA chains (Host Virtual) */ |
| 228 | |
| 229 | /* |
| 230 | * Multi-NIC mode variables |
| 231 | * |
| 232 | * All entries of the devtbl[] array are valid for the 0th |
| 233 | * device (i.e. eth0, but not eth1...eth5). devtbl[0] is |
| 234 | * valid for all devices (i.e. eth0, eth1, ..., eth5). |
| 235 | */ |
| 236 | int nports; /* Number of physical ports (4 or 6) */ |
| 237 | int chan; /* Channel # (1-6) for this device */ |
| 238 | struct net_device *devtbl[6]; /* Ptrs to N device structs */ |
| 239 | |
| 240 | } DGRS_PRIV; |
| 241 | |
| 242 | |
| 243 | /* |
| 244 | * reset or un-reset the IDT processor |
| 245 | */ |
| 246 | static void |
| 247 | proc_reset(struct net_device *dev0, int reset) |
| 248 | { |
| 249 | DGRS_PRIV *priv0 = (DGRS_PRIV *) dev0->priv; |
| 250 | |
| 251 | if (priv0->plxreg) |
| 252 | { |
| 253 | ulong val; |
| 254 | val = inl(dev0->base_addr + PLX_MISC_CSR); |
| 255 | if (reset) |
| 256 | val |= SE6_RESET; |
| 257 | else |
| 258 | val &= ~SE6_RESET; |
| 259 | OUTL(dev0->base_addr + PLX_MISC_CSR, val); |
| 260 | } |
| 261 | else |
| 262 | { |
| 263 | OUTB(dev0->base_addr + ES4H_PC, reset ? ES4H_PC_RESET : 0); |
| 264 | } |
| 265 | } |
| 266 | |
| 267 | /* |
| 268 | * See if the board supports bus master DMA |
| 269 | */ |
| 270 | static int |
| 271 | check_board_dma(struct net_device *dev0) |
| 272 | { |
| 273 | DGRS_PRIV *priv0 = (DGRS_PRIV *) dev0->priv; |
| 274 | ulong x; |
| 275 | |
| 276 | /* |
| 277 | * If Space.c says not to use DMA, or if it's not a PLX based |
| 278 | * PCI board, or if the expansion ROM space is not PCI |
| 279 | * configured, then return false. |
| 280 | */ |
| 281 | if (!dgrs_dma || !priv0->plxreg || !priv0->plxdma) |
| 282 | return (0); |
| 283 | |
| 284 | /* |
| 285 | * Set the local address remap register of the "expansion rom" |
| 286 | * area to 0x80000000 so that we can use it to access the DMA |
| 287 | * registers from the host side. |
| 288 | */ |
| 289 | OUTL(dev0->base_addr + PLX_ROM_BASE_ADDR, 0x80000000); |
| 290 | |
| 291 | /* |
| 292 | * Set the PCI region descriptor to: |
| 293 | * Space 0: |
| 294 | * disable read-prefetch |
| 295 | * enable READY |
| 296 | * enable BURST |
| 297 | * 0 internal wait states |
| 298 | * Expansion ROM: (used for host DMA register access) |
| 299 | * disable read-prefetch |
| 300 | * enable READY |
| 301 | * disable BURST |
| 302 | * 0 internal wait states |
| 303 | */ |
| 304 | OUTL(dev0->base_addr + PLX_BUS_REGION, 0x49430343); |
| 305 | |
| 306 | /* |
| 307 | * Now map the DMA registers into our virtual space |
| 308 | */ |
| 309 | priv0->vplxdma = (ulong *) ioremap (priv0->plxdma, 256); |
| 310 | if (!priv0->vplxdma) |
| 311 | { |
| 312 | printk("%s: can't *remap() the DMA regs\n", dev0->name); |
| 313 | return (0); |
| 314 | } |
| 315 | |
| 316 | /* |
| 317 | * Now test to see if we can access the DMA registers |
| 318 | * If we write -1 and get back 1FFF, then we accessed the |
| 319 | * DMA register. Otherwise, we probably have an old board |
| 320 | * and wrote into regular RAM. |
| 321 | */ |
| 322 | priv0->vplxdma[PLX_DMA0_MODE/4] = 0xFFFFFFFF; |
| 323 | x = priv0->vplxdma[PLX_DMA0_MODE/4]; |
| 324 | if (x != 0x00001FFF) { |
| 325 | iounmap((void *)priv0->vplxdma); |
| 326 | return (0); |
| 327 | } |
| 328 | |
| 329 | return (1); |
| 330 | } |
| 331 | |
| 332 | /* |
| 333 | * Initiate DMA using PLX part on PCI board. Spin the |
| 334 | * processor until completed. All addresses are physical! |
| 335 | * |
| 336 | * If pciaddr is NULL, then it's a chaining DMA, and lcladdr is |
| 337 | * the address of the first DMA descriptor in the chain. |
| 338 | * |
| 339 | * If pciaddr is not NULL, then it's a single DMA. |
| 340 | * |
| 341 | * In either case, "lcladdr" must have been fixed up to make |
| 342 | * sure the MSB isn't set using the S2DMA macro before passing |
| 343 | * the address to this routine. |
| 344 | */ |
| 345 | static int |
| 346 | do_plx_dma( |
| 347 | struct net_device *dev, |
| 348 | ulong pciaddr, |
| 349 | ulong lcladdr, |
| 350 | int len, |
| 351 | int to_host |
| 352 | ) |
| 353 | { |
| 354 | int i; |
| 355 | ulong csr = 0; |
| 356 | DGRS_PRIV *priv = (DGRS_PRIV *) dev->priv; |
| 357 | |
| 358 | if (pciaddr) |
| 359 | { |
| 360 | /* |
| 361 | * Do a single, non-chain DMA |
| 362 | */ |
| 363 | priv->vplxdma[PLX_DMA0_PCI_ADDR/4] = pciaddr; |
| 364 | priv->vplxdma[PLX_DMA0_LCL_ADDR/4] = lcladdr; |
| 365 | priv->vplxdma[PLX_DMA0_SIZE/4] = len; |
| 366 | priv->vplxdma[PLX_DMA0_DESCRIPTOR/4] = to_host |
| 367 | ? PLX_DMA_DESC_TO_HOST |
| 368 | : PLX_DMA_DESC_TO_BOARD; |
| 369 | priv->vplxdma[PLX_DMA0_MODE/4] = |
| 370 | PLX_DMA_MODE_WIDTH32 |
| 371 | | PLX_DMA_MODE_WAITSTATES(0) |
| 372 | | PLX_DMA_MODE_READY |
| 373 | | PLX_DMA_MODE_NOBTERM |
| 374 | | PLX_DMA_MODE_BURST |
| 375 | | PLX_DMA_MODE_NOCHAIN; |
| 376 | } |
| 377 | else |
| 378 | { |
| 379 | /* |
| 380 | * Do a chaining DMA |
| 381 | */ |
| 382 | priv->vplxdma[PLX_DMA0_MODE/4] = |
| 383 | PLX_DMA_MODE_WIDTH32 |
| 384 | | PLX_DMA_MODE_WAITSTATES(0) |
| 385 | | PLX_DMA_MODE_READY |
| 386 | | PLX_DMA_MODE_NOBTERM |
| 387 | | PLX_DMA_MODE_BURST |
| 388 | | PLX_DMA_MODE_CHAIN; |
| 389 | priv->vplxdma[PLX_DMA0_DESCRIPTOR/4] = lcladdr; |
| 390 | } |
| 391 | |
| 392 | priv->vplxdma[PLX_DMA_CSR/4] = |
| 393 | PLX_DMA_CSR_0_ENABLE | PLX_DMA_CSR_0_START; |
| 394 | |
| 395 | /* |
| 396 | * Wait for DMA to complete |
| 397 | */ |
| 398 | for (i = 0; i < 1000000; ++i) |
| 399 | { |
| 400 | /* |
| 401 | * Spin the host CPU for 1 usec, so we don't thrash |
| 402 | * the PCI bus while the PLX 9060 is doing DMA. |
| 403 | */ |
| 404 | udelay(1); |
| 405 | |
| 406 | csr = (volatile unsigned long) priv->vplxdma[PLX_DMA_CSR/4]; |
| 407 | |
| 408 | if (csr & PLX_DMA_CSR_0_DONE) |
| 409 | break; |
| 410 | } |
| 411 | |
| 412 | if ( ! (csr & PLX_DMA_CSR_0_DONE) ) |
| 413 | { |
| 414 | printk("%s: DMA done never occurred. DMA disabled.\n", |
| 415 | dev->name); |
| 416 | priv->use_dma = 0; |
| 417 | return 1; |
| 418 | } |
| 419 | return 0; |
| 420 | } |
| 421 | |
| 422 | /* |
| 423 | * dgrs_rcv_frame() |
| 424 | * |
| 425 | * Process a received frame. This is called from the interrupt |
| 426 | * routine, and works for both switch mode and multi-NIC mode. |
| 427 | * |
| 428 | * Note that when in multi-NIC mode, we want to always access the |
| 429 | * hardware using the dev and priv structures of the first port, |
| 430 | * so that we are using only one set of variables to maintain |
| 431 | * the board interface status, but we want to use the Nth port |
| 432 | * dev and priv structures to maintain statistics and to pass |
| 433 | * the packet up. |
| 434 | * |
| 435 | * Only the first device structure is attached to the interrupt. |
| 436 | * We use the special "chan" variable at the end of the first RBD |
| 437 | * to select the Nth device in multi-NIC mode. |
| 438 | * |
| 439 | * We currently do chained DMA on a per-packet basis when the |
| 440 | * packet is "long", and we spin the CPU a short time polling |
| 441 | * for DMA completion. This avoids a second interrupt overhead, |
| 442 | * and gives the best performance for light traffic to the host. |
| 443 | * |
| 444 | * However, a better scheme that could be implemented would be |
| 445 | * to see how many packets are outstanding for the host, and if |
| 446 | * the number is "large", create a long chain to DMA several |
| 447 | * packets into the host in one go. In this case, we would set |
| 448 | * up some state variables to let the host CPU continue doing |
| 449 | * other things until a DMA completion interrupt comes along. |
| 450 | */ |
| 451 | static void |
| 452 | dgrs_rcv_frame( |
| 453 | struct net_device *dev0, |
| 454 | DGRS_PRIV *priv0, |
| 455 | I596_CB *cbp |
| 456 | ) |
| 457 | { |
| 458 | int len; |
| 459 | I596_TBD *tbdp; |
| 460 | struct sk_buff *skb; |
| 461 | uchar *putp; |
| 462 | uchar *p; |
| 463 | struct net_device *devN; |
| 464 | DGRS_PRIV *privN; |
| 465 | |
| 466 | /* |
| 467 | * Determine Nth priv and dev structure pointers |
| 468 | */ |
| 469 | if (dgrs_nicmode) |
| 470 | { /* Multi-NIC mode */ |
| 471 | int chan = ((I596_RBD *) S2H(cbp->xmit.tbdp))->chan; |
| 472 | |
| 473 | devN = priv0->devtbl[chan-1]; |
| 474 | /* |
| 475 | * If devN is null, we got an interrupt before the I/F |
| 476 | * has been initialized. Pitch the packet. |
| 477 | */ |
| 478 | if (devN == NULL) |
| 479 | goto out; |
| 480 | privN = (DGRS_PRIV *) devN->priv; |
| 481 | } |
| 482 | else |
| 483 | { /* Switch mode */ |
| 484 | devN = dev0; |
| 485 | privN = priv0; |
| 486 | } |
| 487 | |
| 488 | if (0) printk("%s: rcv len=%ld\n", devN->name, cbp->xmit.count); |
| 489 | |
| 490 | /* |
| 491 | * Allocate a message block big enough to hold the whole frame |
| 492 | */ |
| 493 | len = cbp->xmit.count; |
| 494 | if ((skb = dev_alloc_skb(len+5)) == NULL) |
| 495 | { |
| 496 | printk("%s: dev_alloc_skb failed for rcv buffer\n", devN->name); |
Jeff Garzik | 09f75cd | 2007-10-03 17:41:50 -0700 | [diff] [blame] | 497 | ++dev0->stats.rx_dropped; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 498 | /* discarding the frame */ |
| 499 | goto out; |
| 500 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 501 | skb_reserve(skb, 2); /* Align IP header */ |
| 502 | |
| 503 | again: |
| 504 | putp = p = skb_put(skb, len); |
| 505 | |
| 506 | /* |
| 507 | * There are three modes here for doing the packet copy. |
| 508 | * If we have DMA, and the packet is "long", we use the |
| 509 | * chaining mode of DMA. If it's shorter, we use single |
| 510 | * DMA's. Otherwise, we use memcpy(). |
| 511 | */ |
| 512 | if (priv0->use_dma && priv0->dmadesc_h && len > 64) |
| 513 | { |
| 514 | /* |
| 515 | * If we can use DMA and it's a long frame, copy it using |
| 516 | * DMA chaining. |
| 517 | */ |
| 518 | DMACHAIN *ddp_h; /* Host virtual DMA desc. pointer */ |
| 519 | DMACHAIN *ddp_s; /* Switch physical DMA desc. pointer */ |
| 520 | uchar *phys_p; |
| 521 | |
| 522 | /* |
| 523 | * Get the physical address of the STREAMS buffer. |
| 524 | * NOTE: allocb() guarantees that the whole buffer |
| 525 | * is in a single page if the length < 4096. |
| 526 | */ |
| 527 | phys_p = (uchar *) virt_to_phys(putp); |
| 528 | |
| 529 | ddp_h = priv0->dmadesc_h; |
| 530 | ddp_s = priv0->dmadesc_s; |
| 531 | tbdp = (I596_TBD *) S2H(cbp->xmit.tbdp); |
| 532 | for (;;) |
| 533 | { |
| 534 | int count; |
| 535 | int amt; |
| 536 | |
| 537 | count = tbdp->count; |
| 538 | amt = count & 0x3fff; |
| 539 | if (amt == 0) |
| 540 | break; /* For safety */ |
| 541 | if ( (p-putp) >= len) |
| 542 | { |
| 543 | printk("%s: cbp = %lx\n", devN->name, (long) H2S(cbp)); |
| 544 | proc_reset(dev0, 1); /* Freeze IDT */ |
| 545 | break; /* For Safety */ |
| 546 | } |
| 547 | |
| 548 | ddp_h->pciaddr = (ulong) phys_p; |
| 549 | ddp_h->lcladdr = S2DMA(tbdp->buf); |
| 550 | ddp_h->len = amt; |
| 551 | |
| 552 | phys_p += amt; |
| 553 | p += amt; |
| 554 | |
| 555 | if (count & I596_TBD_EOF) |
| 556 | { |
| 557 | ddp_h->next = PLX_DMA_DESC_TO_HOST |
| 558 | | PLX_DMA_DESC_EOC; |
| 559 | ++ddp_h; |
| 560 | break; |
| 561 | } |
| 562 | else |
| 563 | { |
| 564 | ++ddp_s; |
| 565 | ddp_h->next = PLX_DMA_DESC_TO_HOST |
| 566 | | (ulong) ddp_s; |
| 567 | tbdp = (I596_TBD *) S2H(tbdp->next); |
| 568 | ++ddp_h; |
| 569 | } |
| 570 | } |
| 571 | if (ddp_h - priv0->dmadesc_h) |
| 572 | { |
| 573 | int rc; |
| 574 | |
| 575 | rc = do_plx_dma(dev0, |
| 576 | 0, (ulong) priv0->dmadesc_s, len, 0); |
| 577 | if (rc) |
| 578 | { |
| 579 | printk("%s: Chained DMA failure\n", devN->name); |
| 580 | goto again; |
| 581 | } |
| 582 | } |
| 583 | } |
| 584 | else if (priv0->use_dma) |
| 585 | { |
| 586 | /* |
| 587 | * If we can use DMA and it's a shorter frame, copy it |
| 588 | * using single DMA transfers. |
| 589 | */ |
| 590 | uchar *phys_p; |
| 591 | |
| 592 | /* |
| 593 | * Get the physical address of the STREAMS buffer. |
| 594 | * NOTE: allocb() guarantees that the whole buffer |
| 595 | * is in a single page if the length < 4096. |
| 596 | */ |
| 597 | phys_p = (uchar *) virt_to_phys(putp); |
| 598 | |
| 599 | tbdp = (I596_TBD *) S2H(cbp->xmit.tbdp); |
| 600 | for (;;) |
| 601 | { |
| 602 | int count; |
| 603 | int amt; |
| 604 | int rc; |
| 605 | |
| 606 | count = tbdp->count; |
| 607 | amt = count & 0x3fff; |
| 608 | if (amt == 0) |
| 609 | break; /* For safety */ |
| 610 | if ( (p-putp) >= len) |
| 611 | { |
| 612 | printk("%s: cbp = %lx\n", devN->name, (long) H2S(cbp)); |
| 613 | proc_reset(dev0, 1); /* Freeze IDT */ |
| 614 | break; /* For Safety */ |
| 615 | } |
| 616 | rc = do_plx_dma(dev0, (ulong) phys_p, |
| 617 | S2DMA(tbdp->buf), amt, 1); |
| 618 | if (rc) |
| 619 | { |
| 620 | memcpy(p, S2H(tbdp->buf), amt); |
| 621 | printk("%s: Single DMA failed\n", devN->name); |
| 622 | } |
| 623 | phys_p += amt; |
| 624 | p += amt; |
| 625 | if (count & I596_TBD_EOF) |
| 626 | break; |
| 627 | tbdp = (I596_TBD *) S2H(tbdp->next); |
| 628 | } |
| 629 | } |
| 630 | else |
| 631 | { |
| 632 | /* |
| 633 | * Otherwise, copy it piece by piece using memcpy() |
| 634 | */ |
| 635 | tbdp = (I596_TBD *) S2H(cbp->xmit.tbdp); |
| 636 | for (;;) |
| 637 | { |
| 638 | int count; |
| 639 | int amt; |
| 640 | |
| 641 | count = tbdp->count; |
| 642 | amt = count & 0x3fff; |
| 643 | if (amt == 0) |
| 644 | break; /* For safety */ |
| 645 | if ( (p-putp) >= len) |
| 646 | { |
| 647 | printk("%s: cbp = %lx\n", devN->name, (long) H2S(cbp)); |
| 648 | proc_reset(dev0, 1); /* Freeze IDT */ |
| 649 | break; /* For Safety */ |
| 650 | } |
| 651 | memcpy(p, S2H(tbdp->buf), amt); |
| 652 | p += amt; |
| 653 | if (count & I596_TBD_EOF) |
| 654 | break; |
| 655 | tbdp = (I596_TBD *) S2H(tbdp->next); |
| 656 | } |
| 657 | } |
| 658 | |
| 659 | /* |
| 660 | * Pass the frame to upper half |
| 661 | */ |
| 662 | skb->protocol = eth_type_trans(skb, devN); |
| 663 | netif_rx(skb); |
| 664 | devN->last_rx = jiffies; |
Jeff Garzik | 09f75cd | 2007-10-03 17:41:50 -0700 | [diff] [blame] | 665 | ++devN->stats.rx_packets; |
| 666 | devN->stats.rx_bytes += len; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 667 | |
| 668 | out: |
| 669 | cbp->xmit.status = I596_CB_STATUS_C | I596_CB_STATUS_OK; |
| 670 | } |
| 671 | |
| 672 | /* |
| 673 | * Start transmission of a frame |
| 674 | * |
| 675 | * The interface to the board is simple: we pretend that we are |
| 676 | * a fifth 82596 ethernet controller 'receiving' data, and copy the |
| 677 | * data into the same structures that a real 82596 would. This way, |
| 678 | * the board firmware handles the host 'port' the same as any other. |
| 679 | * |
| 680 | * NOTE: we do not use Bus master DMA for this routine. Turns out |
| 681 | * that it is not needed. Slave writes over the PCI bus are about |
| 682 | * as fast as DMA, due to the fact that the PLX part can do burst |
| 683 | * writes. The same is not true for data being read from the board. |
| 684 | * |
| 685 | * For multi-NIC mode, we tell the firmware the desired 82596 |
| 686 | * output port by setting the special "dstchan" member at the |
| 687 | * end of the traditional 82596 RFD structure. |
| 688 | */ |
| 689 | |
| 690 | static int dgrs_start_xmit(struct sk_buff *skb, struct net_device *devN) |
| 691 | { |
| 692 | DGRS_PRIV *privN = (DGRS_PRIV *) devN->priv; |
| 693 | struct net_device *dev0; |
| 694 | DGRS_PRIV *priv0; |
| 695 | I596_RBD *rbdp; |
| 696 | int count; |
| 697 | int i, len, amt; |
| 698 | |
| 699 | /* |
| 700 | * Determine 0th priv and dev structure pointers |
| 701 | */ |
| 702 | if (dgrs_nicmode) |
| 703 | { |
| 704 | dev0 = privN->devtbl[0]; |
| 705 | priv0 = (DGRS_PRIV *) dev0->priv; |
| 706 | } |
| 707 | else |
| 708 | { |
| 709 | dev0 = devN; |
| 710 | priv0 = privN; |
| 711 | } |
| 712 | |
| 713 | if (dgrs_debug > 1) |
| 714 | printk("%s: xmit len=%d\n", devN->name, (int) skb->len); |
| 715 | |
| 716 | devN->trans_start = jiffies; |
| 717 | netif_start_queue(devN); |
| 718 | |
| 719 | if (priv0->rfdp->cmd & I596_RFD_EL) |
| 720 | { /* Out of RFD's */ |
| 721 | if (0) printk("%s: NO RFD's\n", devN->name); |
| 722 | goto no_resources; |
| 723 | } |
| 724 | |
| 725 | rbdp = priv0->rbdp; |
| 726 | count = 0; |
| 727 | priv0->rfdp->rbdp = (I596_RBD *) H2S(rbdp); |
| 728 | |
| 729 | i = 0; len = skb->len; |
| 730 | for (;;) |
| 731 | { |
| 732 | if (rbdp->size & I596_RBD_EL) |
| 733 | { /* Out of RBD's */ |
| 734 | if (0) printk("%s: NO RBD's\n", devN->name); |
| 735 | goto no_resources; |
| 736 | } |
| 737 | |
| 738 | amt = min_t(unsigned int, len, rbdp->size - count); |
Arnaldo Carvalho de Melo | d626f62 | 2007-03-27 18:55:52 -0300 | [diff] [blame] | 739 | skb_copy_from_linear_data_offset(skb, i, S2H(rbdp->buf) + count, amt); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 740 | i += amt; |
| 741 | count += amt; |
| 742 | len -= amt; |
| 743 | if (len == 0) |
| 744 | { |
| 745 | if (skb->len < 60) |
| 746 | rbdp->count = 60 | I596_RBD_EOF; |
| 747 | else |
| 748 | rbdp->count = count | I596_RBD_EOF; |
| 749 | rbdp = (I596_RBD *) S2H(rbdp->next); |
| 750 | goto frame_done; |
| 751 | } |
| 752 | else if (count < 32) |
| 753 | { |
| 754 | /* More data to come, but we used less than 32 |
| 755 | * bytes of this RBD. Keep filling this RBD. |
| 756 | */ |
| 757 | {} /* Yes, we do nothing here */ |
| 758 | } |
| 759 | else |
| 760 | { |
| 761 | rbdp->count = count; |
| 762 | rbdp = (I596_RBD *) S2H(rbdp->next); |
| 763 | count = 0; |
| 764 | } |
| 765 | } |
| 766 | |
| 767 | frame_done: |
| 768 | priv0->rbdp = rbdp; |
| 769 | if (dgrs_nicmode) |
| 770 | priv0->rfdp->dstchan = privN->chan; |
| 771 | priv0->rfdp->status = I596_RFD_C | I596_RFD_OK; |
| 772 | priv0->rfdp = (I596_RFD *) S2H(priv0->rfdp->next); |
| 773 | |
Jeff Garzik | 09f75cd | 2007-10-03 17:41:50 -0700 | [diff] [blame] | 774 | ++devN->stats.tx_packets; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 775 | |
| 776 | dev_kfree_skb (skb); |
| 777 | return (0); |
| 778 | |
| 779 | no_resources: |
| 780 | priv0->scbp->status |= I596_SCB_RNR; /* simulate I82596 */ |
| 781 | return (-EAGAIN); |
| 782 | } |
| 783 | |
| 784 | /* |
| 785 | * Open the interface |
| 786 | */ |
| 787 | static int |
| 788 | dgrs_open( struct net_device *dev ) |
| 789 | { |
| 790 | netif_start_queue(dev); |
| 791 | return (0); |
| 792 | } |
| 793 | |
| 794 | /* |
| 795 | * Close the interface |
| 796 | */ |
| 797 | static int dgrs_close( struct net_device *dev ) |
| 798 | { |
| 799 | netif_stop_queue(dev); |
| 800 | return (0); |
| 801 | } |
| 802 | |
| 803 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 804 | * Set multicast list and/or promiscuous mode |
| 805 | */ |
| 806 | |
| 807 | static void dgrs_set_multicast_list( struct net_device *dev) |
| 808 | { |
| 809 | DGRS_PRIV *priv = (DGRS_PRIV *) dev->priv; |
| 810 | |
| 811 | priv->port->is_promisc = (dev->flags & IFF_PROMISC) ? 1 : 0; |
| 812 | } |
| 813 | |
| 814 | /* |
| 815 | * Unique ioctl's |
| 816 | */ |
| 817 | static int dgrs_ioctl(struct net_device *devN, struct ifreq *ifr, int cmd) |
| 818 | { |
| 819 | DGRS_PRIV *privN = (DGRS_PRIV *) devN->priv; |
| 820 | DGRS_IOCTL ioc; |
| 821 | int i; |
| 822 | |
| 823 | if (cmd != DGRSIOCTL) |
| 824 | return -EINVAL; |
| 825 | |
| 826 | if(copy_from_user(&ioc, ifr->ifr_data, sizeof(DGRS_IOCTL))) |
| 827 | return -EFAULT; |
| 828 | |
| 829 | switch (ioc.cmd) |
| 830 | { |
| 831 | case DGRS_GETMEM: |
| 832 | if (ioc.len != sizeof(ulong)) |
| 833 | return -EINVAL; |
| 834 | if(copy_to_user(ioc.data, &devN->mem_start, ioc.len)) |
| 835 | return -EFAULT; |
| 836 | return (0); |
| 837 | case DGRS_SETFILTER: |
| 838 | if (!capable(CAP_NET_ADMIN)) |
| 839 | return -EPERM; |
| 840 | if (ioc.port > privN->bcomm->bc_nports) |
| 841 | return -EINVAL; |
| 842 | if (ioc.filter >= NFILTERS) |
| 843 | return -EINVAL; |
| 844 | if (ioc.len > privN->bcomm->bc_filter_area_len) |
| 845 | return -EINVAL; |
| 846 | |
| 847 | /* Wait for old command to finish */ |
| 848 | for (i = 0; i < 1000; ++i) |
| 849 | { |
| 850 | if ( (volatile long) privN->bcomm->bc_filter_cmd <= 0 ) |
| 851 | break; |
| 852 | udelay(1); |
| 853 | } |
| 854 | if (i >= 1000) |
| 855 | return -EIO; |
| 856 | |
| 857 | privN->bcomm->bc_filter_port = ioc.port; |
| 858 | privN->bcomm->bc_filter_num = ioc.filter; |
| 859 | privN->bcomm->bc_filter_len = ioc.len; |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 860 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 861 | if (ioc.len) |
| 862 | { |
| 863 | if(copy_from_user(S2HN(privN->bcomm->bc_filter_area), |
| 864 | ioc.data, ioc.len)) |
| 865 | return -EFAULT; |
| 866 | privN->bcomm->bc_filter_cmd = BC_FILTER_SET; |
| 867 | } |
| 868 | else |
| 869 | privN->bcomm->bc_filter_cmd = BC_FILTER_CLR; |
| 870 | return(0); |
| 871 | default: |
| 872 | return -EOPNOTSUPP; |
| 873 | } |
| 874 | } |
| 875 | |
| 876 | /* |
| 877 | * Process interrupts |
| 878 | * |
| 879 | * dev, priv will always refer to the 0th device in Multi-NIC mode. |
| 880 | */ |
| 881 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 882 | static irqreturn_t dgrs_intr(int irq, void *dev_id) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 883 | { |
Jeff Garzik | c31f28e | 2006-10-06 14:56:04 -0400 | [diff] [blame] | 884 | struct net_device *dev0 = dev_id; |
| 885 | DGRS_PRIV *priv0 = dev0->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 886 | I596_CB *cbp; |
| 887 | int cmd; |
| 888 | int i; |
| 889 | |
| 890 | ++priv0->intrcnt; |
| 891 | if (1) ++priv0->bcomm->bc_cnt[4]; |
| 892 | if (0) |
| 893 | { |
| 894 | static int cnt = 100; |
| 895 | if (--cnt > 0) |
| 896 | printk("%s: interrupt: irq %d\n", dev0->name, irq); |
| 897 | } |
| 898 | |
| 899 | /* |
| 900 | * Get 596 command |
| 901 | */ |
| 902 | cmd = priv0->scbp->cmd; |
| 903 | |
| 904 | /* |
| 905 | * See if RU has been restarted |
| 906 | */ |
| 907 | if ( (cmd & I596_SCB_RUC) == I596_SCB_RUC_START) |
| 908 | { |
| 909 | if (0) printk("%s: RUC start\n", dev0->name); |
| 910 | priv0->rfdp = (I596_RFD *) S2H(priv0->scbp->rfdp); |
| 911 | priv0->rbdp = (I596_RBD *) S2H(priv0->rfdp->rbdp); |
| 912 | priv0->scbp->status &= ~(I596_SCB_RNR|I596_SCB_RUS); |
| 913 | /* |
| 914 | * Tell upper half (halves) |
| 915 | */ |
| 916 | if (dgrs_nicmode) |
| 917 | { |
| 918 | for (i = 0; i < priv0->nports; ++i) |
| 919 | netif_wake_queue (priv0->devtbl[i]); |
| 920 | } |
| 921 | else |
| 922 | netif_wake_queue (dev0); |
| 923 | /* if (bd->flags & TX_QUEUED) |
| 924 | DL_sched(bd, bdd); */ |
| 925 | } |
| 926 | |
| 927 | /* |
| 928 | * See if any CU commands to process |
| 929 | */ |
| 930 | if ( (cmd & I596_SCB_CUC) != I596_SCB_CUC_START) |
| 931 | { |
| 932 | priv0->scbp->cmd = 0; /* Ignore all other commands */ |
| 933 | goto ack_intr; |
| 934 | } |
| 935 | priv0->scbp->status &= ~(I596_SCB_CNA|I596_SCB_CUS); |
| 936 | |
| 937 | /* |
| 938 | * Process a command |
| 939 | */ |
| 940 | cbp = (I596_CB *) S2H(priv0->scbp->cbp); |
| 941 | priv0->scbp->cmd = 0; /* Safe to clear the command */ |
| 942 | for (;;) |
| 943 | { |
| 944 | switch (cbp->nop.cmd & I596_CB_CMD) |
| 945 | { |
| 946 | case I596_CB_CMD_XMIT: |
| 947 | dgrs_rcv_frame(dev0, priv0, cbp); |
| 948 | break; |
| 949 | default: |
| 950 | cbp->nop.status = I596_CB_STATUS_C | I596_CB_STATUS_OK; |
| 951 | break; |
| 952 | } |
| 953 | if (cbp->nop.cmd & I596_CB_CMD_EL) |
| 954 | break; |
| 955 | cbp = (I596_CB *) S2H(cbp->nop.next); |
| 956 | } |
| 957 | priv0->scbp->status |= I596_SCB_CNA; |
| 958 | |
| 959 | /* |
| 960 | * Ack the interrupt |
| 961 | */ |
| 962 | ack_intr: |
| 963 | if (priv0->plxreg) |
| 964 | OUTL(dev0->base_addr + PLX_LCL2PCI_DOORBELL, 1); |
| 965 | |
| 966 | return IRQ_HANDLED; |
| 967 | } |
| 968 | |
| 969 | /* |
| 970 | * Download the board firmware |
| 971 | */ |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 972 | static int __init |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 973 | dgrs_download(struct net_device *dev0) |
| 974 | { |
| 975 | DGRS_PRIV *priv0 = (DGRS_PRIV *) dev0->priv; |
| 976 | int is; |
| 977 | unsigned long i; |
| 978 | |
Arjan van de Ven | f71e130 | 2006-03-03 21:33:57 -0500 | [diff] [blame] | 979 | static const int iv2is[16] = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 980 | 0, 0, 0, ES4H_IS_INT3, |
| 981 | 0, ES4H_IS_INT5, 0, ES4H_IS_INT7, |
| 982 | 0, 0, ES4H_IS_INT10, ES4H_IS_INT11, |
| 983 | ES4H_IS_INT12, 0, 0, ES4H_IS_INT15 }; |
| 984 | |
| 985 | /* |
| 986 | * Map in the dual port memory |
| 987 | */ |
| 988 | priv0->vmem = ioremap(dev0->mem_start, 2048*1024); |
| 989 | if (!priv0->vmem) |
| 990 | { |
| 991 | printk("%s: cannot map in board memory\n", dev0->name); |
| 992 | return -ENXIO; |
| 993 | } |
| 994 | |
| 995 | /* |
| 996 | * Hold the processor and configure the board addresses |
| 997 | */ |
| 998 | if (priv0->plxreg) |
| 999 | { /* PCI bus */ |
| 1000 | proc_reset(dev0, 1); |
| 1001 | } |
| 1002 | else |
| 1003 | { /* EISA bus */ |
| 1004 | is = iv2is[dev0->irq & 0x0f]; |
| 1005 | if (!is) |
| 1006 | { |
| 1007 | printk("%s: Illegal IRQ %d\n", dev0->name, dev0->irq); |
| 1008 | iounmap(priv0->vmem); |
| 1009 | priv0->vmem = NULL; |
| 1010 | return -ENXIO; |
| 1011 | } |
| 1012 | OUTB(dev0->base_addr + ES4H_AS_31_24, |
| 1013 | (uchar) (dev0->mem_start >> 24) ); |
| 1014 | OUTB(dev0->base_addr + ES4H_AS_23_16, |
| 1015 | (uchar) (dev0->mem_start >> 16) ); |
| 1016 | priv0->is_reg = ES4H_IS_LINEAR | is | |
| 1017 | ((uchar) (dev0->mem_start >> 8) & ES4H_IS_AS15); |
| 1018 | OUTB(dev0->base_addr + ES4H_IS, priv0->is_reg); |
| 1019 | OUTB(dev0->base_addr + ES4H_EC, ES4H_EC_ENABLE); |
| 1020 | OUTB(dev0->base_addr + ES4H_PC, ES4H_PC_RESET); |
| 1021 | OUTB(dev0->base_addr + ES4H_MW, ES4H_MW_ENABLE | 0x00); |
| 1022 | } |
| 1023 | |
| 1024 | /* |
| 1025 | * See if we can do DMA on the SE-6 |
| 1026 | */ |
| 1027 | priv0->use_dma = check_board_dma(dev0); |
| 1028 | if (priv0->use_dma) |
| 1029 | printk("%s: Bus Master DMA is enabled.\n", dev0->name); |
| 1030 | |
| 1031 | /* |
| 1032 | * Load and verify the code at the desired address |
| 1033 | */ |
| 1034 | memcpy(priv0->vmem, dgrs_code, dgrs_ncode); /* Load code */ |
| 1035 | if (memcmp(priv0->vmem, dgrs_code, dgrs_ncode)) |
| 1036 | { |
| 1037 | iounmap(priv0->vmem); |
| 1038 | priv0->vmem = NULL; |
| 1039 | printk("%s: download compare failed\n", dev0->name); |
| 1040 | return -ENXIO; |
| 1041 | } |
| 1042 | |
| 1043 | /* |
| 1044 | * Configurables |
| 1045 | */ |
| 1046 | priv0->bcomm = (struct bios_comm *) (priv0->vmem + 0x0100); |
| 1047 | priv0->bcomm->bc_nowait = 1; /* Tell board to make printf not wait */ |
| 1048 | priv0->bcomm->bc_squelch = 0; /* Flag from Space.c */ |
| 1049 | priv0->bcomm->bc_150ohm = 0; /* Flag from Space.c */ |
| 1050 | |
| 1051 | priv0->bcomm->bc_spew = 0; /* Debug flag from Space.c */ |
| 1052 | priv0->bcomm->bc_maxrfd = 0; /* Debug flag from Space.c */ |
| 1053 | priv0->bcomm->bc_maxrbd = 0; /* Debug flag from Space.c */ |
| 1054 | |
| 1055 | /* |
| 1056 | * Tell board we are operating in switch mode (1) or in |
| 1057 | * multi-NIC mode (2). |
| 1058 | */ |
| 1059 | priv0->bcomm->bc_host = dgrs_nicmode ? BC_MULTINIC : BC_SWITCH; |
| 1060 | |
| 1061 | /* |
| 1062 | * Request memory space on board for DMA chains |
| 1063 | */ |
| 1064 | if (priv0->use_dma) |
| 1065 | priv0->bcomm->bc_hostarea_len = (2048/64) * 16; |
| 1066 | |
| 1067 | /* |
| 1068 | * NVRAM configurables from Space.c |
| 1069 | */ |
| 1070 | priv0->bcomm->bc_spantree = dgrs_spantree; |
| 1071 | priv0->bcomm->bc_hashexpire = dgrs_hashexpire; |
| 1072 | memcpy(priv0->bcomm->bc_ipaddr, dgrs_ipaddr, 4); |
| 1073 | memcpy(priv0->bcomm->bc_iptrap, dgrs_iptrap, 4); |
| 1074 | memcpy(priv0->bcomm->bc_ipxnet, &dgrs_ipxnet, 4); |
| 1075 | |
| 1076 | /* |
| 1077 | * Release processor, wait 8 seconds for board to initialize |
| 1078 | */ |
| 1079 | proc_reset(dev0, 0); |
| 1080 | |
| 1081 | for (i = jiffies + 8 * HZ; time_after(i, jiffies); ) |
| 1082 | { |
| 1083 | barrier(); /* Gcc 2.95 needs this */ |
| 1084 | if (priv0->bcomm->bc_status >= BC_RUN) |
| 1085 | break; |
| 1086 | } |
| 1087 | |
| 1088 | if (priv0->bcomm->bc_status < BC_RUN) |
| 1089 | { |
| 1090 | printk("%s: board not operating\n", dev0->name); |
| 1091 | iounmap(priv0->vmem); |
| 1092 | priv0->vmem = NULL; |
| 1093 | return -ENXIO; |
| 1094 | } |
| 1095 | |
| 1096 | priv0->port = (PORT *) S2H(priv0->bcomm->bc_port); |
| 1097 | priv0->scbp = (I596_SCB *) S2H(priv0->port->scbp); |
| 1098 | priv0->rfdp = (I596_RFD *) S2H(priv0->scbp->rfdp); |
| 1099 | priv0->rbdp = (I596_RBD *) S2H(priv0->rfdp->rbdp); |
| 1100 | |
| 1101 | priv0->scbp->status = I596_SCB_CNA; /* CU is idle */ |
| 1102 | |
| 1103 | /* |
| 1104 | * Get switch physical and host virtual pointers to DMA |
| 1105 | * chaining area. NOTE: the MSB of the switch physical |
| 1106 | * address *must* be turned off. Otherwise, the HW kludge |
| 1107 | * that allows host access of the PLX DMA registers will |
| 1108 | * erroneously select the PLX registers. |
| 1109 | */ |
| 1110 | priv0->dmadesc_s = (DMACHAIN *) S2DMA(priv0->bcomm->bc_hostarea); |
| 1111 | if (priv0->dmadesc_s) |
| 1112 | priv0->dmadesc_h = (DMACHAIN *) S2H(priv0->dmadesc_s); |
| 1113 | else |
| 1114 | priv0->dmadesc_h = NULL; |
| 1115 | |
| 1116 | /* |
| 1117 | * Enable board interrupts |
| 1118 | */ |
| 1119 | if (priv0->plxreg) |
| 1120 | { /* PCI bus */ |
| 1121 | OUTL(dev0->base_addr + PLX_INT_CSR, |
| 1122 | inl(dev0->base_addr + PLX_INT_CSR) |
| 1123 | | PLX_PCI_DOORBELL_IE); /* Enable intr to host */ |
| 1124 | OUTL(dev0->base_addr + PLX_LCL2PCI_DOORBELL, 1); |
| 1125 | } |
| 1126 | else |
| 1127 | { /* EISA bus */ |
| 1128 | } |
| 1129 | |
| 1130 | return (0); |
| 1131 | } |
| 1132 | |
| 1133 | /* |
| 1134 | * Probe (init) a board |
| 1135 | */ |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 1136 | static int __init |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1137 | dgrs_probe1(struct net_device *dev) |
| 1138 | { |
| 1139 | DGRS_PRIV *priv = (DGRS_PRIV *) dev->priv; |
| 1140 | unsigned long i; |
| 1141 | int rc; |
Joe Perches | 0795af5 | 2007-10-03 17:59:30 -0700 | [diff] [blame^] | 1142 | DECLARE_MAC_BUF(mac); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1143 | |
| 1144 | printk("%s: Digi RightSwitch io=%lx mem=%lx irq=%d plx=%lx dma=%lx\n", |
| 1145 | dev->name, dev->base_addr, dev->mem_start, dev->irq, |
| 1146 | priv->plxreg, priv->plxdma); |
| 1147 | |
| 1148 | /* |
| 1149 | * Download the firmware and light the processor |
| 1150 | */ |
| 1151 | rc = dgrs_download(dev); |
| 1152 | if (rc) |
| 1153 | goto err_out; |
| 1154 | |
| 1155 | /* |
| 1156 | * Get ether address of board |
| 1157 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1158 | memcpy(dev->dev_addr, priv->port->ethaddr, 6); |
Joe Perches | 0795af5 | 2007-10-03 17:59:30 -0700 | [diff] [blame^] | 1159 | printk("%s: Ethernet address %s\n", |
| 1160 | dev->name, print_mac(mac, dev->dev_addr)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1161 | |
| 1162 | if (dev->dev_addr[0] & 1) |
| 1163 | { |
| 1164 | printk("%s: Illegal Ethernet Address\n", dev->name); |
| 1165 | rc = -ENXIO; |
| 1166 | goto err_out; |
| 1167 | } |
| 1168 | |
| 1169 | /* |
| 1170 | * ACK outstanding interrupts, hook the interrupt, |
| 1171 | * and verify that we are getting interrupts from the board. |
| 1172 | */ |
| 1173 | if (priv->plxreg) |
| 1174 | OUTL(dev->base_addr + PLX_LCL2PCI_DOORBELL, 1); |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 1175 | |
Thomas Gleixner | 1fb9df5 | 2006-07-01 19:29:39 -0700 | [diff] [blame] | 1176 | rc = request_irq(dev->irq, &dgrs_intr, IRQF_SHARED, "RightSwitch", dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1177 | if (rc) |
| 1178 | goto err_out; |
| 1179 | |
| 1180 | priv->intrcnt = 0; |
| 1181 | for (i = jiffies + 2*HZ + HZ/2; time_after(i, jiffies); ) |
| 1182 | { |
| 1183 | cpu_relax(); |
| 1184 | if (priv->intrcnt >= 2) |
| 1185 | break; |
| 1186 | } |
| 1187 | if (priv->intrcnt < 2) |
| 1188 | { |
| 1189 | printk(KERN_ERR "%s: Not interrupting on IRQ %d (%d)\n", |
| 1190 | dev->name, dev->irq, priv->intrcnt); |
| 1191 | rc = -ENXIO; |
| 1192 | goto err_free_irq; |
| 1193 | } |
| 1194 | |
| 1195 | /* |
| 1196 | * Entry points... |
| 1197 | */ |
| 1198 | dev->open = &dgrs_open; |
| 1199 | dev->stop = &dgrs_close; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1200 | dev->hard_start_xmit = &dgrs_start_xmit; |
| 1201 | dev->set_multicast_list = &dgrs_set_multicast_list; |
| 1202 | dev->do_ioctl = &dgrs_ioctl; |
| 1203 | |
| 1204 | return rc; |
| 1205 | |
| 1206 | err_free_irq: |
| 1207 | free_irq(dev->irq, dev); |
| 1208 | err_out: |
| 1209 | return rc; |
| 1210 | } |
| 1211 | |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 1212 | static int __init |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1213 | dgrs_initclone(struct net_device *dev) |
| 1214 | { |
| 1215 | DGRS_PRIV *priv = (DGRS_PRIV *) dev->priv; |
Joe Perches | 0795af5 | 2007-10-03 17:59:30 -0700 | [diff] [blame^] | 1216 | DECLARE_MAC_BUF(mac); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1217 | |
Joe Perches | 0795af5 | 2007-10-03 17:59:30 -0700 | [diff] [blame^] | 1218 | printk("%s: Digi RightSwitch port %d %s\n", |
| 1219 | dev->name, priv->chan, print_mac(mac, dev->dev_addr)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1220 | |
Joe Perches | 0795af5 | 2007-10-03 17:59:30 -0700 | [diff] [blame^] | 1221 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1222 | } |
| 1223 | |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 1224 | static struct net_device * __init |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1225 | dgrs_found_device( |
| 1226 | int io, |
| 1227 | ulong mem, |
| 1228 | int irq, |
| 1229 | ulong plxreg, |
| 1230 | ulong plxdma, |
| 1231 | struct device *pdev |
| 1232 | ) |
| 1233 | { |
| 1234 | DGRS_PRIV *priv; |
| 1235 | struct net_device *dev; |
| 1236 | int i, ret = -ENOMEM; |
| 1237 | |
| 1238 | dev = alloc_etherdev(sizeof(DGRS_PRIV)); |
| 1239 | if (!dev) |
| 1240 | goto err0; |
| 1241 | |
| 1242 | priv = (DGRS_PRIV *)dev->priv; |
| 1243 | |
| 1244 | dev->base_addr = io; |
| 1245 | dev->mem_start = mem; |
| 1246 | dev->mem_end = mem + 2048 * 1024 - 1; |
| 1247 | dev->irq = irq; |
| 1248 | priv->plxreg = plxreg; |
| 1249 | priv->plxdma = plxdma; |
| 1250 | priv->vplxdma = NULL; |
| 1251 | |
| 1252 | priv->chan = 1; |
| 1253 | priv->devtbl[0] = dev; |
| 1254 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1255 | SET_NETDEV_DEV(dev, pdev); |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 1256 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1257 | ret = dgrs_probe1(dev); |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 1258 | if (ret) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1259 | goto err1; |
| 1260 | |
| 1261 | ret = register_netdev(dev); |
| 1262 | if (ret) |
| 1263 | goto err2; |
| 1264 | |
| 1265 | if ( !dgrs_nicmode ) |
| 1266 | return dev; /* Switch mode, we are done */ |
| 1267 | |
| 1268 | /* |
| 1269 | * Operating card as N separate NICs |
| 1270 | */ |
| 1271 | |
| 1272 | priv->nports = priv->bcomm->bc_nports; |
| 1273 | |
| 1274 | for (i = 1; i < priv->nports; ++i) |
| 1275 | { |
| 1276 | struct net_device *devN; |
| 1277 | DGRS_PRIV *privN; |
| 1278 | /* Allocate new dev and priv structures */ |
| 1279 | devN = alloc_etherdev(sizeof(DGRS_PRIV)); |
| 1280 | ret = -ENOMEM; |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 1281 | if (!devN) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1282 | goto fail; |
| 1283 | |
| 1284 | /* Don't copy the network device structure! */ |
| 1285 | |
| 1286 | /* copy the priv structure of dev[0] */ |
| 1287 | privN = (DGRS_PRIV *)devN->priv; |
| 1288 | *privN = *priv; |
| 1289 | |
| 1290 | /* ... and zero out VM areas */ |
| 1291 | privN->vmem = NULL; |
| 1292 | privN->vplxdma = NULL; |
| 1293 | /* ... and zero out IRQ */ |
| 1294 | devN->irq = 0; |
| 1295 | /* ... and base MAC address off address of 1st port */ |
| 1296 | devN->dev_addr[5] += i; |
| 1297 | |
| 1298 | ret = dgrs_initclone(devN); |
| 1299 | if (ret) |
| 1300 | goto fail; |
| 1301 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1302 | SET_NETDEV_DEV(dev, pdev); |
| 1303 | |
| 1304 | ret = register_netdev(devN); |
| 1305 | if (ret) { |
| 1306 | free_netdev(devN); |
| 1307 | goto fail; |
| 1308 | } |
| 1309 | privN->chan = i+1; |
| 1310 | priv->devtbl[i] = devN; |
| 1311 | } |
| 1312 | return dev; |
| 1313 | |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 1314 | fail: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1315 | while (i >= 0) { |
| 1316 | struct net_device *d = priv->devtbl[i--]; |
| 1317 | unregister_netdev(d); |
| 1318 | free_netdev(d); |
| 1319 | } |
| 1320 | |
| 1321 | err2: |
| 1322 | free_irq(dev->irq, dev); |
| 1323 | err1: |
| 1324 | free_netdev(dev); |
| 1325 | err0: |
| 1326 | return ERR_PTR(ret); |
| 1327 | } |
| 1328 | |
| 1329 | static void __devexit dgrs_remove(struct net_device *dev) |
| 1330 | { |
| 1331 | DGRS_PRIV *priv = dev->priv; |
| 1332 | int i; |
| 1333 | |
| 1334 | unregister_netdev(dev); |
| 1335 | |
| 1336 | for (i = 1; i < priv->nports; ++i) { |
| 1337 | struct net_device *d = priv->devtbl[i]; |
| 1338 | if (d) { |
| 1339 | unregister_netdev(d); |
| 1340 | free_netdev(d); |
| 1341 | } |
| 1342 | } |
| 1343 | |
| 1344 | proc_reset(priv->devtbl[0], 1); |
| 1345 | |
| 1346 | if (priv->vmem) |
| 1347 | iounmap(priv->vmem); |
| 1348 | if (priv->vplxdma) |
| 1349 | iounmap((uchar *) priv->vplxdma); |
| 1350 | |
| 1351 | if (dev->irq) |
| 1352 | free_irq(dev->irq, dev); |
| 1353 | |
| 1354 | for (i = 1; i < priv->nports; ++i) { |
| 1355 | if (priv->devtbl[i]) |
| 1356 | unregister_netdev(priv->devtbl[i]); |
| 1357 | } |
| 1358 | } |
| 1359 | |
| 1360 | #ifdef CONFIG_PCI |
| 1361 | static int __init dgrs_pci_probe(struct pci_dev *pdev, |
| 1362 | const struct pci_device_id *ent) |
| 1363 | { |
| 1364 | struct net_device *dev; |
| 1365 | int err; |
| 1366 | uint io; |
| 1367 | uint mem; |
| 1368 | uint irq; |
| 1369 | uint plxreg; |
| 1370 | uint plxdma; |
| 1371 | |
| 1372 | /* |
| 1373 | * Get and check the bus-master and latency values. |
| 1374 | * Some PCI BIOSes fail to set the master-enable bit, |
| 1375 | * and the latency timer must be set to the maximum |
| 1376 | * value to avoid data corruption that occurs when the |
| 1377 | * timer expires during a transfer. Yes, it's a bug. |
| 1378 | */ |
| 1379 | err = pci_enable_device(pdev); |
| 1380 | if (err) |
| 1381 | return err; |
| 1382 | err = pci_request_regions(pdev, "RightSwitch"); |
| 1383 | if (err) |
| 1384 | return err; |
| 1385 | |
| 1386 | pci_set_master(pdev); |
| 1387 | |
| 1388 | plxreg = pci_resource_start (pdev, 0); |
| 1389 | io = pci_resource_start (pdev, 1); |
| 1390 | mem = pci_resource_start (pdev, 2); |
| 1391 | pci_read_config_dword(pdev, 0x30, &plxdma); |
| 1392 | irq = pdev->irq; |
| 1393 | plxdma &= ~15; |
| 1394 | |
| 1395 | /* |
| 1396 | * On some BIOSES, the PLX "expansion rom" (used for DMA) |
| 1397 | * address comes up as "0". This is probably because |
| 1398 | * the BIOS doesn't see a valid 55 AA ROM signature at |
| 1399 | * the "ROM" start and zeroes the address. To get |
| 1400 | * around this problem the SE-6 is configured to ask |
| 1401 | * for 4 MB of space for the dual port memory. We then |
| 1402 | * must set its range back to 2 MB, and use the upper |
| 1403 | * half for DMA register access |
| 1404 | */ |
| 1405 | OUTL(io + PLX_SPACE0_RANGE, 0xFFE00000L); |
| 1406 | if (plxdma == 0) |
| 1407 | plxdma = mem + (2048L * 1024L); |
| 1408 | pci_write_config_dword(pdev, 0x30, plxdma + 1); |
| 1409 | pci_read_config_dword(pdev, 0x30, &plxdma); |
| 1410 | plxdma &= ~15; |
| 1411 | |
| 1412 | dev = dgrs_found_device(io, mem, irq, plxreg, plxdma, &pdev->dev); |
| 1413 | if (IS_ERR(dev)) { |
| 1414 | pci_release_regions(pdev); |
| 1415 | return PTR_ERR(dev); |
| 1416 | } |
| 1417 | |
| 1418 | pci_set_drvdata(pdev, dev); |
| 1419 | return 0; |
| 1420 | } |
| 1421 | |
| 1422 | static void __devexit dgrs_pci_remove(struct pci_dev *pdev) |
| 1423 | { |
| 1424 | struct net_device *dev = pci_get_drvdata(pdev); |
| 1425 | |
| 1426 | dgrs_remove(dev); |
| 1427 | pci_release_regions(pdev); |
| 1428 | free_netdev(dev); |
| 1429 | } |
| 1430 | |
| 1431 | static struct pci_driver dgrs_pci_driver = { |
| 1432 | .name = "dgrs", |
| 1433 | .id_table = dgrs_pci_tbl, |
| 1434 | .probe = dgrs_pci_probe, |
| 1435 | .remove = __devexit_p(dgrs_pci_remove), |
| 1436 | }; |
Richard Knutsson | 18317ab | 2005-11-21 21:32:03 -0800 | [diff] [blame] | 1437 | #else |
| 1438 | static struct pci_driver dgrs_pci_driver = {}; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1439 | #endif |
| 1440 | |
| 1441 | |
| 1442 | #ifdef CONFIG_EISA |
| 1443 | static int is2iv[8] __initdata = { 0, 3, 5, 7, 10, 11, 12, 15 }; |
| 1444 | |
| 1445 | static int __init dgrs_eisa_probe (struct device *gendev) |
| 1446 | { |
| 1447 | struct net_device *dev; |
| 1448 | struct eisa_device *edev = to_eisa_device(gendev); |
| 1449 | uint io = edev->base_addr; |
| 1450 | uint mem; |
| 1451 | uint irq; |
| 1452 | int rc = -ENODEV; /* Not EISA configured */ |
| 1453 | |
| 1454 | if (!request_region(io, 256, "RightSwitch")) { |
| 1455 | printk(KERN_ERR "dgrs: eisa io 0x%x, which is busy.\n", io); |
| 1456 | return -EBUSY; |
| 1457 | } |
| 1458 | |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 1459 | if ( ! (inb(io+ES4H_EC) & ES4H_EC_ENABLE) ) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1460 | goto err_out; |
| 1461 | |
| 1462 | mem = (inb(io+ES4H_AS_31_24) << 24) |
| 1463 | + (inb(io+ES4H_AS_23_16) << 16); |
| 1464 | |
| 1465 | irq = is2iv[ inb(io+ES4H_IS) & ES4H_IS_INTMASK ]; |
| 1466 | |
| 1467 | dev = dgrs_found_device(io, mem, irq, 0L, 0L, gendev); |
| 1468 | if (IS_ERR(dev)) { |
| 1469 | rc = PTR_ERR(dev); |
| 1470 | goto err_out; |
| 1471 | } |
| 1472 | |
| 1473 | gendev->driver_data = dev; |
| 1474 | return 0; |
| 1475 | err_out: |
| 1476 | release_region(io, 256); |
| 1477 | return rc; |
| 1478 | } |
| 1479 | |
| 1480 | static int __devexit dgrs_eisa_remove(struct device *gendev) |
| 1481 | { |
| 1482 | struct net_device *dev = gendev->driver_data; |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 1483 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1484 | dgrs_remove(dev); |
| 1485 | |
| 1486 | release_region(dev->base_addr, 256); |
Jeff Garzik | 6aa20a2 | 2006-09-13 13:24:59 -0400 | [diff] [blame] | 1487 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1488 | free_netdev(dev); |
| 1489 | return 0; |
| 1490 | } |
| 1491 | |
| 1492 | |
| 1493 | static struct eisa_driver dgrs_eisa_driver = { |
| 1494 | .id_table = dgrs_eisa_tbl, |
| 1495 | .driver = { |
| 1496 | .name = "dgrs", |
| 1497 | .probe = dgrs_eisa_probe, |
| 1498 | .remove = __devexit_p(dgrs_eisa_remove), |
| 1499 | } |
| 1500 | }; |
| 1501 | #endif |
| 1502 | |
| 1503 | /* |
| 1504 | * Variables that can be overriden from module command line |
| 1505 | */ |
| 1506 | static int debug = -1; |
| 1507 | static int dma = -1; |
| 1508 | static int hashexpire = -1; |
| 1509 | static int spantree = -1; |
| 1510 | static int ipaddr[4] = { -1 }; |
| 1511 | static int iptrap[4] = { -1 }; |
| 1512 | static __u32 ipxnet = -1; |
| 1513 | static int nicmode = -1; |
| 1514 | |
| 1515 | module_param(debug, int, 0); |
| 1516 | module_param(dma, int, 0); |
| 1517 | module_param(hashexpire, int, 0); |
| 1518 | module_param(spantree, int, 0); |
| 1519 | module_param_array(ipaddr, int, NULL, 0); |
| 1520 | module_param_array(iptrap, int, NULL, 0); |
| 1521 | module_param(ipxnet, int, 0); |
| 1522 | module_param(nicmode, int, 0); |
| 1523 | MODULE_PARM_DESC(debug, "Digi RightSwitch enable debugging (0-1)"); |
| 1524 | MODULE_PARM_DESC(dma, "Digi RightSwitch enable BM DMA (0-1)"); |
| 1525 | MODULE_PARM_DESC(nicmode, "Digi RightSwitch operating mode (1: switch, 2: multi-NIC)"); |
| 1526 | |
| 1527 | static int __init dgrs_init_module (void) |
| 1528 | { |
| 1529 | int i; |
Bjorn Helgaas | c2f6fab | 2006-03-25 03:07:19 -0800 | [diff] [blame] | 1530 | int err; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1531 | |
| 1532 | /* |
| 1533 | * Command line variable overrides |
| 1534 | * debug=NNN |
| 1535 | * dma=0/1 |
| 1536 | * spantree=0/1 |
| 1537 | * hashexpire=NNN |
| 1538 | * ipaddr=A,B,C,D |
| 1539 | * iptrap=A,B,C,D |
| 1540 | * ipxnet=NNN |
| 1541 | * nicmode=NNN |
| 1542 | */ |
| 1543 | if (debug >= 0) |
| 1544 | dgrs_debug = debug; |
| 1545 | if (dma >= 0) |
| 1546 | dgrs_dma = dma; |
| 1547 | if (nicmode >= 0) |
| 1548 | dgrs_nicmode = nicmode; |
| 1549 | if (hashexpire >= 0) |
| 1550 | dgrs_hashexpire = hashexpire; |
| 1551 | if (spantree >= 0) |
| 1552 | dgrs_spantree = spantree; |
| 1553 | if (ipaddr[0] != -1) |
| 1554 | for (i = 0; i < 4; ++i) |
| 1555 | dgrs_ipaddr[i] = ipaddr[i]; |
| 1556 | if (iptrap[0] != -1) |
| 1557 | for (i = 0; i < 4; ++i) |
| 1558 | dgrs_iptrap[i] = iptrap[i]; |
| 1559 | if (ipxnet != -1) |
| 1560 | dgrs_ipxnet = htonl( ipxnet ); |
| 1561 | |
| 1562 | if (dgrs_debug) |
| 1563 | { |
| 1564 | printk(KERN_INFO "dgrs: SW=%s FW=Build %d %s\nFW Version=%s\n", |
| 1565 | version, dgrs_firmnum, dgrs_firmdate, dgrs_firmver); |
| 1566 | } |
| 1567 | |
| 1568 | /* |
| 1569 | * Find and configure all the cards |
| 1570 | */ |
| 1571 | #ifdef CONFIG_EISA |
Bjorn Helgaas | c2f6fab | 2006-03-25 03:07:19 -0800 | [diff] [blame] | 1572 | err = eisa_driver_register(&dgrs_eisa_driver); |
| 1573 | if (err) |
| 1574 | return err; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1575 | #endif |
Bjorn Helgaas | c2f6fab | 2006-03-25 03:07:19 -0800 | [diff] [blame] | 1576 | err = pci_register_driver(&dgrs_pci_driver); |
| 1577 | if (err) |
| 1578 | return err; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1579 | return 0; |
| 1580 | } |
| 1581 | |
| 1582 | static void __exit dgrs_cleanup_module (void) |
| 1583 | { |
| 1584 | #ifdef CONFIG_EISA |
| 1585 | eisa_driver_unregister (&dgrs_eisa_driver); |
| 1586 | #endif |
| 1587 | #ifdef CONFIG_PCI |
| 1588 | pci_unregister_driver (&dgrs_pci_driver); |
| 1589 | #endif |
| 1590 | } |
| 1591 | |
| 1592 | module_init(dgrs_init_module); |
| 1593 | module_exit(dgrs_cleanup_module); |