| Byungho Min | e119766 | 2009-06-23 21:40:28 +0900 | [diff] [blame] | 1 | /* linux/arch/arm/mach-s5pc100/mach-smdkc100.c |
| 2 | * |
| 3 | * Copyright 2009 Samsung Electronics Co. |
| 4 | * Author: Byungho Min <bhmin@samsung.com> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | * |
| 10 | */ |
| 11 | |
| 12 | #include <linux/kernel.h> |
| 13 | #include <linux/types.h> |
| 14 | #include <linux/interrupt.h> |
| 15 | #include <linux/list.h> |
| 16 | #include <linux/timer.h> |
| 17 | #include <linux/init.h> |
| 18 | #include <linux/serial_core.h> |
| 19 | #include <linux/platform_device.h> |
| 20 | #include <linux/io.h> |
| 21 | #include <linux/gpio.h> |
| 22 | #include <linux/i2c.h> |
| 23 | #include <linux/fb.h> |
| 24 | #include <linux/delay.h> |
| 25 | |
| 26 | #include <asm/mach/arch.h> |
| 27 | #include <asm/mach/map.h> |
| 28 | |
| 29 | #include <mach/map.h> |
| 30 | |
| 31 | #include <asm/irq.h> |
| 32 | #include <asm/mach-types.h> |
| 33 | |
| 34 | #include <plat/regs-serial.h> |
| 35 | |
| 36 | #include <plat/clock.h> |
| 37 | #include <plat/devs.h> |
| 38 | #include <plat/cpu.h> |
| 39 | #include <plat/s5pc100.h> |
| 40 | |
| 41 | #define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK) |
| 42 | #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) |
| 43 | #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) |
| 44 | |
| 45 | static struct s3c2410_uartcfg smdkc100_uartcfgs[] __initdata = { |
| 46 | [0] = { |
| 47 | .hwport = 0, |
| 48 | .flags = 0, |
| 49 | .ucon = 0x3c5, |
| 50 | .ulcon = 0x03, |
| 51 | .ufcon = 0x51, |
| 52 | }, |
| 53 | [1] = { |
| 54 | .hwport = 1, |
| 55 | .flags = 0, |
| 56 | .ucon = 0x3c5, |
| 57 | .ulcon = 0x03, |
| 58 | .ufcon = 0x51, |
| 59 | }, |
| 60 | [2] = { |
| 61 | .hwport = 2, |
| 62 | .flags = 0, |
| 63 | .ucon = 0x3c5, |
| 64 | .ulcon = 0x03, |
| 65 | .ufcon = 0x51, |
| 66 | }, |
| 67 | [3] = { |
| 68 | .hwport = 3, |
| 69 | .flags = 0, |
| 70 | .ucon = 0x3c5, |
| 71 | .ulcon = 0x03, |
| 72 | .ufcon = 0x51, |
| 73 | }, |
| 74 | }; |
| 75 | |
| 76 | static struct map_desc smdkc100_iodesc[] = {}; |
| 77 | |
| 78 | static struct platform_device *smdkc100_devices[] __initdata = { |
| 79 | }; |
| 80 | |
| 81 | static void __init smdkc100_map_io(void) |
| 82 | { |
| 83 | s5pc1xx_init_io(smdkc100_iodesc, ARRAY_SIZE(smdkc100_iodesc)); |
| 84 | s3c24xx_init_clocks(12000000); |
| 85 | s3c24xx_init_uarts(smdkc100_uartcfgs, ARRAY_SIZE(smdkc100_uartcfgs)); |
| 86 | } |
| 87 | |
| 88 | static void __init smdkc100_machine_init(void) |
| 89 | { |
| 90 | platform_add_devices(smdkc100_devices, ARRAY_SIZE(smdkc100_devices)); |
| 91 | } |
| 92 | |
| 93 | MACHINE_START(SMDKC100, "SMDKC100") |
| 94 | /* Maintainer: Byungho Min <bhmin@samsung.com> */ |
| 95 | .phys_io = S5PC1XX_PA_UART & 0xfff00000, |
| 96 | .io_pg_offst = (((u32)S5PC1XX_VA_UART) >> 18) & 0xfffc, |
| 97 | .boot_params = S5PC100_PA_SDRAM + 0x100, |
| 98 | |
| 99 | .init_irq = s5pc100_init_irq, |
| 100 | .map_io = smdkc100_map_io, |
| 101 | .init_machine = smdkc100_machine_init, |
| 102 | .timer = &s3c24xx_timer, |
| 103 | MACHINE_END |