Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * drivers/mtd/nand/spia.c |
| 3 | * |
| 4 | * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com) |
| 5 | * |
| 6 | * |
| 7 | * 10-29-2001 TG change to support hardwarespecific access |
| 8 | * to controllines (due to change in nand.c) |
| 9 | * page_cache added |
| 10 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 11 | * $Id: spia.c,v 1.25 2005/11/07 11:14:31 gleixner Exp $ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 12 | * |
| 13 | * This program is free software; you can redistribute it and/or modify |
| 14 | * it under the terms of the GNU General Public License version 2 as |
| 15 | * published by the Free Software Foundation. |
| 16 | * |
| 17 | * Overview: |
| 18 | * This is a device driver for the NAND flash device found on the |
| 19 | * SPIA board which utilizes the Toshiba TC58V64AFT part. This is |
| 20 | * a 64Mibit (8MiB x 8 bits) NAND flash device. |
| 21 | */ |
| 22 | |
| 23 | #include <linux/kernel.h> |
| 24 | #include <linux/init.h> |
| 25 | #include <linux/slab.h> |
| 26 | #include <linux/module.h> |
| 27 | #include <linux/mtd/mtd.h> |
| 28 | #include <linux/mtd/nand.h> |
| 29 | #include <linux/mtd/partitions.h> |
| 30 | #include <asm/io.h> |
| 31 | |
| 32 | /* |
| 33 | * MTD structure for SPIA board |
| 34 | */ |
| 35 | static struct mtd_info *spia_mtd = NULL; |
| 36 | |
| 37 | /* |
| 38 | * Values specific to the SPIA board (used with EP7212 processor) |
| 39 | */ |
| 40 | #define SPIA_IO_BASE 0xd0000000 /* Start of EP7212 IO address space */ |
| 41 | #define SPIA_FIO_BASE 0xf0000000 /* Address where flash is mapped */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 42 | #define SPIA_PEDR 0x0080 /* |
| 43 | * IO offset to Port E data register |
| 44 | * where the CLE, ALE and NCE pins |
| 45 | * are wired to. |
| 46 | */ |
| 47 | #define SPIA_PEDDR 0x00c0 /* |
| 48 | * IO offset to Port E data direction |
| 49 | * register so we can control the IO |
| 50 | * lines. |
| 51 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 52 | |
| 53 | /* |
| 54 | * Module stuff |
| 55 | */ |
| 56 | |
| 57 | static int spia_io_base = SPIA_IO_BASE; |
| 58 | static int spia_fio_base = SPIA_FIO_BASE; |
| 59 | static int spia_pedr = SPIA_PEDR; |
| 60 | static int spia_peddr = SPIA_PEDDR; |
| 61 | |
| 62 | module_param(spia_io_base, int, 0); |
| 63 | module_param(spia_fio_base, int, 0); |
| 64 | module_param(spia_pedr, int, 0); |
| 65 | module_param(spia_peddr, int, 0); |
| 66 | |
| 67 | /* |
| 68 | * Define partitions for flash device |
| 69 | */ |
Jesper Juhl | 3c6bee1 | 2006-01-09 20:54:01 -0800 | [diff] [blame] | 70 | static const struct mtd_partition partition_info[] = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 71 | { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 72 | .name = "SPIA flash partition 1", |
| 73 | .offset = 0, |
| 74 | .size = 2 * 1024 * 1024}, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 75 | { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 76 | .name = "SPIA flash partition 2", |
| 77 | .offset = 2 * 1024 * 1024, |
| 78 | .size = 6 * 1024 * 1024} |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 79 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 80 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 81 | #define NUM_PARTITIONS 2 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 82 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 83 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 84 | * hardware specific access to control-lines |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 85 | * |
| 86 | * ctrl: |
| 87 | * NAND_CNE: bit 0 -> bit 2 |
| 88 | * NAND_CLE: bit 1 -> bit 0 |
| 89 | * NAND_ALE: bit 2 -> bit 1 |
| 90 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 91 | static void spia_hwcontrol(struct mtd_info *mtd, int cmd) |
| 92 | { |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 93 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 94 | |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 95 | if (ctrl & NAND_CTRL_CHANGE) { |
| 96 | void __iomem *addr = spia_io_base + spia_pedr; |
| 97 | unsigned char bits; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 98 | |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 99 | bits = (ctrl & NAND_CNE) << 2; |
| 100 | bits |= (ctrl & NAND_CLE | NAND_ALE) >> 1; |
| 101 | writeb((readb(addr) & ~0x7) | bits, addr); |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 102 | } |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 103 | |
| 104 | if (cmd != NAND_CMD_NONE) |
| 105 | writeb(cmd, chip->IO_ADDR_W); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 106 | } |
| 107 | |
| 108 | /* |
| 109 | * Main initialization routine |
| 110 | */ |
David Woodhouse | cead4db | 2006-05-16 13:54:50 +0100 | [diff] [blame] | 111 | static int __init spia_init(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 112 | { |
| 113 | struct nand_chip *this; |
| 114 | |
| 115 | /* Allocate memory for MTD device structure and private data */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 116 | spia_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 117 | if (!spia_mtd) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 118 | printk("Unable to allocate SPIA NAND MTD device structure.\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 119 | return -ENOMEM; |
| 120 | } |
| 121 | |
| 122 | /* Get pointer to private data */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 123 | this = (struct nand_chip *)(&spia_mtd[1]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 124 | |
| 125 | /* Initialize structures */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 126 | memset(spia_mtd, 0, sizeof(struct mtd_info)); |
| 127 | memset(this, 0, sizeof(struct nand_chip)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 128 | |
| 129 | /* Link the private data with the MTD structure */ |
| 130 | spia_mtd->priv = this; |
David Woodhouse | 552d920 | 2006-05-14 01:20:46 +0100 | [diff] [blame] | 131 | spia_mtd->owner = THIS_MODULE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 132 | |
| 133 | /* |
| 134 | * Set GPIO Port E control register so that the pins are configured |
| 135 | * to be outputs for controlling the NAND flash. |
| 136 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 137 | (*(volatile unsigned char *)(spia_io_base + spia_peddr)) = 0x07; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 138 | |
| 139 | /* Set address of NAND IO lines */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 140 | this->IO_ADDR_R = (void __iomem *)spia_fio_base; |
| 141 | this->IO_ADDR_W = (void __iomem *)spia_fio_base; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 142 | /* Set address of hardware control function */ |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 143 | this->cmd_ctrl = spia_hwcontrol; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 144 | /* 15 us command delay time */ |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 145 | this->chip_delay = 15; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 146 | |
| 147 | /* Scan to find existence of the device */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 148 | if (nand_scan(spia_mtd, 1)) { |
| 149 | kfree(spia_mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 150 | return -ENXIO; |
| 151 | } |
| 152 | |
| 153 | /* Register the partitions */ |
| 154 | add_mtd_partitions(spia_mtd, partition_info, NUM_PARTITIONS); |
| 155 | |
| 156 | /* Return happy */ |
| 157 | return 0; |
| 158 | } |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 159 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 160 | module_init(spia_init); |
| 161 | |
| 162 | /* |
| 163 | * Clean up routine |
| 164 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 165 | static void __exit spia_cleanup(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 166 | { |
| 167 | /* Release resources, unregister device */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 168 | nand_release(spia_mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 169 | |
| 170 | /* Free the MTD device structure */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 171 | kfree(spia_mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 172 | } |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 173 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 174 | module_exit(spia_cleanup); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 175 | |
| 176 | MODULE_LICENSE("GPL"); |
| 177 | MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com"); |
| 178 | MODULE_DESCRIPTION("Board-specific glue layer for NAND flash on SPIA board"); |