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gerrit-public.fairphone.software / fp2-dev / kernel / msm / 16f723552c71adb0978f2be0af5fddb374b13ed0 / . / include / linux / epm_adc.h
blob: ca1a42543314ad4a4b4ba2b890f2e18f40fb2da9 [file] [log] [blame]
Siddartha Mohanadoss53c16f92011-10-17 15:57:15 -0700[diff] [blame]1#ifndef __EPM_ADC_H
2#define __EPM_ADC_H
3
4#include <linux/i2c.h>
5
6struct epm_chan_request {
7 /* EPM ADC device index. 0 - ADC1, 1 - ADC2 */
8 uint32_t device_idx;
9 /* Channel number within the EPM ADC device */
10 uint32_t channel_idx;
11 /* The data meaningful for each individual channel whether it is
12 * voltage, current etc. */
13 int32_t physical;
14};
15
Siddartha Mohanadoss96dd36822012-09-24 20:08:04 -0700[diff] [blame]16#ifdef __KERNEL__
Siddartha Mohanadossefddea42012-09-04 08:23:43 -0700[diff] [blame]17struct epm_psoc_init_resp {
18 u8 cmd;
19 u8 version;
20 u8 compatible_ver;
21 u8 firm_ver[3];
22 u8 num_dev;
23 u8 num_channel;
24};
25
26struct epm_psoc_channel_configure {
27 u8 cmd;
28 u8 device_num;
29 uint32_t channel_num;
30};
31
32struct epm_psoc_set_avg {
33 u8 cmd;
34 u8 avg_period;
35 u8 return_code;
36};
37
38struct epm_psoc_get_data {
39 u8 cmd;
40 u8 dev_num;
41 u8 chan_num;
42 uint32_t timestamp_resp_value;
43 uint32_t reading_value;
44};
45
46struct epm_psoc_get_buffered_data {
47 u8 cmd;
48 u8 dev_num;
49 u8 status_mask;
50 u8 chan_idx;
51 uint32_t chan_mask;
52 uint32_t timestamp_start;
53 uint32_t timestamp_end;
54 u8 buff_data[48];
55};
56
57struct epm_psoc_system_time_stamp {
58 u8 cmd;
59 uint32_t timestamp;
60};
61
62struct epm_psoc_set_channel {
63 u8 cmd;
64 u8 dev_num;
65 uint32_t channel_mask;
66};
67
Siddartha Mohanadoss6e77b772012-09-19 21:58:13 -0700[diff] [blame]68struct result_buffer {
69 uint32_t channel;
70 uint32_t avg_buffer_sample;
71 uint32_t result;
72};
73
Siddartha Mohanadossefddea42012-09-04 08:23:43 -0700[diff] [blame]74struct epm_psoc_get_avg_buffered_switch_data {
Siddartha Mohanadoss6e77b772012-09-19 21:58:13 -0700[diff] [blame]75 u8 cmd;
76 u8 status;
77 uint32_t timestamp_start;
78 uint32_t channel_mask;
79 u8 avg_data[54];
80 struct result_buffer data[54];
Siddartha Mohanadossefddea42012-09-04 08:23:43 -0700[diff] [blame]81};
82
83struct epm_psoc_set_channel_switch {
84 u8 cmd;
85 u8 dev;
86 uint32_t delay;
87};
88
89struct epm_psoc_set_vadc {
90 u8 cmd;
91 u8 vadc_dev;
92 uint32_t vadc_voltage;
93};
94
Siddartha Mohanadoss53c16f92011-10-17 15:57:15 -0700[diff] [blame]95struct epm_chan_properties {
Siddartha Mohanadossefddea42012-09-04 08:23:43 -0700[diff] [blame]96 uint32_t resistorvalue;
Siddartha Mohanadoss53c16f92011-10-17 15:57:15 -0700[diff] [blame]97 uint32_t gain;
98};
99
100struct epm_adc_platform_data {
101 struct epm_chan_properties *channel;
102 uint32_t num_channels;
103 uint32_t num_adc;
104 uint32_t chan_per_adc;
105 uint32_t chan_per_mux;
106 struct i2c_board_info epm_i2c_board_info;
107 uint32_t bus_id;
108 uint32_t gpio_expander_base_addr;
109};
Siddartha Mohanadoss79f975f2012-07-11 10:13:30 -0700[diff] [blame]110#endif
Siddartha Mohanadosseb90c922012-03-27 22:58:06 -0700[diff] [blame]111
112#define EPM_ADC_IOCTL_CODE 0x91
113
114#define EPM_ADC_REQUEST _IOWR(EPM_ADC_IOCTL_CODE, 1, \
115 struct epm_chan_request)
116
117#define EPM_ADC_INIT _IOR(EPM_ADC_IOCTL_CODE, 2, \
118 uint32_t)
119
120#define EPM_ADC_DEINIT _IOR(EPM_ADC_IOCTL_CODE, 3, \
121 uint32_t)
Siddartha Mohanadossefddea42012-09-04 08:23:43 -0700[diff] [blame]122
123#define EPM_PSOC_ADC_INIT _IOR(EPM_ADC_IOCTL_CODE, 4, \
124 struct epm_psoc_init_resp)
125
126#define EPM_PSOC_ADC_CHANNEL_ENABLE _IOWR(EPM_ADC_IOCTL_CODE, 5, \
127 struct epm_psoc_channel_configure)
128
129#define EPM_PSOC_ADC_CHANNEL_DISABLE _IOWR(EPM_ADC_IOCTL_CODE, 6, \
130 struct epm_psoc_channel_configure)
131
132#define EPM_PSOC_ADC_SET_AVERAGING _IOWR(EPM_ADC_IOCTL_CODE, 7, \
133 struct epm_psoc_set_avg)
134
135#define EPM_PSOC_ADC_GET_LAST_MEASUREMENT _IOWR(EPM_ADC_IOCTL_CODE, 8, \
136 struct epm_psoc_get_data)
137
138#define EPM_PSOC_ADC_GET_BUFFERED_DATA _IOWR(EPM_ADC_IOCTL_CODE, 9, \
139 struct epm_psoc_get_buffered_data)
140
141#define EPM_PSOC_ADC_GET_SYSTEM_TIMESTAMP _IOWR(EPM_ADC_IOCTL_CODE, 10, \
142 struct epm_psoc_system_time_stamp)
143
144#define EPM_PSOC_ADC_SET_SYSTEM_TIMESTAMP _IOWR(EPM_ADC_IOCTL_CODE, 11, \
145 struct epm_psoc_system_time_stamp)
146
147#define EPM_PSOC_ADC_GET_AVERAGE_DATA _IOWR(EPM_ADC_IOCTL_CODE, 12, \
148 struct epm_psoc_get_avg_buffered_switch_data)
149
150#define EPM_PSOC_SET_CHANNEL_SWITCH _IOWR(EPM_ADC_IOCTL_CODE, 13, \
151 struct epm_psoc_set_channel_switch)
152
153#define EPM_PSOC_CLEAR_BUFFER _IOWR(EPM_ADC_IOCTL_CODE, 14, \
154 uint32_t)
155
156#define EPM_PSOC_ADC_SET_VADC_REFERENCE _IOWR(EPM_ADC_IOCTL_CODE, 15, \
157 struct epm_psoc_set_vadc)
158
Siddartha Mohanadoss53c16f92011-10-17 15:57:15 -0700[diff] [blame]159#endif /* __EPM_ADC_H */