arch/arm/boot/dts/msm9625.dtsi

/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

/include/ "skeleton.dtsi"
/include/ "msm9625-ion.dtsi"
/include/ "msm9625-pm.dtsi"
/include/ "msm9625-coresight.dtsi"

/ {
	model = "Qualcomm MSM 9625";
	compatible = "qcom,msm9625";
	interrupt-parent = <&intc>;

	intc: interrupt-controller@F9000000 {
		compatible = "qcom,msm-qgic2";
		interrupt-controller;
		#interrupt-cells = <3>;
		reg = <0xF9000000 0x1000>,
		      <0xF9002000 0x1000>;
	};

	l2: cache-controller@f9040000 {
		compatible = "arm,pl310-cache";
		reg = <0xf9040000 0x1000>;
		cache-unified;
		cache-level = <2>;
	};

	msmgpio: gpio@fd510000 {
		compatible = "qcom,msm-gpio";
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;
		reg = <0xfd510000 0x4000>;
	};

	timer: msm-qtimer@f9021000 {
		compatible = "qcom,msm-qtimer", "arm,armv7-timer";
		reg = <0xF9021000 0x1000>;
		interrupts = <0 7 0>;
		irq-is-not-percpu;
		clock-frequency = <19200000>;
	};

	qcom,sps@f9980000 {
		compatible = "qcom,msm_sps";
		reg = <0xf9984000 0x15000>,
		      <0xf9999000 0xb000>,
		      <0xfe803000 0x4800>;
		interrupts = <0 94 0>;
		qcom,device-type = <2>;
	};

	serial@f991f000 {
		compatible = "qcom,msm-lsuart-v14";
		reg = <0xf991f000 0x1000>;
		interrupts = <0 109 0>;
	};

	usb@f9a55000 {
		compatible = "qcom,hsusb-otg";
		reg = <0xf9a55000 0x400>;
		interrupts = <0 134 0 0 140 0>;
		interrupt-names = "core_irq", "async_irq";
		HSUSB_VDDCX-supply = <&pm8019_l12>;
		HSUSB_1p8-supply = <&pm8019_l2>;
		HSUSB_3p3-supply = <&pm8019_l4>;
		vbus_otg-supply = <&usb_vbus>;

		qcom,hsusb-otg-phy-type = <2>;
		qcom,hsusb-otg-mode = <1>;
		qcom,hsusb-otg-otg-control = <1>;
		qcom,hsusb-otg-disable-reset;
	};

	android_usb@fc42b0c8 {
		compatible = "qcom,android-usb";
		reg = <0xfc42b0c8 0xc8>;
	};

	hsic@f9a15000 {
		compatible = "qcom,hsic-host";
		reg = <0xf9a15000 0x400>;
		interrupts = <0 136 0>;
		interrupt-names = "core_irq";
		HSIC_VDDCX-supply = <&pm8019_l12>;
		HSIC_GDSC-supply = <&gdsc_usb_hsic>;
	};

	qcom,usbbam@f9a44000 {
		compatible = "qcom,usb-bam-msm";
		reg = <0xf9a44000 0x11000>;
		reg-names = "hsusb";
		interrupts = <0 135 0>;
		interrupt-names = "hsusb";
		qcom,usb-active-bam = <1>;
		qcom,usb-total-bam-num = <3>;
		qcom,usb-bam-num-pipes = <16>;
		qcom,ignore-core-reset-ack;

		qcom,pipe0 {
			label = "usb-to-ipa";
			qcom,usb-bam-type = <1>;
			qcom,usb-bam-mem-type = <2>;
			qcom,src-bam-physical-address = <0xf9a44000>;
			qcom,src-bam-pipe-index = <1>;
			qcom,data-fifo-size = <0x600>;
			qcom,descriptor-fifo-size = <0x300>;
		};

		qcom,pipe1 {
			label = "ipa-to-usb";
			qcom,usb-bam-type = <1>;
			qcom,usb-bam-mem-type = <2>;
			qcom,dst-bam-physical-address = <0xf9a44000>;
			qcom,dst-bam-pipe-index = <0>;
			qcom,data-fifo-size = <0x600>;
			qcom,descriptor-fifo-size = <0x100>;
		};
	};

	qcom,nand@f9ac0000 {
		compatible = "qcom,msm-nand";
		reg = <0xf9ac0000 0x1000>,
		      <0xf9ac4000 0x8000>;
		reg-names = "nand_phys",
			    "bam_phys";
		interrupts = <0 247 0>;
		interrupt-names = "bam_irq";
	};

	spi@f9924000 {
		cell-index = <0>;
		compatible = "qcom,spi-qup-v2";
		reg = <0xf9924000 0x1000>;
		interrupts = <0 96 0>;
		spi-max-frequency = <25000000>;
		#address-cells = <1>;
		#size-cells = <0>;
		gpios = <&msmgpio 7 0>, /* CLK  */
			<&msmgpio 5 0>, /* MISO */
			<&msmgpio 4 0>; /* MOSI */

		cs-gpios = <&msmgpio 6 0>;

		ethernet-switch@0 {
			compatible = "simtec,ks8851";
			reg = <0>;
			interrupt-parent = <&msmgpio>;
			interrupts = <75 0>;
			spi-max-frequency = <4800000>;
		};
	};

	qcom,wdt@f9017000 {
		compatible = "qcom,msm-watchdog";
		reg = <0xf9017000 0x1000>;
		interrupts = <1 2 0>, <1 1 0>;
		qcom,bark-time = <11000>;
		qcom,pet-time = <10000>;
		qcom,ipi-ping = <0>;
	};

	rpm_bus: qcom,rpm-smd {
		compatible = "qcom,rpm-smd";
		rpm-channel-name = "rpm_requests";
		rpm-channel-type = <15>; /* SMD_APPS_RPM */
	};

	spmi_bus: qcom,spmi@fc4c0000 {
		cell-index = <0>;
		compatible = "qcom,spmi-pmic-arb";
		reg = <0xfc4cf000 0x1000>,
		      <0Xfc4cb000 0x1000>;
		/* 190,ee0_krait_hlos_spmi_periph_irq */
		/* 187,channel_0_krait_hlos_trans_done_irq */
		interrupts = <0 190 0 0 187 0>;
		qcom,pmic-arb-ee = <0>;
		qcom,pmic-arb-channel = <0>;
		qcom,pmic-arb-ppid-map = <0x02400000>, /* TEMP_ALARM */
					 <0x03100001>, /* VADC1_USR */
					 <0x06100002>, /* RTC_ALARM */
					 <0x06200003>, /* RTC_TIMER */
					 <0x0a000004>, /* MPP1 */
					 <0x0a100005>, /* MPP2 */
					 <0x0a200006>, /* MPP3 */
					 <0x0a300007>, /* MPP4 */
					 <0x0a400008>, /* MPP5 */
					 <0x0a500009>, /* MPP6 */
					 <0x0c20000a>, /* GPIO3 */
					 <0x0c30000b>, /* GPIO4 */
					 <0x0c50000c>, /* GPIO6 */
					 <0x0080000d>; /* PON */
	};

	i2c@f9925000 {
		cell-index = <3>;
		compatible = "qcom,i2c-qup";
		reg = <0xf9925000 0x1000>;
		#address-cells = <1>;
		#size-cells = <0>;
		reg-names = "qup_phys_addr";
		interrupts = <0 97 0>;
		interrupt-names = "qup_err_intr";
		qcom,i2c-bus-freq = <100000>;
		qcom,i2c-src-freq = <24000000>;
	};

	sdcc2: qcom,sdcc@f98a4000 {
		cell-index = <2>; /* SDC2 SD card slot */
		compatible = "qcom,msm-sdcc";
		reg = <0xf98a4000 0x800>,
		      <0xf98a4800 0x100>,
		      <0xf9884000 0x7000>;
		reg-names = "core_mem", "dml_mem", "bam_mem";

		vdd-supply = <&ext_2p95v>;

		vdd-io-supply = <&pm8019_l13>;
		qcom,vdd-io-always-on;
		qcom,vdd-io-lpm-sup;
		qcom,vdd-io-voltage-level = <1800000 2950000>;
		qcom,vdd-io-current-level = <6 22000>;

		qcom,pad-pull-on = <0x0 0x3 0x3>;
		qcom,pad-pull-off = <0x0 0x3 0x3>;
		qcom,pad-drv-on = <0x7 0x4 0x4>;
		qcom,pad-drv-off = <0x0 0x0 0x0>;

		qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
		qcom,sup-voltages = <2950 2950>;
		qcom,bus-width = <4>;
		qcom,xpc;
		qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
		qcom,current-limit = <800>;

		interrupt-parent = <&sdcc2>;
		#address-cells = <0>;
		interrupts = <0 1 2>;
		#interrupt-cells = <1>;
		interrupt-map-mask = <0xffffffff>;
		interrupt-map = <0 &intc 0 125 0
				 1 &intc 0 220 0
				 2 &msmgpio 66 0x3>;
		interrupt-names = "core_irq", "bam_irq", "status_irq";
		cd-gpios = <&msmgpio 66 0>;
	};

	sdcc3: qcom,sdcc@f9864000 {
		cell-index = <3>; /* SDC3 SDIO slot */
		compatible = "qcom,msm-sdcc";
		reg = <0xf9864000 0x800>,
		      <0xf9864800 0x100>,
		      <0xf9844000 0x7000>;
		reg-names = "core_mem", "dml_mem", "bam_mem";
		interrupts = <0 127 0>, <0 223 0>;
		interrupt-names = "core_irq", "bam_irq";

		gpios = <&msmgpio 25 0>,
			<&msmgpio 24 0>,
			<&msmgpio 16 0>,
			<&msmgpio 17 0>,
			<&msmgpio 18 0>,
			<&msmgpio 19 0>;
		qcom,gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3";

		qcom,clk-rates = <400000 25000000 50000000 100000000>;
		qcom,sup-voltages = <2950 2950>;
		qcom,bus-width = <4>;
		qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50";
	};

	qcom,bam_dmux@fc834000 {
		compatible = "qcom,bam_dmux";
		reg = <0xfc834000 0x7000>;
		interrupts = <0 29 1>;
	};

	qcom,ipa@fd4c0000 {
		compatible = "qcom,ipa";
		reg = <0xfd4c0000 0x26000>,
		      <0xfd4c4000 0x14818>;
		reg-names = "ipa-base", "bam-base";
		interrupts = <0 252 0>,
		             <0 253 0>;
		interrupt-names = "ipa-irq", "bam-irq";

		qcom,pipe1 {
			label = "a2-to-ipa";
			qcom,src-bam-physical-address = <0xfc834000>;
			qcom,ipa-bam-mem-type = <0>;
			qcom,src-bam-pipe-index = <1>;
			qcom,dst-bam-physical-address = <0xfd4c0000>;
			qcom,dst-bam-pipe-index = <6>;
			qcom,data-fifo-offset = <0x1000>;
			qcom,data-fifo-size = <0xd00>;
			qcom,descriptor-fifo-offset = <0x1d00>;
			qcom,descriptor-fifo-size = <0x300>;
		};

		qcom,pipe2 {
			label = "ipa-to-a2";
			qcom,src-bam-physical-address = <0xfd4c0000>;
			qcom,ipa-bam-mem-type = <0>;
			qcom,src-bam-pipe-index = <7>;
			qcom,dst-bam-physical-address = <0xfc834000>;
			qcom,dst-bam-pipe-index = <0>;
			qcom,data-fifo-offset = <0x00>;
			qcom,data-fifo-size = <0xd00>;
			qcom,descriptor-fifo-offset = <0xd00>;
			qcom,descriptor-fifo-size = <0x300>;
		};
	};

	qcom,acpuclk@f9010000 {
		compatible = "qcom,acpuclk-9625";
		reg = <0xf9010008 0x10>,
		      <0xf9008004 0x4>;
		reg-names = "rcg_base", "pwr_base";
		a5_cpu-supply = <&pm8019_l10_corner_ao>;
		a5_mem-supply = <&pm8019_l12_ao>;
	};

	gdsc_usb_hsic: qcom,gdsc@fc400404 {
		compatible = "qcom,gdsc";
		reg = <0xfc400404 0x4>;
		regulator-name = "gdsc_usb_hsic";
	};

	tsens@fc4a8000 {
		compatible = "qcom,msm-tsens";
		reg = <0xfc4a8000 0x2000>,
		      <0xfc4b8000 0x1000>;
		reg-names = "tsens_physical", "tsens_eeprom_physical";
		interrupts = <0 184 0>;
		qcom,sensors = <5>;
		qcom,slope = <3200 3200 3200 3200 3200>;
	};

	qcom,msm-rng@f9bff000 {
                compatible = "qcom,msm-rng";
                reg = <0xf9bff000 0x200>;
                qcom,msm-rng-iface-clk;
	};

	wcd9xxx_intc: wcd9xxx-irq {
		compatible = "qcom,wcd9xxx-irq";
		interrupt-controller;
		#interrupt-cells = <1>;
		interrupt-parent = <&msmgpio>;
		interrupts = <20 0>;
		interrupt-names = "cdc-int";
	};

	i2c@f9925000 {
		cell-index = <3>;
		compatible = "qcom,i2c-qup";
		reg = <0xf9925000 0x1000>;
		#address-cells = <1>;
		#size-cells = <0>;
		reg-names = "qup_phys_addr";
		interrupts = <0 97 0>;
		interrupt-names = "qup_err_intr";
		qcom,i2c-bus-freq = <100000>;
		qcom,i2c-src-freq = <24000000>;

		wcd9xxx_codec@0d{
			compatible = "qcom,wcd9xxx-i2c";
			reg = <0x0d>;
			qcom,cdc-reset-gpio = <&msmgpio 22 0>;
			interrupt-parent = <&wcd9xxx_intc>;
			interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28>;
			cdc-vdd-buck-supply = <&pm8019_l11>;
			qcom,cdc-vdd-buck-voltage = <1800000 1800000>;
			qcom,cdc-vdd-buck-current = <25000>;

			cdc-vdd-tx-h-supply = <&pm8019_l11>;
			qcom,cdc-vdd-tx-h-voltage = <1800000 1800000>;
			qcom,cdc-vdd-tx-h-current = <25000>;

			cdc-vdd-rx-h-supply = <&pm8019_l11>;
			qcom,cdc-vdd-rx-h-voltage = <1800000 1800000>;
			qcom,cdc-vdd-rx-h-current = <25000>;

			cdc-vddpx-1-supply = <&pm8019_l11>;
			qcom,cdc-vddpx-1-voltage = <1800000 1800000>;
			qcom,cdc-vddpx-1-current = <10000>;

			cdc-vdd-a-1p2v-supply = <&pm8019_l9>;
			qcom,cdc-vdd-a-1p2v-voltage = <1200000 1200000>;
			qcom,cdc-vdd-a-1p2v-current = <10000>;

			cdc-vddcx-1-supply = <&pm8019_l9>;
			qcom,cdc-vddcx-1-voltage = <1200000 1200000>;
			qcom,cdc-vddcx-1-current = <10000>;

			cdc-vddcx-2-supply = <&pm8019_l9>;
			qcom,cdc-vddcx-2-voltage = <1200000 1200000>;
			qcom,cdc-vddcx-2-current = <10000>;

			qcom,cdc-micbias-ldoh-v = <0x3>;
			qcom,cdc-micbias-cfilt1-mv = <1800>;
			qcom,cdc-micbias-cfilt2-mv = <2700>;
			qcom,cdc-micbias-cfilt3-mv = <1800>;
			qcom,cdc-micbias1-cfilt-sel = <0x0>;
			qcom,cdc-micbias2-cfilt-sel = <0x1>;
			qcom,cdc-micbias3-cfilt-sel = <0x2>;
			qcom,cdc-micbias4-cfilt-sel = <0x2>;
		};

		wcd9xxx_codec@77{
			compatible = "qcom,wcd9xxx-i2c";
			reg = <0x77>;
		};

		wcd9xxx_codec@66{
			compatible = "qcom,wcd9xxx-i2c";
			reg = <0x66>;
		};

		wcd9xxx_codec@55{
			compatible = "qcom,wcd9xxx-i2c";
			reg = <0x55>;
		};
	};

	sound {
		compatible = "qcom,mdm9625-audio-taiko";
		qcom,model = "mdm9625-taiko-i2s-snd-card";

		qcom,audio-routing =
			"RX_BIAS", "MCLK",
			"LDO_H", "MCLK",
			"Ext Spk Bottom Pos", "LINEOUT1",
			"Ext Spk Bottom Neg", "LINEOUT3",
			"Ext Spk Top Pos", "LINEOUT2",
			"Ext Spk Top Neg", "LINEOUT4",
			"AMIC1", "MIC BIAS1 External",
			"MIC BIAS1 External", "Handset Mic",
			"AMIC2", "MIC BIAS2 External",
			"MIC BIAS2 External", "Headset Mic",
			"AMIC3", "MIC BIAS3 Internal1",
			"MIC BIAS3 Internal1", "ANCRight Headset Mic",
			"AMIC4", "MIC BIAS1 Internal2",
			"MIC BIAS1 Internal2", "ANCLeft Headset Mic",
			"DMIC1", "MIC BIAS1 External",
			"MIC BIAS1 External", "Digital Mic1",
			"DMIC2", "MIC BIAS1 External",
			"MIC BIAS1 External", "Digital Mic2",
			"DMIC3", "MIC BIAS3 External",
			"MIC BIAS3 External", "Digital Mic3",
			"DMIC4", "MIC BIAS3 External",
			"MIC BIAS3 External", "Digital Mic4",
			"DMIC5", "MIC BIAS4 External",
			"MIC BIAS4 External", "Digital Mic5",
			"DMIC6", "MIC BIAS4 External",
			"MIC BIAS4 External", "Digital Mic6";
			qcom,taiko-mclk-clk-freq = <12288000>;
	};

	qcom,msm-adsp-loader {
		compatible = "qcom,adsp-loader";
		qcom,adsp-state = <2>;
	};

	qcom,msm-pcm {
		compatible = "qcom,msm-pcm-dsp";
	};

	qcom,msm-pcm-routing {
		compatible = "qcom,msm-pcm-routing";
	};

	qcom,msm-compr-dsp {
		compatible = "qcom,msm-compr-dsp";
	};

	qcom,msm-voip-dsp {
		compatible = "qcom,msm-voip-dsp";
	};

	qcom,msm-pcm-voice {
		compatible = "qcom,msm-pcm-voice";
	};

	qcom,msm-dai-fe {
		compatible = "qcom,msm-dai-fe";
	};

	qcom,msm-pcm-afe {
		compatible = "qcom,msm-pcm-afe";
	};

	qcom,msm-pcm-hostless {
		compatible = "qcom,msm-pcm-hostless";
	};

	qcom,msm-dai-mi2s {
		compatible = "qcom,msm-dai-mi2s";
		qcom,msm-dai-q6-mi2s-prim {
			compatible = "qcom,msm-dai-q6-mi2s";
			qcom,msm-dai-q6-mi2s-dev-id = <0>;
			qcom,msm-mi2s-rx-lines = <2>;
			qcom,msm-mi2s-tx-lines = <1>;
		};
	};

	qcom,msm-dai-q6 {
		compatible = "qcom,msm-dai-q6";
	};

	qcom,mss {
		compatible = "qcom,pil-q6v5-mss";
		interrupts = <0 24 1>;
	};

	qcom,smem@fa00000 {
		compatible = "qcom,smem";
		reg = <0xfa00000 0x200000>,
			<0xfa006000 0x1000>,
			<0xfc428000 0x4000>;
		reg-names = "smem", "irq-reg-base", "aux-mem1";

		qcom,smd-modem {
			compatible = "qcom,smd";
			qcom,smd-edge = <0>;
			qcom,smd-irq-offset = <0x8>;
			qcom,smd-irq-bitmask = <0x1000>;
			qcom,pil-string = "modem";
			interrupts = <0 25 1>;
		};

		qcom,smsm-modem {
			compatible = "qcom,smsm";
			qcom,smsm-edge = <0>;
			qcom,smsm-irq-offset = <0x8>;
			qcom,smsm-irq-bitmask = <0x2000>;
			interrupts = <0 26 1>;
		};

		qcom,smd-adsp {
			compatible = "qcom,smd";
			qcom,smd-edge = <1>;
			qcom,smd-irq-offset = <0x8>;
			qcom,smd-irq-bitmask = <0x100>;
			qcom,pil-string = "adsp";
			interrupts = <0 156 1>;
		};

		qcom,smsm-adsp {
			compatible = "qcom,smsm";
			qcom,smsm-edge = <1>;
			qcom,smsm-irq-offset = <0x8>;
			qcom,smsm-irq-bitmask = <0x200>;
			interrupts = <0 157 1>;
		};

		qcom,smd-rpm {
			compatible = "qcom,smd";
			qcom,smd-edge = <15>;
			qcom,smd-irq-offset = <0x8>;
			qcom,smd-irq-bitmask = <0x1>;
			interrupts = <0 168 1>;
			qcom,irq-no-suspend;
		};
	};
};

/include/ "msm-pm8019-rpm-regulator.dtsi"
/include/ "msm-pm8019.dtsi"
/include/ "msm9625-regulator.dtsi"

&pm8019_vadc {
	chan@49 {
		label = "batt_id_therm";
		qcom,channel-num = <49>;
		qcom,decimation = <0>;
		qcom,pre-div-channel-scaling = <0>;
		qcom,calibration-type = "ratiometric";
		qcom,scale-function = <0>;
		qcom,hw-settle-time = <0>;
		qcom,fast-avg-setup = <0>;
	};

	chan@51 {
		label = "pa_therm1";
		qcom,channel-num = <51>;
		qcom,decimation = <0>;
		qcom,pre-div-channel-scaling = <0>;
		qcom,calibration-type = "ratiometric";
		qcom,scale-function = <2>;
		qcom,hw-settle-time = <0>;
		qcom,fast-avg-setup = <0>;
	};

	chan@52 {
		label = "pa_therm2";
		qcom,channel-num = <52>;
		qcom,decimation = <0>;
		qcom,pre-div-channel-scaling = <0>;
		qcom,calibration-type = "ratiometric";
		qcom,scale-function = <2>;
		qcom,hw-settle-time = <0>;
		qcom,fast-avg-setup = <0>;
	};

	chan@50 {
		label = "xo_therm";
		qcom,channel-num = <50>;
		qcom,decimation = <0>;
		qcom,pre-div-channel-scaling = <0>;
		qcom,calibration-type = "ratiometric";
		qcom,scale-function = <4>;
		qcom,hw-settle-time = <0>;
		qcom,fast-avg-setup = <0>;
	};

	chan@60 {
		label = "xo_therm_amux";
		qcom,channel-num = <60>;
		qcom,decimation = <0>;
		qcom,pre-div-channel-scaling = <0>;
		qcom,calibration-type = "ratiometric";
		qcom,scale-function = <4>;
		qcom,hw-settle-time = <0>;
		qcom,fast-avg-setup = <0>;
	};
};