Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Device driver for the PMU on 68K-based Apple PowerBooks |
| 3 | * |
| 4 | * The VIA (versatile interface adapter) interfaces to the PMU, |
| 5 | * a 6805 microprocessor core whose primary function is to control |
| 6 | * battery charging and system power on the PowerBooks. |
| 7 | * The PMU also controls the ADB (Apple Desktop Bus) which connects |
| 8 | * to the keyboard and mouse, as well as the non-volatile RAM |
| 9 | * and the RTC (real time clock) chip. |
| 10 | * |
| 11 | * Adapted for 68K PMU by Joshua M. Thompson |
| 12 | * |
| 13 | * Based largely on the PowerMac PMU code by Paul Mackerras and |
| 14 | * Fabio Riccardi. |
| 15 | * |
| 16 | * Also based on the PMU driver from MkLinux by Apple Computer, Inc. |
| 17 | * and the Open Software Foundation, Inc. |
| 18 | */ |
| 19 | |
| 20 | #include <stdarg.h> |
| 21 | #include <linux/types.h> |
| 22 | #include <linux/errno.h> |
| 23 | #include <linux/kernel.h> |
| 24 | #include <linux/delay.h> |
| 25 | #include <linux/sched.h> |
| 26 | #include <linux/miscdevice.h> |
| 27 | #include <linux/blkdev.h> |
| 28 | #include <linux/pci.h> |
| 29 | #include <linux/slab.h> |
| 30 | #include <linux/init.h> |
| 31 | #include <linux/interrupt.h> |
| 32 | |
| 33 | #include <linux/adb.h> |
| 34 | #include <linux/pmu.h> |
| 35 | #include <linux/cuda.h> |
| 36 | |
| 37 | #include <asm/macintosh.h> |
| 38 | #include <asm/macints.h> |
| 39 | #include <asm/machw.h> |
| 40 | #include <asm/mac_via.h> |
| 41 | |
| 42 | #include <asm/pgtable.h> |
| 43 | #include <asm/system.h> |
| 44 | #include <asm/irq.h> |
| 45 | #include <asm/uaccess.h> |
| 46 | |
| 47 | /* Misc minor number allocated for /dev/pmu */ |
| 48 | #define PMU_MINOR 154 |
| 49 | |
| 50 | /* VIA registers - spaced 0x200 bytes apart */ |
| 51 | #define RS 0x200 /* skip between registers */ |
| 52 | #define B 0 /* B-side data */ |
| 53 | #define A RS /* A-side data */ |
| 54 | #define DIRB (2*RS) /* B-side direction (1=output) */ |
| 55 | #define DIRA (3*RS) /* A-side direction (1=output) */ |
| 56 | #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */ |
| 57 | #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */ |
| 58 | #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */ |
| 59 | #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */ |
| 60 | #define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */ |
| 61 | #define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */ |
| 62 | #define SR (10*RS) /* Shift register */ |
| 63 | #define ACR (11*RS) /* Auxiliary control register */ |
| 64 | #define PCR (12*RS) /* Peripheral control register */ |
| 65 | #define IFR (13*RS) /* Interrupt flag register */ |
| 66 | #define IER (14*RS) /* Interrupt enable register */ |
| 67 | #define ANH (15*RS) /* A-side data, no handshake */ |
| 68 | |
| 69 | /* Bits in B data register: both active low */ |
| 70 | #define TACK 0x02 /* Transfer acknowledge (input) */ |
| 71 | #define TREQ 0x04 /* Transfer request (output) */ |
| 72 | |
| 73 | /* Bits in ACR */ |
| 74 | #define SR_CTRL 0x1c /* Shift register control bits */ |
| 75 | #define SR_EXT 0x0c /* Shift on external clock */ |
| 76 | #define SR_OUT 0x10 /* Shift out if 1 */ |
| 77 | |
| 78 | /* Bits in IFR and IER */ |
| 79 | #define SR_INT 0x04 /* Shift register full/empty */ |
| 80 | #define CB1_INT 0x10 /* transition on CB1 input */ |
| 81 | |
| 82 | static enum pmu_state { |
| 83 | idle, |
| 84 | sending, |
| 85 | intack, |
| 86 | reading, |
| 87 | reading_intr, |
| 88 | } pmu_state; |
| 89 | |
| 90 | static struct adb_request *current_req; |
| 91 | static struct adb_request *last_req; |
| 92 | static struct adb_request *req_awaiting_reply; |
| 93 | static unsigned char interrupt_data[32]; |
| 94 | static unsigned char *reply_ptr; |
| 95 | static int data_index; |
| 96 | static int data_len; |
| 97 | static int adb_int_pending; |
| 98 | static int pmu_adb_flags; |
| 99 | static int adb_dev_map = 0; |
| 100 | static struct adb_request bright_req_1, bright_req_2, bright_req_3; |
| 101 | static int pmu_kind = PMU_UNKNOWN; |
| 102 | static int pmu_fully_inited = 0; |
| 103 | |
| 104 | int asleep; |
| 105 | struct notifier_block *sleep_notifier_list; |
| 106 | |
| 107 | static int pmu_probe(void); |
| 108 | static int pmu_init(void); |
| 109 | static void pmu_start(void); |
| 110 | static irqreturn_t pmu_interrupt(int irq, void *arg, struct pt_regs *regs); |
| 111 | static int pmu_send_request(struct adb_request *req, int sync); |
| 112 | static int pmu_autopoll(int devs); |
| 113 | void pmu_poll(void); |
| 114 | static int pmu_reset_bus(void); |
| 115 | static int pmu_queue_request(struct adb_request *req); |
| 116 | |
| 117 | static void pmu_start(void); |
| 118 | static void send_byte(int x); |
| 119 | static void recv_byte(void); |
| 120 | static void pmu_done(struct adb_request *req); |
| 121 | static void pmu_handle_data(unsigned char *data, int len, |
| 122 | struct pt_regs *regs); |
| 123 | static void set_volume(int level); |
| 124 | static void pmu_enable_backlight(int on); |
| 125 | static void pmu_set_brightness(int level); |
| 126 | |
| 127 | struct adb_driver via_pmu_driver = { |
| 128 | "68K PMU", |
| 129 | pmu_probe, |
| 130 | pmu_init, |
| 131 | pmu_send_request, |
| 132 | pmu_autopoll, |
| 133 | pmu_poll, |
| 134 | pmu_reset_bus |
| 135 | }; |
| 136 | |
| 137 | /* |
| 138 | * This table indicates for each PMU opcode: |
| 139 | * - the number of data bytes to be sent with the command, or -1 |
| 140 | * if a length byte should be sent, |
| 141 | * - the number of response bytes which the PMU will return, or |
| 142 | * -1 if it will send a length byte. |
| 143 | */ |
| 144 | static s8 pmu_data_len[256][2] = { |
| 145 | /* 0 1 2 3 4 5 6 7 */ |
| 146 | /*00*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, |
| 147 | /*08*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, |
| 148 | /*10*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, |
| 149 | /*18*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0}, |
| 150 | /*20*/ {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0}, |
| 151 | /*28*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1}, |
| 152 | /*30*/ { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, |
| 153 | /*38*/ { 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0}, |
| 154 | /*40*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, |
| 155 | /*48*/ { 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1}, |
| 156 | /*50*/ { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0}, |
| 157 | /*58*/ { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1}, |
| 158 | /*60*/ { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, |
| 159 | /*68*/ { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1}, |
| 160 | /*70*/ { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, |
| 161 | /*78*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1}, |
| 162 | /*80*/ { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, |
| 163 | /*88*/ { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, |
| 164 | /*90*/ { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, |
| 165 | /*98*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, |
| 166 | /*a0*/ { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0}, |
| 167 | /*a8*/ { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, |
| 168 | /*b0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, |
| 169 | /*b8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, |
| 170 | /*c0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, |
| 171 | /*c8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, |
| 172 | /*d0*/ { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, |
| 173 | /*d8*/ { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1}, |
| 174 | /*e0*/ {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0}, |
| 175 | /*e8*/ { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0}, |
| 176 | /*f0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, |
| 177 | /*f8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, |
| 178 | }; |
| 179 | |
| 180 | int pmu_probe(void) |
| 181 | { |
| 182 | if (macintosh_config->adb_type == MAC_ADB_PB1) { |
| 183 | pmu_kind = PMU_68K_V1; |
| 184 | } else if (macintosh_config->adb_type == MAC_ADB_PB2) { |
| 185 | pmu_kind = PMU_68K_V2; |
| 186 | } else { |
| 187 | return -ENODEV; |
| 188 | } |
| 189 | |
| 190 | pmu_state = idle; |
| 191 | |
| 192 | return 0; |
| 193 | } |
| 194 | |
| 195 | static int |
| 196 | pmu_init(void) |
| 197 | { |
| 198 | int timeout; |
| 199 | volatile struct adb_request req; |
| 200 | |
| 201 | via2[B] |= TREQ; /* negate TREQ */ |
| 202 | via2[DIRB] = (via2[DIRB] | TREQ) & ~TACK; /* TACK in, TREQ out */ |
| 203 | |
| 204 | pmu_request((struct adb_request *) &req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB); |
| 205 | timeout = 100000; |
| 206 | while (!req.complete) { |
| 207 | if (--timeout < 0) { |
| 208 | printk(KERN_ERR "pmu_init: no response from PMU\n"); |
| 209 | return -EAGAIN; |
| 210 | } |
| 211 | udelay(10); |
| 212 | pmu_poll(); |
| 213 | } |
| 214 | |
| 215 | /* ack all pending interrupts */ |
| 216 | timeout = 100000; |
| 217 | interrupt_data[0] = 1; |
| 218 | while (interrupt_data[0] || pmu_state != idle) { |
| 219 | if (--timeout < 0) { |
| 220 | printk(KERN_ERR "pmu_init: timed out acking intrs\n"); |
| 221 | return -EAGAIN; |
| 222 | } |
| 223 | if (pmu_state == idle) { |
| 224 | adb_int_pending = 1; |
| 225 | pmu_interrupt(0, NULL, NULL); |
| 226 | } |
| 227 | pmu_poll(); |
| 228 | udelay(10); |
| 229 | } |
| 230 | |
| 231 | pmu_request((struct adb_request *) &req, NULL, 2, PMU_SET_INTR_MASK, |
| 232 | PMU_INT_ADB_AUTO|PMU_INT_SNDBRT|PMU_INT_ADB); |
| 233 | timeout = 100000; |
| 234 | while (!req.complete) { |
| 235 | if (--timeout < 0) { |
| 236 | printk(KERN_ERR "pmu_init: no response from PMU\n"); |
| 237 | return -EAGAIN; |
| 238 | } |
| 239 | udelay(10); |
| 240 | pmu_poll(); |
| 241 | } |
| 242 | |
| 243 | bright_req_1.complete = 1; |
| 244 | bright_req_2.complete = 1; |
| 245 | bright_req_3.complete = 1; |
| 246 | |
| 247 | if (request_irq(IRQ_MAC_ADB_SR, pmu_interrupt, 0, "pmu-shift", |
| 248 | pmu_interrupt)) { |
| 249 | printk(KERN_ERR "pmu_init: can't get irq %d\n", |
| 250 | IRQ_MAC_ADB_SR); |
| 251 | return -EAGAIN; |
| 252 | } |
| 253 | if (request_irq(IRQ_MAC_ADB_CL, pmu_interrupt, 0, "pmu-clock", |
| 254 | pmu_interrupt)) { |
| 255 | printk(KERN_ERR "pmu_init: can't get irq %d\n", |
| 256 | IRQ_MAC_ADB_CL); |
| 257 | free_irq(IRQ_MAC_ADB_SR, pmu_interrupt); |
| 258 | return -EAGAIN; |
| 259 | } |
| 260 | |
| 261 | pmu_fully_inited = 1; |
| 262 | |
| 263 | /* Enable backlight */ |
| 264 | pmu_enable_backlight(1); |
| 265 | |
| 266 | printk("adb: PMU 68K driver v0.5 for Unified ADB.\n"); |
| 267 | |
| 268 | return 0; |
| 269 | } |
| 270 | |
| 271 | int |
| 272 | pmu_get_model(void) |
| 273 | { |
| 274 | return pmu_kind; |
| 275 | } |
| 276 | |
| 277 | /* Send an ADB command */ |
| 278 | static int |
| 279 | pmu_send_request(struct adb_request *req, int sync) |
| 280 | { |
| 281 | int i, ret; |
| 282 | |
| 283 | if (!pmu_fully_inited) |
| 284 | { |
| 285 | req->complete = 1; |
| 286 | return -ENXIO; |
| 287 | } |
| 288 | |
| 289 | ret = -EINVAL; |
| 290 | |
| 291 | switch (req->data[0]) { |
| 292 | case PMU_PACKET: |
| 293 | for (i = 0; i < req->nbytes - 1; ++i) |
| 294 | req->data[i] = req->data[i+1]; |
| 295 | --req->nbytes; |
| 296 | if (pmu_data_len[req->data[0]][1] != 0) { |
| 297 | req->reply[0] = ADB_RET_OK; |
| 298 | req->reply_len = 1; |
| 299 | } else |
| 300 | req->reply_len = 0; |
| 301 | ret = pmu_queue_request(req); |
| 302 | break; |
| 303 | case CUDA_PACKET: |
| 304 | switch (req->data[1]) { |
| 305 | case CUDA_GET_TIME: |
| 306 | if (req->nbytes != 2) |
| 307 | break; |
| 308 | req->data[0] = PMU_READ_RTC; |
| 309 | req->nbytes = 1; |
| 310 | req->reply_len = 3; |
| 311 | req->reply[0] = CUDA_PACKET; |
| 312 | req->reply[1] = 0; |
| 313 | req->reply[2] = CUDA_GET_TIME; |
| 314 | ret = pmu_queue_request(req); |
| 315 | break; |
| 316 | case CUDA_SET_TIME: |
| 317 | if (req->nbytes != 6) |
| 318 | break; |
| 319 | req->data[0] = PMU_SET_RTC; |
| 320 | req->nbytes = 5; |
| 321 | for (i = 1; i <= 4; ++i) |
| 322 | req->data[i] = req->data[i+1]; |
| 323 | req->reply_len = 3; |
| 324 | req->reply[0] = CUDA_PACKET; |
| 325 | req->reply[1] = 0; |
| 326 | req->reply[2] = CUDA_SET_TIME; |
| 327 | ret = pmu_queue_request(req); |
| 328 | break; |
| 329 | case CUDA_GET_PRAM: |
| 330 | if (req->nbytes != 4) |
| 331 | break; |
| 332 | req->data[0] = PMU_READ_NVRAM; |
| 333 | req->data[1] = req->data[2]; |
| 334 | req->data[2] = req->data[3]; |
| 335 | req->nbytes = 3; |
| 336 | req->reply_len = 3; |
| 337 | req->reply[0] = CUDA_PACKET; |
| 338 | req->reply[1] = 0; |
| 339 | req->reply[2] = CUDA_GET_PRAM; |
| 340 | ret = pmu_queue_request(req); |
| 341 | break; |
| 342 | case CUDA_SET_PRAM: |
| 343 | if (req->nbytes != 5) |
| 344 | break; |
| 345 | req->data[0] = PMU_WRITE_NVRAM; |
| 346 | req->data[1] = req->data[2]; |
| 347 | req->data[2] = req->data[3]; |
| 348 | req->data[3] = req->data[4]; |
| 349 | req->nbytes = 4; |
| 350 | req->reply_len = 3; |
| 351 | req->reply[0] = CUDA_PACKET; |
| 352 | req->reply[1] = 0; |
| 353 | req->reply[2] = CUDA_SET_PRAM; |
| 354 | ret = pmu_queue_request(req); |
| 355 | break; |
| 356 | } |
| 357 | break; |
| 358 | case ADB_PACKET: |
| 359 | for (i = req->nbytes - 1; i > 1; --i) |
| 360 | req->data[i+2] = req->data[i]; |
| 361 | req->data[3] = req->nbytes - 2; |
| 362 | req->data[2] = pmu_adb_flags; |
| 363 | /*req->data[1] = req->data[1];*/ |
| 364 | req->data[0] = PMU_ADB_CMD; |
| 365 | req->nbytes += 2; |
| 366 | req->reply_expected = 1; |
| 367 | req->reply_len = 0; |
| 368 | ret = pmu_queue_request(req); |
| 369 | break; |
| 370 | } |
| 371 | if (ret) |
| 372 | { |
| 373 | req->complete = 1; |
| 374 | return ret; |
| 375 | } |
| 376 | |
| 377 | if (sync) { |
| 378 | while (!req->complete) |
| 379 | pmu_poll(); |
| 380 | } |
| 381 | |
| 382 | return 0; |
| 383 | } |
| 384 | |
| 385 | /* Enable/disable autopolling */ |
| 386 | static int |
| 387 | pmu_autopoll(int devs) |
| 388 | { |
| 389 | struct adb_request req; |
| 390 | |
| 391 | if (!pmu_fully_inited) return -ENXIO; |
| 392 | |
| 393 | if (devs) { |
| 394 | adb_dev_map = devs; |
| 395 | pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86, |
| 396 | adb_dev_map >> 8, adb_dev_map); |
| 397 | pmu_adb_flags = 2; |
| 398 | } else { |
| 399 | pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF); |
| 400 | pmu_adb_flags = 0; |
| 401 | } |
| 402 | while (!req.complete) |
| 403 | pmu_poll(); |
| 404 | return 0; |
| 405 | } |
| 406 | |
| 407 | /* Reset the ADB bus */ |
| 408 | static int |
| 409 | pmu_reset_bus(void) |
| 410 | { |
| 411 | struct adb_request req; |
| 412 | long timeout; |
| 413 | int save_autopoll = adb_dev_map; |
| 414 | |
| 415 | if (!pmu_fully_inited) return -ENXIO; |
| 416 | |
| 417 | /* anyone got a better idea?? */ |
| 418 | pmu_autopoll(0); |
| 419 | |
| 420 | req.nbytes = 5; |
| 421 | req.done = NULL; |
| 422 | req.data[0] = PMU_ADB_CMD; |
| 423 | req.data[1] = 0; |
| 424 | req.data[2] = 3; /* ADB_BUSRESET ??? */ |
| 425 | req.data[3] = 0; |
| 426 | req.data[4] = 0; |
| 427 | req.reply_len = 0; |
| 428 | req.reply_expected = 1; |
| 429 | if (pmu_queue_request(&req) != 0) |
| 430 | { |
| 431 | printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n"); |
| 432 | return -EIO; |
| 433 | } |
| 434 | while (!req.complete) |
| 435 | pmu_poll(); |
| 436 | timeout = 100000; |
| 437 | while (!req.complete) { |
| 438 | if (--timeout < 0) { |
| 439 | printk(KERN_ERR "pmu_adb_reset_bus (reset): no response from PMU\n"); |
| 440 | return -EIO; |
| 441 | } |
| 442 | udelay(10); |
| 443 | pmu_poll(); |
| 444 | } |
| 445 | |
| 446 | if (save_autopoll != 0) |
| 447 | pmu_autopoll(save_autopoll); |
| 448 | |
| 449 | return 0; |
| 450 | } |
| 451 | |
| 452 | /* Construct and send a pmu request */ |
| 453 | int |
| 454 | pmu_request(struct adb_request *req, void (*done)(struct adb_request *), |
| 455 | int nbytes, ...) |
| 456 | { |
| 457 | va_list list; |
| 458 | int i; |
| 459 | |
| 460 | if (nbytes < 0 || nbytes > 32) { |
| 461 | printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes); |
| 462 | req->complete = 1; |
| 463 | return -EINVAL; |
| 464 | } |
| 465 | req->nbytes = nbytes; |
| 466 | req->done = done; |
| 467 | va_start(list, nbytes); |
| 468 | for (i = 0; i < nbytes; ++i) |
| 469 | req->data[i] = va_arg(list, int); |
| 470 | va_end(list); |
| 471 | if (pmu_data_len[req->data[0]][1] != 0) { |
| 472 | req->reply[0] = ADB_RET_OK; |
| 473 | req->reply_len = 1; |
| 474 | } else |
| 475 | req->reply_len = 0; |
| 476 | req->reply_expected = 0; |
| 477 | return pmu_queue_request(req); |
| 478 | } |
| 479 | |
| 480 | static int |
| 481 | pmu_queue_request(struct adb_request *req) |
| 482 | { |
| 483 | unsigned long flags; |
| 484 | int nsend; |
| 485 | |
| 486 | if (req->nbytes <= 0) { |
| 487 | req->complete = 1; |
| 488 | return 0; |
| 489 | } |
| 490 | nsend = pmu_data_len[req->data[0]][0]; |
| 491 | if (nsend >= 0 && req->nbytes != nsend + 1) { |
| 492 | req->complete = 1; |
| 493 | return -EINVAL; |
| 494 | } |
| 495 | |
| 496 | req->next = 0; |
| 497 | req->sent = 0; |
| 498 | req->complete = 0; |
| 499 | local_irq_save(flags); |
| 500 | |
| 501 | if (current_req != 0) { |
| 502 | last_req->next = req; |
| 503 | last_req = req; |
| 504 | } else { |
| 505 | current_req = req; |
| 506 | last_req = req; |
| 507 | if (pmu_state == idle) |
| 508 | pmu_start(); |
| 509 | } |
| 510 | |
| 511 | local_irq_restore(flags); |
| 512 | return 0; |
| 513 | } |
| 514 | |
| 515 | static void |
| 516 | send_byte(int x) |
| 517 | { |
| 518 | via1[ACR] |= SR_CTRL; |
| 519 | via1[SR] = x; |
| 520 | via2[B] &= ~TREQ; /* assert TREQ */ |
| 521 | } |
| 522 | |
| 523 | static void |
| 524 | recv_byte(void) |
| 525 | { |
| 526 | char c; |
| 527 | |
| 528 | via1[ACR] = (via1[ACR] | SR_EXT) & ~SR_OUT; |
| 529 | c = via1[SR]; /* resets SR */ |
| 530 | via2[B] &= ~TREQ; |
| 531 | } |
| 532 | |
| 533 | static void |
| 534 | pmu_start(void) |
| 535 | { |
| 536 | unsigned long flags; |
| 537 | struct adb_request *req; |
| 538 | |
| 539 | /* assert pmu_state == idle */ |
| 540 | /* get the packet to send */ |
| 541 | local_irq_save(flags); |
| 542 | req = current_req; |
| 543 | if (req == 0 || pmu_state != idle |
| 544 | || (req->reply_expected && req_awaiting_reply)) |
| 545 | goto out; |
| 546 | |
| 547 | pmu_state = sending; |
| 548 | data_index = 1; |
| 549 | data_len = pmu_data_len[req->data[0]][0]; |
| 550 | |
| 551 | /* set the shift register to shift out and send a byte */ |
| 552 | send_byte(req->data[0]); |
| 553 | |
| 554 | out: |
| 555 | local_irq_restore(flags); |
| 556 | } |
| 557 | |
| 558 | void |
| 559 | pmu_poll(void) |
| 560 | { |
| 561 | unsigned long flags; |
| 562 | |
| 563 | local_irq_save(flags); |
| 564 | if (via1[IFR] & SR_INT) { |
| 565 | via1[IFR] = SR_INT; |
| 566 | pmu_interrupt(IRQ_MAC_ADB_SR, NULL, NULL); |
| 567 | } |
| 568 | if (via1[IFR] & CB1_INT) { |
| 569 | via1[IFR] = CB1_INT; |
| 570 | pmu_interrupt(IRQ_MAC_ADB_CL, NULL, NULL); |
| 571 | } |
| 572 | local_irq_restore(flags); |
| 573 | } |
| 574 | |
| 575 | static irqreturn_t |
| 576 | pmu_interrupt(int irq, void *dev_id, struct pt_regs *regs) |
| 577 | { |
| 578 | struct adb_request *req; |
| 579 | int timeout, bite = 0; /* to prevent compiler warning */ |
| 580 | |
| 581 | #if 0 |
| 582 | printk("pmu_interrupt: irq %d state %d acr %02X, b %02X data_index %d/%d adb_int_pending %d\n", |
| 583 | irq, pmu_state, (uint) via1[ACR], (uint) via2[B], data_index, data_len, adb_int_pending); |
| 584 | #endif |
| 585 | |
| 586 | if (irq == IRQ_MAC_ADB_CL) { /* CB1 interrupt */ |
| 587 | adb_int_pending = 1; |
| 588 | } else if (irq == IRQ_MAC_ADB_SR) { /* SR interrupt */ |
| 589 | if (via2[B] & TACK) { |
| 590 | printk(KERN_DEBUG "PMU: SR_INT but ack still high! (%x)\n", via2[B]); |
| 591 | } |
| 592 | |
| 593 | /* if reading grab the byte */ |
| 594 | if ((via1[ACR] & SR_OUT) == 0) bite = via1[SR]; |
| 595 | |
| 596 | /* reset TREQ and wait for TACK to go high */ |
| 597 | via2[B] |= TREQ; |
| 598 | timeout = 3200; |
| 599 | while (!(via2[B] & TACK)) { |
| 600 | if (--timeout < 0) { |
| 601 | printk(KERN_ERR "PMU not responding (!ack)\n"); |
| 602 | goto finish; |
| 603 | } |
| 604 | udelay(10); |
| 605 | } |
| 606 | |
| 607 | switch (pmu_state) { |
| 608 | case sending: |
| 609 | req = current_req; |
| 610 | if (data_len < 0) { |
| 611 | data_len = req->nbytes - 1; |
| 612 | send_byte(data_len); |
| 613 | break; |
| 614 | } |
| 615 | if (data_index <= data_len) { |
| 616 | send_byte(req->data[data_index++]); |
| 617 | break; |
| 618 | } |
| 619 | req->sent = 1; |
| 620 | data_len = pmu_data_len[req->data[0]][1]; |
| 621 | if (data_len == 0) { |
| 622 | pmu_state = idle; |
| 623 | current_req = req->next; |
| 624 | if (req->reply_expected) |
| 625 | req_awaiting_reply = req; |
| 626 | else |
| 627 | pmu_done(req); |
| 628 | } else { |
| 629 | pmu_state = reading; |
| 630 | data_index = 0; |
| 631 | reply_ptr = req->reply + req->reply_len; |
| 632 | recv_byte(); |
| 633 | } |
| 634 | break; |
| 635 | |
| 636 | case intack: |
| 637 | data_index = 0; |
| 638 | data_len = -1; |
| 639 | pmu_state = reading_intr; |
| 640 | reply_ptr = interrupt_data; |
| 641 | recv_byte(); |
| 642 | break; |
| 643 | |
| 644 | case reading: |
| 645 | case reading_intr: |
| 646 | if (data_len == -1) { |
| 647 | data_len = bite; |
| 648 | if (bite > 32) |
| 649 | printk(KERN_ERR "PMU: bad reply len %d\n", |
| 650 | bite); |
| 651 | } else { |
| 652 | reply_ptr[data_index++] = bite; |
| 653 | } |
| 654 | if (data_index < data_len) { |
| 655 | recv_byte(); |
| 656 | break; |
| 657 | } |
| 658 | |
| 659 | if (pmu_state == reading_intr) { |
| 660 | pmu_handle_data(interrupt_data, data_index, regs); |
| 661 | } else { |
| 662 | req = current_req; |
| 663 | current_req = req->next; |
| 664 | req->reply_len += data_index; |
| 665 | pmu_done(req); |
| 666 | } |
| 667 | pmu_state = idle; |
| 668 | |
| 669 | break; |
| 670 | |
| 671 | default: |
| 672 | printk(KERN_ERR "pmu_interrupt: unknown state %d?\n", |
| 673 | pmu_state); |
| 674 | } |
| 675 | } |
| 676 | finish: |
| 677 | if (pmu_state == idle) { |
| 678 | if (adb_int_pending) { |
| 679 | pmu_state = intack; |
| 680 | send_byte(PMU_INT_ACK); |
| 681 | adb_int_pending = 0; |
| 682 | } else if (current_req) { |
| 683 | pmu_start(); |
| 684 | } |
| 685 | } |
| 686 | |
| 687 | #if 0 |
| 688 | printk("pmu_interrupt: exit state %d acr %02X, b %02X data_index %d/%d adb_int_pending %d\n", |
| 689 | pmu_state, (uint) via1[ACR], (uint) via2[B], data_index, data_len, adb_int_pending); |
| 690 | #endif |
| 691 | return IRQ_HANDLED; |
| 692 | } |
| 693 | |
| 694 | static void |
| 695 | pmu_done(struct adb_request *req) |
| 696 | { |
| 697 | req->complete = 1; |
| 698 | if (req->done) |
| 699 | (*req->done)(req); |
| 700 | } |
| 701 | |
| 702 | /* Interrupt data could be the result data from an ADB cmd */ |
| 703 | static void |
| 704 | pmu_handle_data(unsigned char *data, int len, struct pt_regs *regs) |
| 705 | { |
| 706 | static int show_pmu_ints = 1; |
| 707 | |
| 708 | asleep = 0; |
| 709 | if (len < 1) { |
| 710 | adb_int_pending = 0; |
| 711 | return; |
| 712 | } |
| 713 | if (data[0] & PMU_INT_ADB) { |
| 714 | if ((data[0] & PMU_INT_ADB_AUTO) == 0) { |
| 715 | struct adb_request *req = req_awaiting_reply; |
| 716 | if (req == 0) { |
| 717 | printk(KERN_ERR "PMU: extra ADB reply\n"); |
| 718 | return; |
| 719 | } |
| 720 | req_awaiting_reply = 0; |
| 721 | if (len <= 2) |
| 722 | req->reply_len = 0; |
| 723 | else { |
| 724 | memcpy(req->reply, data + 1, len - 1); |
| 725 | req->reply_len = len - 1; |
| 726 | } |
| 727 | pmu_done(req); |
| 728 | } else { |
| 729 | adb_input(data+1, len-1, regs, 1); |
| 730 | } |
| 731 | } else { |
| 732 | if (data[0] == 0x08 && len == 3) { |
| 733 | /* sound/brightness buttons pressed */ |
| 734 | pmu_set_brightness(data[1] >> 3); |
| 735 | set_volume(data[2]); |
| 736 | } else if (show_pmu_ints |
| 737 | && !(data[0] == PMU_INT_TICK && len == 1)) { |
| 738 | int i; |
| 739 | printk(KERN_DEBUG "pmu intr"); |
| 740 | for (i = 0; i < len; ++i) |
| 741 | printk(" %.2x", data[i]); |
| 742 | printk("\n"); |
| 743 | } |
| 744 | } |
| 745 | } |
| 746 | |
| 747 | int backlight_level = -1; |
| 748 | int backlight_enabled = 0; |
| 749 | |
| 750 | #define LEVEL_TO_BRIGHT(lev) ((lev) < 1? 0x7f: 0x4a - ((lev) << 1)) |
| 751 | |
| 752 | static void |
| 753 | pmu_enable_backlight(int on) |
| 754 | { |
| 755 | struct adb_request req; |
| 756 | |
| 757 | if (on) { |
| 758 | /* first call: get current backlight value */ |
| 759 | if (backlight_level < 0) { |
| 760 | switch(pmu_kind) { |
| 761 | case PMU_68K_V1: |
| 762 | case PMU_68K_V2: |
| 763 | pmu_request(&req, NULL, 3, PMU_READ_NVRAM, 0x14, 0xe); |
| 764 | while (!req.complete) |
| 765 | pmu_poll(); |
| 766 | printk(KERN_DEBUG "pmu: nvram returned bright: %d\n", (int)req.reply[1]); |
| 767 | backlight_level = req.reply[1]; |
| 768 | break; |
| 769 | default: |
| 770 | backlight_enabled = 0; |
| 771 | return; |
| 772 | } |
| 773 | } |
| 774 | pmu_request(&req, NULL, 2, PMU_BACKLIGHT_BRIGHT, |
| 775 | LEVEL_TO_BRIGHT(backlight_level)); |
| 776 | while (!req.complete) |
| 777 | pmu_poll(); |
| 778 | } |
| 779 | pmu_request(&req, NULL, 2, PMU_POWER_CTRL, |
| 780 | PMU_POW_BACKLIGHT | (on ? PMU_POW_ON : PMU_POW_OFF)); |
| 781 | while (!req.complete) |
| 782 | pmu_poll(); |
| 783 | backlight_enabled = on; |
| 784 | } |
| 785 | |
| 786 | static void |
| 787 | pmu_set_brightness(int level) |
| 788 | { |
| 789 | int bright; |
| 790 | |
| 791 | backlight_level = level; |
| 792 | bright = LEVEL_TO_BRIGHT(level); |
| 793 | if (!backlight_enabled) |
| 794 | return; |
| 795 | if (bright_req_1.complete) |
| 796 | pmu_request(&bright_req_1, NULL, 2, PMU_BACKLIGHT_BRIGHT, |
| 797 | bright); |
| 798 | if (bright_req_2.complete) |
| 799 | pmu_request(&bright_req_2, NULL, 2, PMU_POWER_CTRL, |
| 800 | PMU_POW_BACKLIGHT | (bright < 0x7f ? PMU_POW_ON : PMU_POW_OFF)); |
| 801 | } |
| 802 | |
| 803 | void |
| 804 | pmu_enable_irled(int on) |
| 805 | { |
| 806 | struct adb_request req; |
| 807 | |
| 808 | pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED | |
| 809 | (on ? PMU_POW_ON : PMU_POW_OFF)); |
| 810 | while (!req.complete) |
| 811 | pmu_poll(); |
| 812 | } |
| 813 | |
| 814 | static void |
| 815 | set_volume(int level) |
| 816 | { |
| 817 | } |
| 818 | |
| 819 | int |
| 820 | pmu_present(void) |
| 821 | { |
| 822 | return (pmu_kind != PMU_UNKNOWN); |
| 823 | } |
| 824 | |
| 825 | #if 0 /* needs some work for 68K */ |
| 826 | |
| 827 | /* |
| 828 | * This struct is used to store config register values for |
| 829 | * PCI devices which may get powered off when we sleep. |
| 830 | */ |
| 831 | static struct pci_save { |
| 832 | u16 command; |
| 833 | u16 cache_lat; |
| 834 | u16 intr; |
| 835 | } *pbook_pci_saves; |
| 836 | static int n_pbook_pci_saves; |
| 837 | |
| 838 | static inline void __openfirmware |
| 839 | pbook_pci_save(void) |
| 840 | { |
| 841 | int npci; |
| 842 | struct pci_dev *pd = NULL; |
| 843 | struct pci_save *ps; |
| 844 | |
| 845 | npci = 0; |
| 846 | while ((pd = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pd)) != NULL) |
| 847 | ++npci; |
| 848 | n_pbook_pci_saves = npci; |
| 849 | if (npci == 0) |
| 850 | return; |
| 851 | ps = (struct pci_save *) kmalloc(npci * sizeof(*ps), GFP_KERNEL); |
| 852 | pbook_pci_saves = ps; |
| 853 | if (ps == NULL) |
| 854 | return; |
| 855 | |
| 856 | pd = NULL; |
| 857 | while ((pd = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pd)) != NULL) { |
| 858 | pci_read_config_word(pd, PCI_COMMAND, &ps->command); |
| 859 | pci_read_config_word(pd, PCI_CACHE_LINE_SIZE, &ps->cache_lat); |
| 860 | pci_read_config_word(pd, PCI_INTERRUPT_LINE, &ps->intr); |
| 861 | ++ps; |
| 862 | --npci; |
| 863 | } |
| 864 | } |
| 865 | |
| 866 | static inline void __openfirmware |
| 867 | pbook_pci_restore(void) |
| 868 | { |
| 869 | u16 cmd; |
| 870 | struct pci_save *ps = pbook_pci_saves; |
| 871 | struct pci_dev *pd = NULL; |
| 872 | int j; |
| 873 | |
| 874 | while ((pd = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pd)) != NULL) { |
| 875 | if (ps->command == 0) |
| 876 | continue; |
| 877 | pci_read_config_word(pd, PCI_COMMAND, &cmd); |
| 878 | if ((ps->command & ~cmd) == 0) |
| 879 | continue; |
| 880 | switch (pd->hdr_type) { |
| 881 | case PCI_HEADER_TYPE_NORMAL: |
| 882 | for (j = 0; j < 6; ++j) |
| 883 | pci_write_config_dword(pd, |
| 884 | PCI_BASE_ADDRESS_0 + j*4, |
| 885 | pd->resource[j].start); |
| 886 | pci_write_config_dword(pd, PCI_ROM_ADDRESS, |
| 887 | pd->resource[PCI_ROM_RESOURCE].start); |
| 888 | pci_write_config_word(pd, PCI_CACHE_LINE_SIZE, |
| 889 | ps->cache_lat); |
| 890 | pci_write_config_word(pd, PCI_INTERRUPT_LINE, |
| 891 | ps->intr); |
| 892 | pci_write_config_word(pd, PCI_COMMAND, ps->command); |
| 893 | break; |
| 894 | /* other header types not restored at present */ |
| 895 | } |
| 896 | } |
| 897 | } |
| 898 | |
| 899 | /* |
| 900 | * Put the powerbook to sleep. |
| 901 | */ |
| 902 | #define IRQ_ENABLE ((unsigned int *)0xf3000024) |
| 903 | #define MEM_CTRL ((unsigned int *)0xf8000070) |
| 904 | |
| 905 | int __openfirmware powerbook_sleep(void) |
| 906 | { |
| 907 | int ret, i, x; |
| 908 | static int save_backlight; |
| 909 | static unsigned int save_irqen; |
| 910 | unsigned long msr; |
| 911 | unsigned int hid0; |
| 912 | unsigned long p, wait; |
| 913 | struct adb_request sleep_req; |
| 914 | |
| 915 | /* Notify device drivers */ |
| 916 | ret = notifier_call_chain(&sleep_notifier_list, PBOOK_SLEEP, NULL); |
| 917 | if (ret & NOTIFY_STOP_MASK) |
| 918 | return -EBUSY; |
| 919 | |
| 920 | /* Sync the disks. */ |
| 921 | /* XXX It would be nice to have some way to ensure that |
| 922 | * nobody is dirtying any new buffers while we wait. */ |
| 923 | sys_sync(); |
| 924 | |
| 925 | /* Turn off the display backlight */ |
| 926 | save_backlight = backlight_enabled; |
| 927 | if (save_backlight) |
| 928 | pmu_enable_backlight(0); |
| 929 | |
| 930 | /* Give the disks a little time to actually finish writing */ |
| 931 | for (wait = jiffies + (HZ/4); time_before(jiffies, wait); ) |
| 932 | mb(); |
| 933 | |
| 934 | /* Disable all interrupts except pmu */ |
| 935 | save_irqen = in_le32(IRQ_ENABLE); |
| 936 | for (i = 0; i < 32; ++i) |
| 937 | if (i != vias->intrs[0].line && (save_irqen & (1 << i))) |
| 938 | disable_irq(i); |
| 939 | asm volatile("mtdec %0" : : "r" (0x7fffffff)); |
| 940 | |
| 941 | /* Save the state of PCI config space for some slots */ |
| 942 | pbook_pci_save(); |
| 943 | |
| 944 | /* Set the memory controller to keep the memory refreshed |
| 945 | while we're asleep */ |
| 946 | for (i = 0x403f; i >= 0x4000; --i) { |
| 947 | out_be32(MEM_CTRL, i); |
| 948 | do { |
| 949 | x = (in_be32(MEM_CTRL) >> 16) & 0x3ff; |
| 950 | } while (x == 0); |
| 951 | if (x >= 0x100) |
| 952 | break; |
| 953 | } |
| 954 | |
| 955 | /* Ask the PMU to put us to sleep */ |
| 956 | pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T'); |
| 957 | while (!sleep_req.complete) |
| 958 | mb(); |
| 959 | /* displacement-flush the L2 cache - necessary? */ |
| 960 | for (p = KERNELBASE; p < KERNELBASE + 0x100000; p += 0x1000) |
| 961 | i = *(volatile int *)p; |
| 962 | asleep = 1; |
| 963 | |
| 964 | /* Put the CPU into sleep mode */ |
| 965 | asm volatile("mfspr %0,1008" : "=r" (hid0) :); |
| 966 | hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP; |
| 967 | asm volatile("mtspr 1008,%0" : : "r" (hid0)); |
| 968 | local_save_flags(msr); |
| 969 | msr |= MSR_POW | MSR_EE; |
| 970 | local_irq_restore(msr); |
| 971 | udelay(10); |
| 972 | |
| 973 | /* OK, we're awake again, start restoring things */ |
| 974 | out_be32(MEM_CTRL, 0x3f); |
| 975 | pbook_pci_restore(); |
| 976 | |
| 977 | /* wait for the PMU interrupt sequence to complete */ |
| 978 | while (asleep) |
| 979 | mb(); |
| 980 | |
| 981 | /* reenable interrupts */ |
| 982 | for (i = 0; i < 32; ++i) |
| 983 | if (i != vias->intrs[0].line && (save_irqen & (1 << i))) |
| 984 | enable_irq(i); |
| 985 | |
| 986 | /* Notify drivers */ |
| 987 | notifier_call_chain(&sleep_notifier_list, PBOOK_WAKE, NULL); |
| 988 | |
| 989 | /* reenable ADB autopoll */ |
| 990 | pmu_adb_autopoll(adb_dev_map); |
| 991 | |
| 992 | /* Turn on the screen backlight, if it was on before */ |
| 993 | if (save_backlight) |
| 994 | pmu_enable_backlight(1); |
| 995 | |
| 996 | /* Wait for the hard disk to spin up */ |
| 997 | |
| 998 | return 0; |
| 999 | } |
| 1000 | |
| 1001 | /* |
| 1002 | * Support for /dev/pmu device |
| 1003 | */ |
| 1004 | static int __openfirmware pmu_open(struct inode *inode, struct file *file) |
| 1005 | { |
| 1006 | return 0; |
| 1007 | } |
| 1008 | |
| 1009 | static ssize_t __openfirmware pmu_read(struct file *file, char *buf, |
| 1010 | size_t count, loff_t *ppos) |
| 1011 | { |
| 1012 | return 0; |
| 1013 | } |
| 1014 | |
| 1015 | static ssize_t __openfirmware pmu_write(struct file *file, const char *buf, |
| 1016 | size_t count, loff_t *ppos) |
| 1017 | { |
| 1018 | return 0; |
| 1019 | } |
| 1020 | |
| 1021 | /* Note: removed __openfirmware here since it causes link errors */ |
| 1022 | static int /*__openfirmware*/ pmu_ioctl(struct inode * inode, struct file *filp, |
| 1023 | u_int cmd, u_long arg) |
| 1024 | { |
| 1025 | int error; |
| 1026 | __u32 value; |
| 1027 | |
| 1028 | switch (cmd) { |
| 1029 | case PMU_IOC_SLEEP: |
| 1030 | return -ENOSYS; |
| 1031 | case PMU_IOC_GET_BACKLIGHT: |
| 1032 | return put_user(backlight_level, (__u32 *)arg); |
| 1033 | case PMU_IOC_SET_BACKLIGHT: |
| 1034 | error = get_user(value, (__u32 *)arg); |
| 1035 | if (!error) |
| 1036 | pmu_set_brightness(value); |
| 1037 | return error; |
| 1038 | case PMU_IOC_GET_MODEL: |
| 1039 | return put_user(pmu_kind, (__u32 *)arg); |
| 1040 | } |
| 1041 | return -EINVAL; |
| 1042 | } |
| 1043 | |
| 1044 | static struct file_operations pmu_device_fops = { |
| 1045 | .read = pmu_read, |
| 1046 | .write = pmu_write, |
| 1047 | .ioctl = pmu_ioctl, |
| 1048 | .open = pmu_open, |
| 1049 | }; |
| 1050 | |
| 1051 | static struct miscdevice pmu_device = { |
| 1052 | PMU_MINOR, "pmu", &pmu_device_fops |
| 1053 | }; |
| 1054 | |
| 1055 | void pmu_device_init(void) |
| 1056 | { |
| 1057 | if (!via) |
| 1058 | return; |
| 1059 | if (misc_register(&pmu_device) < 0) |
| 1060 | printk(KERN_ERR "via-pmu68k: cannot register misc device.\n"); |
| 1061 | } |
| 1062 | #endif /* CONFIG_PMAC_PBOOK */ |
| 1063 | |