blob: 601920860597a6ace7e0cd85d4e37fe946b840de [file] [log] [blame]
Tony Lindgren92105bb2005-09-07 17:20:26 +01001/*
2 * linux/arch/arm/plat-omap/dmtimer.c
3 *
4 * OMAP Dual-Mode Timers
5 *
Tarun Kanti DebBarma97933d62011-09-20 17:00:17 +05306 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
7 * Tarun Kanti DebBarma <tarun.kanti@ti.com>
8 * Thara Gopinath <thara@ti.com>
9 *
10 * dmtimer adaptation to platform_driver.
11 *
Tony Lindgren92105bb2005-09-07 17:20:26 +010012 * Copyright (C) 2005 Nokia Corporation
Timo Teras77900a22006-06-26 16:16:12 -070013 * OMAP2 support by Juha Yrjola
14 * API improvements and OMAP2 clock framework support by Timo Teras
Tony Lindgren92105bb2005-09-07 17:20:26 +010015 *
Santosh Shilimkar44169072009-05-28 14:16:04 -070016 * Copyright (C) 2009 Texas Instruments
17 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
18 *
Tony Lindgren92105bb2005-09-07 17:20:26 +010019 * This program is free software; you can redistribute it and/or modify it
20 * under the terms of the GNU General Public License as published by the
21 * Free Software Foundation; either version 2 of the License, or (at your
22 * option) any later version.
23 *
24 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
25 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
26 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
27 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
28 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
29 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 * You should have received a copy of the GNU General Public License along
34 * with this program; if not, write to the Free Software Foundation, Inc.,
35 * 675 Mass Ave, Cambridge, MA 02139, USA.
36 */
37
Russell Kingfced80c2008-09-06 12:10:45 +010038#include <linux/io.h>
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +053039#include <linux/slab.h>
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +053040#include <linux/err.h>
41
Tony Lindgrence491cf2009-10-20 09:40:47 -070042#include <plat/dmtimer.h>
Tony Lindgren92105bb2005-09-07 17:20:26 +010043
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +053044static LIST_HEAD(omap_timer_list);
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +053045static DEFINE_SPINLOCK(dm_timer_lock);
Tony Lindgren92105bb2005-09-07 17:20:26 +010046
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +053047/**
48 * omap_dm_timer_read_reg - read timer registers in posted and non-posted mode
49 * @timer: timer pointer over which read operation to perform
50 * @reg: lowest byte holds the register offset
51 *
52 * The posted mode bit is encoded in reg. Note that in posted mode write
53 * pending bit must be checked. Otherwise a read of a non completed write
54 * will produce an error.
Richard Woodruff0f0d0802008-07-03 12:24:30 +030055 */
56static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg)
Tony Lindgren92105bb2005-09-07 17:20:26 +010057{
Tony Lindgrenee17f112011-09-16 15:44:20 -070058 WARN_ON((reg & 0xff) < _OMAP_TIMER_WAKEUP_EN_OFFSET);
59 return __omap_dm_timer_read(timer, reg, timer->posted);
Timo Teras77900a22006-06-26 16:16:12 -070060}
61
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +053062/**
63 * omap_dm_timer_write_reg - write timer registers in posted and non-posted mode
64 * @timer: timer pointer over which write operation is to perform
65 * @reg: lowest byte holds the register offset
66 * @value: data to write into the register
67 *
68 * The posted mode bit is encoded in reg. Note that in posted mode the write
69 * pending bit must be checked. Otherwise a write on a register which has a
70 * pending write will be lost.
Richard Woodruff0f0d0802008-07-03 12:24:30 +030071 */
72static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg,
73 u32 value)
Timo Teras77900a22006-06-26 16:16:12 -070074{
Tony Lindgrenee17f112011-09-16 15:44:20 -070075 WARN_ON((reg & 0xff) < _OMAP_TIMER_WAKEUP_EN_OFFSET);
76 __omap_dm_timer_write(timer, reg, value, timer->posted);
Tony Lindgren92105bb2005-09-07 17:20:26 +010077}
78
Timo Teras77900a22006-06-26 16:16:12 -070079static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer)
Tony Lindgren92105bb2005-09-07 17:20:26 +010080{
Timo Teras77900a22006-06-26 16:16:12 -070081 int c;
82
Tony Lindgrenee17f112011-09-16 15:44:20 -070083 if (!timer->sys_stat)
84 return;
85
Timo Teras77900a22006-06-26 16:16:12 -070086 c = 0;
Tony Lindgrenee17f112011-09-16 15:44:20 -070087 while (!(__raw_readl(timer->sys_stat) & 1)) {
Timo Teras77900a22006-06-26 16:16:12 -070088 c++;
89 if (c > 100000) {
90 printk(KERN_ERR "Timer failed to reset\n");
91 return;
92 }
93 }
Tony Lindgren92105bb2005-09-07 17:20:26 +010094}
95
Timo Teras77900a22006-06-26 16:16:12 -070096static void omap_dm_timer_reset(struct omap_dm_timer *timer)
97{
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +053098 if (timer->pdev->id != 1) {
Timo Terase32f7ec2006-06-26 16:16:13 -070099 omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06);
100 omap_dm_timer_wait_for_reset(timer);
101 }
Timo Teras77900a22006-06-26 16:16:12 -0700102
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530103 __omap_dm_timer_reset(timer, 0, 0);
Richard Woodruff0f0d0802008-07-03 12:24:30 +0300104 timer->posted = 1;
Timo Teras77900a22006-06-26 16:16:12 -0700105}
106
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530107int omap_dm_timer_prepare(struct omap_dm_timer *timer)
Timo Teras77900a22006-06-26 16:16:12 -0700108{
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530109 struct dmtimer_platform_data *pdata = timer->pdev->dev.platform_data;
110 int ret;
111
112 timer->fclk = clk_get(&timer->pdev->dev, "fck");
113 if (WARN_ON_ONCE(IS_ERR_OR_NULL(timer->fclk))) {
114 timer->fclk = NULL;
115 dev_err(&timer->pdev->dev, ": No fclk handle.\n");
116 return -EINVAL;
117 }
118
Timo Teras12583a72006-09-25 12:41:42 +0300119 omap_dm_timer_enable(timer);
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530120
121 if (pdata->needs_manual_reset)
122 omap_dm_timer_reset(timer);
123
124 ret = omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ);
125
126 timer->posted = 1;
127 return ret;
Timo Teras77900a22006-06-26 16:16:12 -0700128}
129
130struct omap_dm_timer *omap_dm_timer_request(void)
131{
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530132 struct omap_dm_timer *timer = NULL, *t;
Timo Teras77900a22006-06-26 16:16:12 -0700133 unsigned long flags;
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530134 int ret = 0;
Timo Teras77900a22006-06-26 16:16:12 -0700135
136 spin_lock_irqsave(&dm_timer_lock, flags);
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530137 list_for_each_entry(t, &omap_timer_list, node) {
138 if (t->reserved)
Timo Teras77900a22006-06-26 16:16:12 -0700139 continue;
140
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530141 timer = t;
Timo Teras83379c82006-06-26 16:16:23 -0700142 timer->reserved = 1;
Timo Teras77900a22006-06-26 16:16:12 -0700143 break;
144 }
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530145
146 if (timer) {
147 ret = omap_dm_timer_prepare(timer);
148 if (ret) {
149 timer->reserved = 0;
150 timer = NULL;
151 }
152 }
Timo Teras77900a22006-06-26 16:16:12 -0700153 spin_unlock_irqrestore(&dm_timer_lock, flags);
154
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530155 if (!timer)
156 pr_debug("%s: timer request failed!\n", __func__);
Timo Teras83379c82006-06-26 16:16:23 -0700157
Timo Teras77900a22006-06-26 16:16:12 -0700158 return timer;
159}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700160EXPORT_SYMBOL_GPL(omap_dm_timer_request);
Timo Teras77900a22006-06-26 16:16:12 -0700161
162struct omap_dm_timer *omap_dm_timer_request_specific(int id)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100163{
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530164 struct omap_dm_timer *timer = NULL, *t;
Timo Teras77900a22006-06-26 16:16:12 -0700165 unsigned long flags;
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530166 int ret = 0;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100167
Timo Teras77900a22006-06-26 16:16:12 -0700168 spin_lock_irqsave(&dm_timer_lock, flags);
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530169 list_for_each_entry(t, &omap_timer_list, node) {
170 if (t->pdev->id == id && !t->reserved) {
171 timer = t;
172 timer->reserved = 1;
173 break;
174 }
Timo Teras77900a22006-06-26 16:16:12 -0700175 }
Tony Lindgren92105bb2005-09-07 17:20:26 +0100176
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530177 if (timer) {
178 ret = omap_dm_timer_prepare(timer);
179 if (ret) {
180 timer->reserved = 0;
181 timer = NULL;
182 }
183 }
Timo Teras77900a22006-06-26 16:16:12 -0700184 spin_unlock_irqrestore(&dm_timer_lock, flags);
185
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530186 if (!timer)
187 pr_debug("%s: timer%d request failed!\n", __func__, id);
Timo Teras83379c82006-06-26 16:16:23 -0700188
Timo Teras77900a22006-06-26 16:16:12 -0700189 return timer;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100190}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700191EXPORT_SYMBOL_GPL(omap_dm_timer_request_specific);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100192
Timo Teras77900a22006-06-26 16:16:12 -0700193void omap_dm_timer_free(struct omap_dm_timer *timer)
194{
Timo Teras12583a72006-09-25 12:41:42 +0300195 omap_dm_timer_disable(timer);
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530196 clk_put(timer->fclk);
Timo Terasfa4bb622006-09-25 12:41:35 +0300197
Timo Teras77900a22006-06-26 16:16:12 -0700198 WARN_ON(!timer->reserved);
199 timer->reserved = 0;
200}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700201EXPORT_SYMBOL_GPL(omap_dm_timer_free);
Timo Teras77900a22006-06-26 16:16:12 -0700202
Timo Teras12583a72006-09-25 12:41:42 +0300203void omap_dm_timer_enable(struct omap_dm_timer *timer)
204{
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530205 struct dmtimer_platform_data *pdata = timer->pdev->dev.platform_data;
206
Timo Teras12583a72006-09-25 12:41:42 +0300207 if (timer->enabled)
208 return;
209
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530210 if (!pdata->needs_manual_reset) {
Tony Lindgren882c0512010-02-12 12:26:46 -0800211 clk_enable(timer->fclk);
212 clk_enable(timer->iclk);
213 }
Timo Teras12583a72006-09-25 12:41:42 +0300214
215 timer->enabled = 1;
216}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700217EXPORT_SYMBOL_GPL(omap_dm_timer_enable);
Timo Teras12583a72006-09-25 12:41:42 +0300218
219void omap_dm_timer_disable(struct omap_dm_timer *timer)
220{
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530221 struct dmtimer_platform_data *pdata = timer->pdev->dev.platform_data;
222
Timo Teras12583a72006-09-25 12:41:42 +0300223 if (!timer->enabled)
224 return;
225
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530226 if (!pdata->needs_manual_reset) {
Tony Lindgren882c0512010-02-12 12:26:46 -0800227 clk_disable(timer->iclk);
228 clk_disable(timer->fclk);
229 }
Timo Teras12583a72006-09-25 12:41:42 +0300230
231 timer->enabled = 0;
232}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700233EXPORT_SYMBOL_GPL(omap_dm_timer_disable);
Timo Teras12583a72006-09-25 12:41:42 +0300234
Timo Teras77900a22006-06-26 16:16:12 -0700235int omap_dm_timer_get_irq(struct omap_dm_timer *timer)
236{
237 return timer->irq;
238}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700239EXPORT_SYMBOL_GPL(omap_dm_timer_get_irq);
Timo Teras77900a22006-06-26 16:16:12 -0700240
241#if defined(CONFIG_ARCH_OMAP1)
242
Tony Lindgrena569c6e2006-04-02 17:46:21 +0100243/**
244 * omap_dm_timer_modify_idlect_mask - Check if any running timers use ARMXOR
245 * @inputmask: current value of idlect mask
246 */
247__u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
248{
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530249 int i = 0;
250 struct omap_dm_timer *timer = NULL;
251 unsigned long flags;
Tony Lindgrena569c6e2006-04-02 17:46:21 +0100252
253 /* If ARMXOR cannot be idled this function call is unnecessary */
254 if (!(inputmask & (1 << 1)))
255 return inputmask;
256
257 /* If any active timer is using ARMXOR return modified mask */
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530258 spin_lock_irqsave(&dm_timer_lock, flags);
259 list_for_each_entry(timer, &omap_timer_list, node) {
Timo Teras77900a22006-06-26 16:16:12 -0700260 u32 l;
261
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530262 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
Timo Teras77900a22006-06-26 16:16:12 -0700263 if (l & OMAP_TIMER_CTRL_ST) {
264 if (((omap_readl(MOD_CONF_CTRL_1) >> (i * 2)) & 0x03) == 0)
Tony Lindgrena569c6e2006-04-02 17:46:21 +0100265 inputmask &= ~(1 << 1);
266 else
267 inputmask &= ~(1 << 2);
268 }
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530269 i++;
Timo Teras77900a22006-06-26 16:16:12 -0700270 }
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530271 spin_unlock_irqrestore(&dm_timer_lock, flags);
Tony Lindgrena569c6e2006-04-02 17:46:21 +0100272
273 return inputmask;
274}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700275EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
Tony Lindgrena569c6e2006-04-02 17:46:21 +0100276
Tony Lindgren140455f2010-02-12 12:26:48 -0800277#else
Timo Teras77900a22006-06-26 16:16:12 -0700278
279struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
280{
Timo Terasfa4bb622006-09-25 12:41:35 +0300281 return timer->fclk;
Timo Teras77900a22006-06-26 16:16:12 -0700282}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700283EXPORT_SYMBOL_GPL(omap_dm_timer_get_fclk);
Timo Teras77900a22006-06-26 16:16:12 -0700284
285__u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
286{
287 BUG();
Dirk Behme21218802006-12-06 17:14:00 -0800288
289 return 0;
Timo Teras77900a22006-06-26 16:16:12 -0700290}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700291EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
Timo Teras77900a22006-06-26 16:16:12 -0700292
293#endif
294
295void omap_dm_timer_trigger(struct omap_dm_timer *timer)
296{
297 omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
298}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700299EXPORT_SYMBOL_GPL(omap_dm_timer_trigger);
Timo Teras77900a22006-06-26 16:16:12 -0700300
301void omap_dm_timer_start(struct omap_dm_timer *timer)
302{
303 u32 l;
304
305 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
306 if (!(l & OMAP_TIMER_CTRL_ST)) {
307 l |= OMAP_TIMER_CTRL_ST;
308 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
309 }
310}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700311EXPORT_SYMBOL_GPL(omap_dm_timer_start);
Timo Teras77900a22006-06-26 16:16:12 -0700312
313void omap_dm_timer_stop(struct omap_dm_timer *timer)
314{
Tony Lindgrencaf64f22011-03-29 15:54:48 -0700315 unsigned long rate = 0;
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530316 struct dmtimer_platform_data *pdata = timer->pdev->dev.platform_data;
Timo Teras77900a22006-06-26 16:16:12 -0700317
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530318 if (!pdata->needs_manual_reset)
319 rate = clk_get_rate(timer->fclk);
Tony Lindgrencaf64f22011-03-29 15:54:48 -0700320
Tony Lindgrenee17f112011-09-16 15:44:20 -0700321 __omap_dm_timer_stop(timer, timer->posted, rate);
Timo Teras77900a22006-06-26 16:16:12 -0700322}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700323EXPORT_SYMBOL_GPL(omap_dm_timer_stop);
Timo Teras77900a22006-06-26 16:16:12 -0700324
Paul Walmsleyf2480762009-04-23 21:11:10 -0600325int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100326{
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530327 int ret;
328 struct dmtimer_platform_data *pdata = timer->pdev->dev.platform_data;
329
Timo Teras77900a22006-06-26 16:16:12 -0700330 if (source < 0 || source >= 3)
Paul Walmsleyf2480762009-04-23 21:11:10 -0600331 return -EINVAL;
Timo Teras77900a22006-06-26 16:16:12 -0700332
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530333 omap_dm_timer_disable(timer);
334 ret = pdata->set_timer_src(timer->pdev, source);
335 omap_dm_timer_enable(timer);
336
337 return ret;
Timo Teras77900a22006-06-26 16:16:12 -0700338}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700339EXPORT_SYMBOL_GPL(omap_dm_timer_set_source);
Timo Teras77900a22006-06-26 16:16:12 -0700340
Timo Teras77900a22006-06-26 16:16:12 -0700341void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
342 unsigned int load)
343{
344 u32 l;
345
346 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
347 if (autoreload)
348 l |= OMAP_TIMER_CTRL_AR;
349 else
350 l &= ~OMAP_TIMER_CTRL_AR;
351 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
352 omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load);
Richard Woodruff0f0d0802008-07-03 12:24:30 +0300353
Timo Teras77900a22006-06-26 16:16:12 -0700354 omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
355}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700356EXPORT_SYMBOL_GPL(omap_dm_timer_set_load);
Timo Teras77900a22006-06-26 16:16:12 -0700357
Richard Woodruff3fddd092008-07-03 12:24:30 +0300358/* Optimized set_load which removes costly spin wait in timer_start */
359void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
360 unsigned int load)
361{
362 u32 l;
363
364 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
Paul Walmsley64ce2902008-12-10 17:36:34 -0800365 if (autoreload) {
Richard Woodruff3fddd092008-07-03 12:24:30 +0300366 l |= OMAP_TIMER_CTRL_AR;
Paul Walmsley64ce2902008-12-10 17:36:34 -0800367 omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load);
368 } else {
Richard Woodruff3fddd092008-07-03 12:24:30 +0300369 l &= ~OMAP_TIMER_CTRL_AR;
Paul Walmsley64ce2902008-12-10 17:36:34 -0800370 }
Richard Woodruff3fddd092008-07-03 12:24:30 +0300371 l |= OMAP_TIMER_CTRL_ST;
372
Tony Lindgrenee17f112011-09-16 15:44:20 -0700373 __omap_dm_timer_load_start(timer, l, load, timer->posted);
Richard Woodruff3fddd092008-07-03 12:24:30 +0300374}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700375EXPORT_SYMBOL_GPL(omap_dm_timer_set_load_start);
Richard Woodruff3fddd092008-07-03 12:24:30 +0300376
Timo Teras77900a22006-06-26 16:16:12 -0700377void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
378 unsigned int match)
379{
380 u32 l;
381
382 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
Timo Teras83379c82006-06-26 16:16:23 -0700383 if (enable)
Timo Teras77900a22006-06-26 16:16:12 -0700384 l |= OMAP_TIMER_CTRL_CE;
385 else
386 l &= ~OMAP_TIMER_CTRL_CE;
387 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
388 omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG, match);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100389}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700390EXPORT_SYMBOL_GPL(omap_dm_timer_set_match);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100391
Timo Teras77900a22006-06-26 16:16:12 -0700392void omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on,
393 int toggle, int trigger)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100394{
Timo Teras77900a22006-06-26 16:16:12 -0700395 u32 l;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100396
Timo Teras77900a22006-06-26 16:16:12 -0700397 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
398 l &= ~(OMAP_TIMER_CTRL_GPOCFG | OMAP_TIMER_CTRL_SCPWM |
399 OMAP_TIMER_CTRL_PT | (0x03 << 10));
400 if (def_on)
401 l |= OMAP_TIMER_CTRL_SCPWM;
402 if (toggle)
403 l |= OMAP_TIMER_CTRL_PT;
404 l |= trigger << 10;
405 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
406}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700407EXPORT_SYMBOL_GPL(omap_dm_timer_set_pwm);
Timo Teras77900a22006-06-26 16:16:12 -0700408
409void omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler)
410{
411 u32 l;
412
413 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
414 l &= ~(OMAP_TIMER_CTRL_PRE | (0x07 << 2));
415 if (prescaler >= 0x00 && prescaler <= 0x07) {
416 l |= OMAP_TIMER_CTRL_PRE;
417 l |= prescaler << 2;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100418 }
Timo Teras77900a22006-06-26 16:16:12 -0700419 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100420}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700421EXPORT_SYMBOL_GPL(omap_dm_timer_set_prescaler);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100422
423void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
Timo Teras77900a22006-06-26 16:16:12 -0700424 unsigned int value)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100425{
Tony Lindgrenee17f112011-09-16 15:44:20 -0700426 __omap_dm_timer_int_enable(timer, value);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100427}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700428EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100429
430unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer)
431{
Timo Terasfa4bb622006-09-25 12:41:35 +0300432 unsigned int l;
433
Tony Lindgrenee17f112011-09-16 15:44:20 -0700434 l = __raw_readl(timer->irq_stat);
Timo Terasfa4bb622006-09-25 12:41:35 +0300435
436 return l;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100437}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700438EXPORT_SYMBOL_GPL(omap_dm_timer_read_status);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100439
440void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value)
441{
Tony Lindgrenee17f112011-09-16 15:44:20 -0700442 __omap_dm_timer_write_status(timer, value);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100443}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700444EXPORT_SYMBOL_GPL(omap_dm_timer_write_status);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100445
Tony Lindgren92105bb2005-09-07 17:20:26 +0100446unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer)
447{
Tony Lindgrenee17f112011-09-16 15:44:20 -0700448 return __omap_dm_timer_read_counter(timer, timer->posted);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100449}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700450EXPORT_SYMBOL_GPL(omap_dm_timer_read_counter);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100451
Timo Teras83379c82006-06-26 16:16:23 -0700452void omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value)
453{
Timo Terasfa4bb622006-09-25 12:41:35 +0300454 omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, value);
Timo Teras83379c82006-06-26 16:16:23 -0700455}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700456EXPORT_SYMBOL_GPL(omap_dm_timer_write_counter);
Timo Teras83379c82006-06-26 16:16:23 -0700457
Timo Teras77900a22006-06-26 16:16:12 -0700458int omap_dm_timers_active(void)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100459{
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530460 struct omap_dm_timer *timer;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100461
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530462 list_for_each_entry(timer, &omap_timer_list, node) {
Timo Teras12583a72006-09-25 12:41:42 +0300463 if (!timer->enabled)
464 continue;
465
Timo Teras77900a22006-06-26 16:16:12 -0700466 if (omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG) &
Timo Terasfa4bb622006-09-25 12:41:35 +0300467 OMAP_TIMER_CTRL_ST) {
Timo Teras77900a22006-06-26 16:16:12 -0700468 return 1;
Timo Terasfa4bb622006-09-25 12:41:35 +0300469 }
Tony Lindgren92105bb2005-09-07 17:20:26 +0100470 }
Tony Lindgren92105bb2005-09-07 17:20:26 +0100471 return 0;
472}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700473EXPORT_SYMBOL_GPL(omap_dm_timers_active);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100474
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530475/**
476 * omap_dm_timer_probe - probe function called for every registered device
477 * @pdev: pointer to current timer platform device
478 *
479 * Called by driver framework at the end of device registration for all
480 * timer devices.
481 */
482static int __devinit omap_dm_timer_probe(struct platform_device *pdev)
483{
484 int ret;
485 unsigned long flags;
486 struct omap_dm_timer *timer;
487 struct resource *mem, *irq, *ioarea;
488 struct dmtimer_platform_data *pdata = pdev->dev.platform_data;
489
490 if (!pdata) {
491 dev_err(&pdev->dev, "%s: no platform data.\n", __func__);
492 return -ENODEV;
493 }
494
495 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
496 if (unlikely(!irq)) {
497 dev_err(&pdev->dev, "%s: no IRQ resource.\n", __func__);
498 return -ENODEV;
499 }
500
501 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
502 if (unlikely(!mem)) {
503 dev_err(&pdev->dev, "%s: no memory resource.\n", __func__);
504 return -ENODEV;
505 }
506
507 ioarea = request_mem_region(mem->start, resource_size(mem),
508 pdev->name);
509 if (!ioarea) {
510 dev_err(&pdev->dev, "%s: region already claimed.\n", __func__);
511 return -EBUSY;
512 }
513
514 timer = kzalloc(sizeof(struct omap_dm_timer), GFP_KERNEL);
515 if (!timer) {
516 dev_err(&pdev->dev, "%s: no memory for omap_dm_timer.\n",
517 __func__);
518 ret = -ENOMEM;
519 goto err_free_ioregion;
520 }
521
522 timer->io_base = ioremap(mem->start, resource_size(mem));
523 if (!timer->io_base) {
524 dev_err(&pdev->dev, "%s: ioremap failed.\n", __func__);
525 ret = -ENOMEM;
526 goto err_free_mem;
527 }
528
529 timer->id = pdev->id;
530 timer->irq = irq->start;
531 timer->pdev = pdev;
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530532
533 /* add the timer element to the list */
534 spin_lock_irqsave(&dm_timer_lock, flags);
535 list_add_tail(&timer->node, &omap_timer_list);
536 spin_unlock_irqrestore(&dm_timer_lock, flags);
537
538 dev_dbg(&pdev->dev, "Device Probed.\n");
539
540 return 0;
541
542err_free_mem:
543 kfree(timer);
544
545err_free_ioregion:
546 release_mem_region(mem->start, resource_size(mem));
547
548 return ret;
549}
550
551/**
552 * omap_dm_timer_remove - cleanup a registered timer device
553 * @pdev: pointer to current timer platform device
554 *
555 * Called by driver framework whenever a timer device is unregistered.
556 * In addition to freeing platform resources it also deletes the timer
557 * entry from the local list.
558 */
559static int __devexit omap_dm_timer_remove(struct platform_device *pdev)
560{
561 struct omap_dm_timer *timer;
562 unsigned long flags;
563 int ret = -EINVAL;
564
565 spin_lock_irqsave(&dm_timer_lock, flags);
566 list_for_each_entry(timer, &omap_timer_list, node)
567 if (timer->pdev->id == pdev->id) {
568 list_del(&timer->node);
569 kfree(timer);
570 ret = 0;
571 break;
572 }
573 spin_unlock_irqrestore(&dm_timer_lock, flags);
574
575 return ret;
576}
577
578static struct platform_driver omap_dm_timer_driver = {
579 .probe = omap_dm_timer_probe,
580 .remove = omap_dm_timer_remove,
581 .driver = {
582 .name = "omap_timer",
583 },
584};
585
586static int __init omap_dm_timer_driver_init(void)
587{
588 return platform_driver_register(&omap_dm_timer_driver);
589}
590
591static void __exit omap_dm_timer_driver_exit(void)
592{
593 platform_driver_unregister(&omap_dm_timer_driver);
594}
595
596early_platform_init("earlytimer", &omap_dm_timer_driver);
597module_init(omap_dm_timer_driver_init);
598module_exit(omap_dm_timer_driver_exit);
599
600MODULE_DESCRIPTION("OMAP Dual-Mode Timer Driver");
601MODULE_LICENSE("GPL");
602MODULE_ALIAS("platform:" DRIVER_NAME);
603MODULE_AUTHOR("Texas Instruments Inc");