blob: 525c9c142891de94cdd8be49168f6ff431b36c6b [file] [log] [blame]
Jeff Garzik669a5db2006-08-29 18:12:40 -04001/*
Alan Coxc343a832007-05-25 20:39:30 +01002 * pata_it821x.c - IT821x PATA for new ATA layer
Jeff Garzik669a5db2006-08-29 18:12:40 -04003 * (C) 2005 Red Hat Inc
4 * Alan Cox <alan@redhat.com>
Bartlomiej Zolnierkiewicz374abf22007-06-11 11:40:07 +02005 * (C) 2007 Bartlomiej Zolnierkiewicz
Jeff Garzik669a5db2006-08-29 18:12:40 -04006 *
7 * based upon
8 *
9 * it821x.c
Jeff Garzik85cd7252006-08-31 00:03:49 -040010 *
Jeff Garzik669a5db2006-08-29 18:12:40 -040011 * linux/drivers/ide/pci/it821x.c Version 0.09 December 2004
12 *
13 * Copyright (C) 2004 Red Hat <alan@redhat.com>
14 *
15 * May be copied or modified under the terms of the GNU General Public License
16 * Based in part on the ITE vendor provided SCSI driver.
17 *
18 * Documentation available from
19 * http://www.ite.com.tw/pc/IT8212F_V04.pdf
20 * Some other documents are NDA.
21 *
22 * The ITE8212 isn't exactly a standard IDE controller. It has two
23 * modes. In pass through mode then it is an IDE controller. In its smart
24 * mode its actually quite a capable hardware raid controller disguised
25 * as an IDE controller. Smart mode only understands DMA read/write and
26 * identify, none of the fancier commands apply. The IT8211 is identical
27 * in other respects but lacks the raid mode.
28 *
29 * Errata:
30 * o Rev 0x10 also requires master/slave hold the same DMA timings and
31 * cannot do ATAPI MWDMA.
32 * o The identify data for raid volumes lacks CHS info (technically ok)
33 * but also fails to set the LBA28 and other bits. We fix these in
34 * the IDE probe quirk code.
35 * o If you write LBA48 sized I/O's (ie > 256 sector) in smart mode
36 * raid then the controller firmware dies
37 * o Smart mode without RAID doesn't clear all the necessary identify
38 * bits to reduce the command set to the one used
39 *
40 * This has a few impacts on the driver
41 * - In pass through mode we do all the work you would expect
42 * - In smart mode the clocking set up is done by the controller generally
43 * but we must watch the other limits and filter.
44 * - There are a few extra vendor commands that actually talk to the
45 * controller but only work PIO with no IRQ.
46 *
47 * Vendor areas of the identify block in smart mode are used for the
48 * timing and policy set up. Each HDD in raid mode also has a serial
49 * block on the disk. The hardware extra commands are get/set chip status,
50 * rebuild, get rebuild status.
51 *
52 * In Linux the driver supports pass through mode as if the device was
53 * just another IDE controller. If the smart mode is running then
54 * volumes are managed by the controller firmware and each IDE "disk"
55 * is a raid volume. Even more cute - the controller can do automated
56 * hotplug and rebuild.
57 *
58 * The pass through controller itself is a little demented. It has a
59 * flaw that it has a single set of PIO/MWDMA timings per channel so
60 * non UDMA devices restrict each others performance. It also has a
61 * single clock source per channel so mixed UDMA100/133 performance
62 * isn't perfect and we have to pick a clock. Thankfully none of this
63 * matters in smart mode. ATAPI DMA is not currently supported.
64 *
65 * It seems the smart mode is a win for RAID1/RAID10 but otherwise not.
66 *
67 * TODO
68 * - ATAPI and other speed filtering
Jeff Garzik669a5db2006-08-29 18:12:40 -040069 * - RAID configuration ioctls
70 */
71
72#include <linux/kernel.h>
73#include <linux/module.h>
74#include <linux/pci.h>
75#include <linux/init.h>
76#include <linux/blkdev.h>
77#include <linux/delay.h>
78#include <scsi/scsi_host.h>
79#include <linux/libata.h>
80
81
82#define DRV_NAME "pata_it821x"
Bartlomiej Zolnierkiewicz374abf22007-06-11 11:40:07 +020083#define DRV_VERSION "0.3.7"
Jeff Garzik669a5db2006-08-29 18:12:40 -040084
85struct it821x_dev
86{
87 unsigned int smart:1, /* Are we in smart raid mode */
88 timing10:1; /* Rev 0x10 */
89 u8 clock_mode; /* 0, ATA_50 or ATA_66 */
90 u8 want[2][2]; /* Mode/Pri log for master slave */
91 /* We need these for switching the clock when DMA goes on/off
92 The high byte is the 66Mhz timing */
93 u16 pio[2]; /* Cached PIO values */
94 u16 mwdma[2]; /* Cached MWDMA values */
95 u16 udma[2]; /* Cached UDMA values (per drive) */
96 u16 last_device; /* Master or slave loaded ? */
97};
98
99#define ATA_66 0
100#define ATA_50 1
101#define ATA_ANY 2
102
103#define UDMA_OFF 0
104#define MWDMA_OFF 0
105
106/*
107 * We allow users to force the card into non raid mode without
108 * flashing the alternative BIOS. This is also neccessary right now
109 * for embedded platforms that cannot run a PC BIOS but are using this
110 * device.
111 */
112
113static int it8212_noraid;
114
115/**
Jeff Garzik669a5db2006-08-29 18:12:40 -0400116 * it821x_program - program the PIO/MWDMA registers
117 * @ap: ATA port
118 * @adev: Device to program
119 * @timing: Timing value (66Mhz in top 8bits, 50 in the low 8)
120 *
121 * Program the PIO/MWDMA timing for this channel according to the
122 * current clock. These share the same register so are managed by
123 * the DMA start/stop sequence as with the old driver.
124 */
125
126static void it821x_program(struct ata_port *ap, struct ata_device *adev, u16 timing)
127{
128 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
129 struct it821x_dev *itdev = ap->private_data;
130 int channel = ap->port_no;
131 u8 conf;
132
133 /* Program PIO/MWDMA timing bits */
134 if (itdev->clock_mode == ATA_66)
135 conf = timing >> 8;
136 else
137 conf = timing & 0xFF;
138 pci_write_config_byte(pdev, 0x54 + 4 * channel, conf);
139}
140
141
142/**
143 * it821x_program_udma - program the UDMA registers
144 * @ap: ATA port
145 * @adev: ATA device to update
146 * @timing: Timing bits. Top 8 are for 66Mhz bottom for 50Mhz
147 *
148 * Program the UDMA timing for this drive according to the
149 * current clock. Handles the dual clocks and also knows about
150 * the errata on the 0x10 revision. The UDMA errata is partly handled
151 * here and partly in start_dma.
152 */
153
154static void it821x_program_udma(struct ata_port *ap, struct ata_device *adev, u16 timing)
155{
156 struct it821x_dev *itdev = ap->private_data;
157 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
158 int channel = ap->port_no;
159 int unit = adev->devno;
160 u8 conf;
161
162 /* Program UDMA timing bits */
163 if (itdev->clock_mode == ATA_66)
164 conf = timing >> 8;
165 else
166 conf = timing & 0xFF;
167 if (itdev->timing10 == 0)
168 pci_write_config_byte(pdev, 0x56 + 4 * channel + unit, conf);
169 else {
170 /* Early revision must be programmed for both together */
171 pci_write_config_byte(pdev, 0x56 + 4 * channel, conf);
172 pci_write_config_byte(pdev, 0x56 + 4 * channel + 1, conf);
173 }
174}
175
176/**
177 * it821x_clock_strategy
178 * @ap: ATA interface
179 * @adev: ATA device being updated
180 *
181 * Select between the 50 and 66Mhz base clocks to get the best
182 * results for this interface.
183 */
184
185static void it821x_clock_strategy(struct ata_port *ap, struct ata_device *adev)
186{
187 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
188 struct it821x_dev *itdev = ap->private_data;
189 u8 unit = adev->devno;
190 struct ata_device *pair = ata_dev_pair(adev);
191
192 int clock, altclock;
193 u8 v;
194 int sel = 0;
195
196 /* Look for the most wanted clocking */
197 if (itdev->want[0][0] > itdev->want[1][0]) {
198 clock = itdev->want[0][1];
199 altclock = itdev->want[1][1];
200 } else {
201 clock = itdev->want[1][1];
202 altclock = itdev->want[0][1];
203 }
204
205 /* Master doesn't care does the slave ? */
206 if (clock == ATA_ANY)
207 clock = altclock;
208
209 /* Nobody cares - keep the same clock */
210 if (clock == ATA_ANY)
211 return;
212 /* No change */
213 if (clock == itdev->clock_mode)
214 return;
215
216 /* Load this into the controller */
217 if (clock == ATA_66)
218 itdev->clock_mode = ATA_66;
219 else {
220 itdev->clock_mode = ATA_50;
221 sel = 1;
222 }
223 pci_read_config_byte(pdev, 0x50, &v);
224 v &= ~(1 << (1 + ap->port_no));
225 v |= sel << (1 + ap->port_no);
226 pci_write_config_byte(pdev, 0x50, v);
227
228 /*
229 * Reprogram the UDMA/PIO of the pair drive for the switch
230 * MWDMA will be dealt with by the dma switcher
231 */
232 if (pair && itdev->udma[1-unit] != UDMA_OFF) {
233 it821x_program_udma(ap, pair, itdev->udma[1-unit]);
234 it821x_program(ap, pair, itdev->pio[1-unit]);
235 }
236 /*
237 * Reprogram the UDMA/PIO of our drive for the switch.
238 * MWDMA will be dealt with by the dma switcher
239 */
240 if (itdev->udma[unit] != UDMA_OFF) {
241 it821x_program_udma(ap, adev, itdev->udma[unit]);
242 it821x_program(ap, adev, itdev->pio[unit]);
243 }
244}
245
246/**
247 * it821x_passthru_set_piomode - set PIO mode data
248 * @ap: ATA interface
249 * @adev: ATA device
250 *
251 * Configure for PIO mode. This is complicated as the register is
252 * shared by PIO and MWDMA and for both channels.
253 */
254
255static void it821x_passthru_set_piomode(struct ata_port *ap, struct ata_device *adev)
256{
257 /* Spec says 89 ref driver uses 88 */
258 static const u16 pio[] = { 0xAA88, 0xA382, 0xA181, 0x3332, 0x3121 };
259 static const u8 pio_want[] = { ATA_66, ATA_66, ATA_66, ATA_66, ATA_ANY };
260
261 struct it821x_dev *itdev = ap->private_data;
262 int unit = adev->devno;
263 int mode_wanted = adev->pio_mode - XFER_PIO_0;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400264
Jeff Garzik669a5db2006-08-29 18:12:40 -0400265 /* We prefer 66Mhz clock for PIO 0-3, don't care for PIO4 */
266 itdev->want[unit][1] = pio_want[mode_wanted];
267 itdev->want[unit][0] = 1; /* PIO is lowest priority */
268 itdev->pio[unit] = pio[mode_wanted];
269 it821x_clock_strategy(ap, adev);
270 it821x_program(ap, adev, itdev->pio[unit]);
271}
272
273/**
274 * it821x_passthru_set_dmamode - set initial DMA mode data
275 * @ap: ATA interface
276 * @adev: ATA device
277 *
278 * Set up the DMA modes. The actions taken depend heavily on the mode
Jeff Garzik85cd7252006-08-31 00:03:49 -0400279 * to use. If UDMA is used as is hopefully the usual case then the
Jeff Garzik669a5db2006-08-29 18:12:40 -0400280 * timing register is private and we need only consider the clock. If
281 * we are using MWDMA then we have to manage the setting ourself as
282 * we switch devices and mode.
283 */
284
285static void it821x_passthru_set_dmamode(struct ata_port *ap, struct ata_device *adev)
286{
287 static const u16 dma[] = { 0x8866, 0x3222, 0x3121 };
288 static const u8 mwdma_want[] = { ATA_ANY, ATA_66, ATA_ANY };
289 static const u16 udma[] = { 0x4433, 0x4231, 0x3121, 0x2121, 0x1111, 0x2211, 0x1111 };
290 static const u8 udma_want[] = { ATA_ANY, ATA_50, ATA_ANY, ATA_66, ATA_66, ATA_50, ATA_66 };
291
292 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
293 struct it821x_dev *itdev = ap->private_data;
294 int channel = ap->port_no;
295 int unit = adev->devno;
296 u8 conf;
297
298 if (adev->dma_mode >= XFER_UDMA_0) {
299 int mode_wanted = adev->dma_mode - XFER_UDMA_0;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400300
Jeff Garzik669a5db2006-08-29 18:12:40 -0400301 itdev->want[unit][1] = udma_want[mode_wanted];
302 itdev->want[unit][0] = 3; /* UDMA is high priority */
303 itdev->mwdma[unit] = MWDMA_OFF;
304 itdev->udma[unit] = udma[mode_wanted];
305 if (mode_wanted >= 5)
306 itdev->udma[unit] |= 0x8080; /* UDMA 5/6 select on */
307
308 /* UDMA on. Again revision 0x10 must do the pair */
309 pci_read_config_byte(pdev, 0x50, &conf);
310 if (itdev->timing10)
311 conf &= channel ? 0x9F: 0xE7;
312 else
313 conf &= ~ (1 << (3 + 2 * channel + unit));
314 pci_write_config_byte(pdev, 0x50, conf);
315 it821x_clock_strategy(ap, adev);
316 it821x_program_udma(ap, adev, itdev->udma[unit]);
317 } else {
318 int mode_wanted = adev->dma_mode - XFER_MW_DMA_0;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400319
Jeff Garzik669a5db2006-08-29 18:12:40 -0400320 itdev->want[unit][1] = mwdma_want[mode_wanted];
321 itdev->want[unit][0] = 2; /* MWDMA is low priority */
322 itdev->mwdma[unit] = dma[mode_wanted];
323 itdev->udma[unit] = UDMA_OFF;
324
325 /* UDMA bits off - Revision 0x10 do them in pairs */
326 pci_read_config_byte(pdev, 0x50, &conf);
327 if (itdev->timing10)
328 conf |= channel ? 0x60: 0x18;
329 else
330 conf |= 1 << (3 + 2 * channel + unit);
331 pci_write_config_byte(pdev, 0x50, conf);
332 it821x_clock_strategy(ap, adev);
333 }
334}
335
336/**
337 * it821x_passthru_dma_start - DMA start callback
338 * @qc: Command in progress
339 *
340 * Usually drivers set the DMA timing at the point the set_dmamode call
Jeff Garzik85cd7252006-08-31 00:03:49 -0400341 * is made. IT821x however requires we load new timings on the
Jeff Garzik669a5db2006-08-29 18:12:40 -0400342 * transitions in some cases.
343 */
344
345static void it821x_passthru_bmdma_start(struct ata_queued_cmd *qc)
346{
347 struct ata_port *ap = qc->ap;
348 struct ata_device *adev = qc->dev;
349 struct it821x_dev *itdev = ap->private_data;
350 int unit = adev->devno;
351
352 if (itdev->mwdma[unit] != MWDMA_OFF)
353 it821x_program(ap, adev, itdev->mwdma[unit]);
354 else if (itdev->udma[unit] != UDMA_OFF && itdev->timing10)
355 it821x_program_udma(ap, adev, itdev->udma[unit]);
356 ata_bmdma_start(qc);
357}
358
359/**
360 * it821x_passthru_dma_stop - DMA stop callback
361 * @qc: ATA command
362 *
363 * We loaded new timings in dma_start, as a result we need to restore
364 * the PIO timings in dma_stop so that the next command issue gets the
365 * right clock values.
366 */
367
368static void it821x_passthru_bmdma_stop(struct ata_queued_cmd *qc)
369{
370 struct ata_port *ap = qc->ap;
371 struct ata_device *adev = qc->dev;
372 struct it821x_dev *itdev = ap->private_data;
373 int unit = adev->devno;
374
375 ata_bmdma_stop(qc);
376 if (itdev->mwdma[unit] != MWDMA_OFF)
377 it821x_program(ap, adev, itdev->pio[unit]);
378}
379
380
381/**
382 * it821x_passthru_dev_select - Select master/slave
383 * @ap: ATA port
384 * @device: Device number (not pointer)
385 *
386 * Device selection hook. If neccessary perform clock switching
387 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400388
Jeff Garzik669a5db2006-08-29 18:12:40 -0400389static void it821x_passthru_dev_select(struct ata_port *ap,
390 unsigned int device)
391{
392 struct it821x_dev *itdev = ap->private_data;
393 if (itdev && device != itdev->last_device) {
394 struct ata_device *adev = &ap->device[device];
395 it821x_program(ap, adev, itdev->pio[adev->devno]);
396 itdev->last_device = device;
397 }
398 ata_std_dev_select(ap, device);
399}
400
401/**
402 * it821x_smart_qc_issue_prot - wrap qc issue prot
403 * @qc: command
404 *
405 * Wrap the command issue sequence for the IT821x. We need to
406 * perform out own device selection timing loads before the
407 * usual happenings kick off
408 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400409
Jeff Garzik669a5db2006-08-29 18:12:40 -0400410static unsigned int it821x_smart_qc_issue_prot(struct ata_queued_cmd *qc)
411{
412 switch(qc->tf.command)
413 {
414 /* Commands the firmware supports */
415 case ATA_CMD_READ:
416 case ATA_CMD_READ_EXT:
417 case ATA_CMD_WRITE:
418 case ATA_CMD_WRITE_EXT:
419 case ATA_CMD_PIO_READ:
420 case ATA_CMD_PIO_READ_EXT:
421 case ATA_CMD_PIO_WRITE:
422 case ATA_CMD_PIO_WRITE_EXT:
423 case ATA_CMD_READ_MULTI:
424 case ATA_CMD_READ_MULTI_EXT:
425 case ATA_CMD_WRITE_MULTI:
426 case ATA_CMD_WRITE_MULTI_EXT:
427 case ATA_CMD_ID_ATA:
428 /* Arguably should just no-op this one */
429 case ATA_CMD_SET_FEATURES:
430 return ata_qc_issue_prot(qc);
431 }
432 printk(KERN_DEBUG "it821x: can't process command 0x%02X\n", qc->tf.command);
433 return AC_ERR_INVALID;
434}
435
436/**
437 * it821x_passthru_qc_issue_prot - wrap qc issue prot
438 * @qc: command
439 *
440 * Wrap the command issue sequence for the IT821x. We need to
441 * perform out own device selection timing loads before the
442 * usual happenings kick off
443 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400444
Jeff Garzik669a5db2006-08-29 18:12:40 -0400445static unsigned int it821x_passthru_qc_issue_prot(struct ata_queued_cmd *qc)
446{
447 it821x_passthru_dev_select(qc->ap, qc->dev->devno);
448 return ata_qc_issue_prot(qc);
449}
450
451/**
452 * it821x_smart_set_mode - mode setting
453 * @ap: interface to set up
Alanb229a7b2007-01-24 11:47:07 +0000454 * @unused: device that failed (error only)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400455 *
456 * Use a non standard set_mode function. We don't want to be tuned.
457 * The BIOS configured everything. Our job is not to fiddle. We
458 * read the dma enabled bits from the PCI configuration of the device
Jeff Garzik85cd7252006-08-31 00:03:49 -0400459 * and respect them.
Jeff Garzik669a5db2006-08-29 18:12:40 -0400460 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400461
Alanb229a7b2007-01-24 11:47:07 +0000462static int it821x_smart_set_mode(struct ata_port *ap, struct ata_device **unused)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400463{
Jeff Garzik669a5db2006-08-29 18:12:40 -0400464 int i;
465
Jeff Garzik669a5db2006-08-29 18:12:40 -0400466 for (i = 0; i < ATA_MAX_DEVICES; i++) {
467 struct ata_device *dev = &ap->device[i];
468 if (ata_dev_enabled(dev)) {
469 /* We don't really care */
470 dev->pio_mode = XFER_PIO_0;
471 dev->dma_mode = XFER_MW_DMA_0;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400472 /* We do need the right mode information for DMA or PIO
Jeff Garzik669a5db2006-08-29 18:12:40 -0400473 and this comes from the current configuration flags */
Bartlomiej Zolnierkiewicz374abf22007-06-11 11:40:07 +0200474 if (ata_id_has_dma(dev->id)) {
Alan616ece22007-02-20 18:15:03 +0000475 ata_dev_printk(dev, KERN_INFO, "configured for DMA\n");
Jeff Garzik669a5db2006-08-29 18:12:40 -0400476 dev->xfer_mode = XFER_MW_DMA_0;
477 dev->xfer_shift = ATA_SHIFT_MWDMA;
478 dev->flags &= ~ATA_DFLAG_PIO;
479 } else {
Alan616ece22007-02-20 18:15:03 +0000480 ata_dev_printk(dev, KERN_INFO, "configured for PIO\n");
Jeff Garzik669a5db2006-08-29 18:12:40 -0400481 dev->xfer_mode = XFER_PIO_0;
482 dev->xfer_shift = ATA_SHIFT_PIO;
483 dev->flags |= ATA_DFLAG_PIO;
484 }
485 }
486 }
Alanb229a7b2007-01-24 11:47:07 +0000487 return 0;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400488}
489
490/**
491 * it821x_dev_config - Called each device identify
Jeff Garzik669a5db2006-08-29 18:12:40 -0400492 * @adev: Device that has just been identified
493 *
494 * Perform the initial setup needed for each device that is chip
495 * special. In our case we need to lock the sector count to avoid
496 * blowing the brains out of the firmware with large LBA48 requests
497 *
498 * FIXME: When FUA appears we need to block FUA too. And SMART and
499 * basically we need to filter commands for this chip.
500 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400501
Alancd0d3bb2007-03-02 00:56:15 +0000502static void it821x_dev_config(struct ata_device *adev)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400503{
Tejun Heo8bfa79f2007-01-02 20:19:40 +0900504 unsigned char model_num[ATA_ID_PROD_LEN + 1];
Jeff Garzik669a5db2006-08-29 18:12:40 -0400505
Tejun Heo8bfa79f2007-01-02 20:19:40 +0900506 ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num));
Jeff Garzik669a5db2006-08-29 18:12:40 -0400507
508 if (adev->max_sectors > 255)
509 adev->max_sectors = 255;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400510
Jeff Garzik669a5db2006-08-29 18:12:40 -0400511 if (strstr(model_num, "Integrated Technology Express")) {
512 /* RAID mode */
513 printk(KERN_INFO "IT821x %sRAID%d volume",
514 adev->id[147]?"Bootable ":"",
515 adev->id[129]);
516 if (adev->id[129] != 1)
517 printk("(%dK stripe)", adev->id[146]);
518 printk(".\n");
519 }
520}
521
522
523/**
524 * it821x_check_atapi_dma - ATAPI DMA handler
525 * @qc: Command we are about to issue
526 *
527 * Decide if this ATAPI command can be issued by DMA on this
528 * controller. Return 0 if it can be.
529 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400530
Jeff Garzik669a5db2006-08-29 18:12:40 -0400531static int it821x_check_atapi_dma(struct ata_queued_cmd *qc)
532{
533 struct ata_port *ap = qc->ap;
534 struct it821x_dev *itdev = ap->private_data;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400535
Jeff Garzik669a5db2006-08-29 18:12:40 -0400536 /* No ATAPI DMA in smart mode */
537 if (itdev->smart)
538 return -EOPNOTSUPP;
539 /* No ATAPI DMA on rev 10 */
540 if (itdev->timing10)
541 return -EOPNOTSUPP;
542 /* Cool */
543 return 0;
544}
Jeff Garzik85cd7252006-08-31 00:03:49 -0400545
Jeff Garzik669a5db2006-08-29 18:12:40 -0400546
547/**
548 * it821x_port_start - port setup
549 * @ap: ATA port being set up
550 *
551 * The it821x needs to maintain private data structures and also to
552 * use the standard PCI interface which lacks support for this
Jeff Garzik85cd7252006-08-31 00:03:49 -0400553 * functionality. We instead set up the private data on the port
Jeff Garzik669a5db2006-08-29 18:12:40 -0400554 * start hook, and tear it down on port stop
555 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400556
Jeff Garzik669a5db2006-08-29 18:12:40 -0400557static int it821x_port_start(struct ata_port *ap)
558{
559 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
560 struct it821x_dev *itdev;
561 u8 conf;
562
563 int ret = ata_port_start(ap);
564 if (ret < 0)
565 return ret;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400566
Tejun Heo24dc5f32007-01-20 16:00:28 +0900567 itdev = devm_kzalloc(&pdev->dev, sizeof(struct it821x_dev), GFP_KERNEL);
568 if (itdev == NULL)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400569 return -ENOMEM;
Tejun Heo24dc5f32007-01-20 16:00:28 +0900570 ap->private_data = itdev;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400571
572 pci_read_config_byte(pdev, 0x50, &conf);
573
574 if (conf & 1) {
575 itdev->smart = 1;
576 /* Long I/O's although allowed in LBA48 space cause the
577 onboard firmware to enter the twighlight zone */
578 /* No ATAPI DMA in this mode either */
579 }
580 /* Pull the current clocks from 0x50 */
581 if (conf & (1 << (1 + ap->port_no)))
582 itdev->clock_mode = ATA_50;
583 else
584 itdev->clock_mode = ATA_66;
585
586 itdev->want[0][1] = ATA_ANY;
587 itdev->want[1][1] = ATA_ANY;
588 itdev->last_device = -1;
589
590 pci_read_config_byte(pdev, PCI_REVISION_ID, &conf);
591 if (conf == 0x10) {
592 itdev->timing10 = 1;
593 /* Need to disable ATAPI DMA for this case */
594 if (!itdev->smart)
595 printk(KERN_WARNING DRV_NAME": Revision 0x10, workarounds activated.\n");
596 }
597
598 return 0;
599}
600
Jeff Garzik669a5db2006-08-29 18:12:40 -0400601static struct scsi_host_template it821x_sht = {
602 .module = THIS_MODULE,
603 .name = DRV_NAME,
604 .ioctl = ata_scsi_ioctl,
605 .queuecommand = ata_scsi_queuecmd,
606 .can_queue = ATA_DEF_QUEUE,
607 .this_id = ATA_SHT_THIS_ID,
608 .sg_tablesize = LIBATA_MAX_PRD,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400609 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
610 .emulated = ATA_SHT_EMULATED,
611 .use_clustering = ATA_SHT_USE_CLUSTERING,
612 .proc_name = DRV_NAME,
613 .dma_boundary = ATA_DMA_BOUNDARY,
614 .slave_configure = ata_scsi_slave_config,
Tejun Heoafdfe892006-11-29 11:26:47 +0900615 .slave_destroy = ata_scsi_slave_destroy,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400616 .bios_param = ata_std_bios_param,
617};
618
619static struct ata_port_operations it821x_smart_port_ops = {
620 .set_mode = it821x_smart_set_mode,
621 .port_disable = ata_port_disable,
622 .tf_load = ata_tf_load,
623 .tf_read = ata_tf_read,
624 .mode_filter = ata_pci_default_filter,
Jeff Garzik85cd7252006-08-31 00:03:49 -0400625
Jeff Garzik669a5db2006-08-29 18:12:40 -0400626 .check_status = ata_check_status,
627 .check_atapi_dma= it821x_check_atapi_dma,
628 .exec_command = ata_exec_command,
629 .dev_select = ata_std_dev_select,
630 .dev_config = it821x_dev_config,
631
632 .freeze = ata_bmdma_freeze,
633 .thaw = ata_bmdma_thaw,
Jeff Garzika0fcdc02007-03-09 07:24:15 -0500634 .error_handler = ata_bmdma_error_handler,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400635 .post_internal_cmd = ata_bmdma_post_internal_cmd,
Jeff Garzika0fcdc02007-03-09 07:24:15 -0500636 .cable_detect = ata_cable_unknown,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400637
638 .bmdma_setup = ata_bmdma_setup,
639 .bmdma_start = ata_bmdma_start,
640 .bmdma_stop = ata_bmdma_stop,
641 .bmdma_status = ata_bmdma_status,
642
643 .qc_prep = ata_qc_prep,
644 .qc_issue = it821x_smart_qc_issue_prot,
Jeff Garzikbda30282006-09-27 05:41:13 -0400645
Tejun Heo0d5ff562007-02-01 15:06:36 +0900646 .data_xfer = ata_data_xfer,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400647
648 .irq_handler = ata_interrupt,
649 .irq_clear = ata_bmdma_irq_clear,
Akira Iguchi246ce3b2007-01-26 16:27:58 +0900650 .irq_on = ata_irq_on,
651 .irq_ack = ata_irq_ack,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400652
653 .port_start = it821x_port_start,
Jeff Garzik85cd7252006-08-31 00:03:49 -0400654};
Jeff Garzik669a5db2006-08-29 18:12:40 -0400655
656static struct ata_port_operations it821x_passthru_port_ops = {
657 .port_disable = ata_port_disable,
658 .set_piomode = it821x_passthru_set_piomode,
659 .set_dmamode = it821x_passthru_set_dmamode,
660 .mode_filter = ata_pci_default_filter,
Jeff Garzik85cd7252006-08-31 00:03:49 -0400661
Jeff Garzik669a5db2006-08-29 18:12:40 -0400662 .tf_load = ata_tf_load,
663 .tf_read = ata_tf_read,
664 .check_status = ata_check_status,
665 .exec_command = ata_exec_command,
666 .check_atapi_dma= it821x_check_atapi_dma,
667 .dev_select = it821x_passthru_dev_select,
668
669 .freeze = ata_bmdma_freeze,
670 .thaw = ata_bmdma_thaw,
Jeff Garzika0fcdc02007-03-09 07:24:15 -0500671 .error_handler = ata_bmdma_error_handler,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400672 .post_internal_cmd = ata_bmdma_post_internal_cmd,
Jeff Garzika0fcdc02007-03-09 07:24:15 -0500673 .cable_detect = ata_cable_unknown,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400674
675 .bmdma_setup = ata_bmdma_setup,
676 .bmdma_start = it821x_passthru_bmdma_start,
677 .bmdma_stop = it821x_passthru_bmdma_stop,
678 .bmdma_status = ata_bmdma_status,
679
680 .qc_prep = ata_qc_prep,
681 .qc_issue = it821x_passthru_qc_issue_prot,
Jeff Garzikbda30282006-09-27 05:41:13 -0400682
Tejun Heo0d5ff562007-02-01 15:06:36 +0900683 .data_xfer = ata_data_xfer,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400684
685 .irq_clear = ata_bmdma_irq_clear,
686 .irq_handler = ata_interrupt,
Akira Iguchi246ce3b2007-01-26 16:27:58 +0900687 .irq_on = ata_irq_on,
688 .irq_ack = ata_irq_ack,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400689
690 .port_start = it821x_port_start,
Jeff Garzik85cd7252006-08-31 00:03:49 -0400691};
Jeff Garzik669a5db2006-08-29 18:12:40 -0400692
693static void __devinit it821x_disable_raid(struct pci_dev *pdev)
694{
695 /* Reset local CPU, and set BIOS not ready */
696 pci_write_config_byte(pdev, 0x5E, 0x01);
697
698 /* Set to bypass mode, and reset PCI bus */
699 pci_write_config_byte(pdev, 0x50, 0x00);
700 pci_write_config_word(pdev, PCI_COMMAND,
701 PCI_COMMAND_PARITY | PCI_COMMAND_IO |
702 PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
703 pci_write_config_word(pdev, 0x40, 0xA0F3);
704
705 pci_write_config_dword(pdev,0x4C, 0x02040204);
706 pci_write_config_byte(pdev, 0x42, 0x36);
707 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x20);
708}
709
Jeff Garzik85cd7252006-08-31 00:03:49 -0400710
Jeff Garzik669a5db2006-08-29 18:12:40 -0400711static int it821x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
712{
713 u8 conf;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400714
Tejun Heo1626aeb2007-05-04 12:43:58 +0200715 static const struct ata_port_info info_smart = {
Jeff Garzik669a5db2006-08-29 18:12:40 -0400716 .sht = &it821x_sht,
717 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
718 .pio_mask = 0x1f,
719 .mwdma_mask = 0x07,
720 .port_ops = &it821x_smart_port_ops
721 };
Tejun Heo1626aeb2007-05-04 12:43:58 +0200722 static const struct ata_port_info info_passthru = {
Jeff Garzik669a5db2006-08-29 18:12:40 -0400723 .sht = &it821x_sht,
724 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
725 .pio_mask = 0x1f,
726 .mwdma_mask = 0x07,
727 .udma_mask = 0x7f,
728 .port_ops = &it821x_passthru_port_ops
729 };
Jeff Garzik85cd7252006-08-31 00:03:49 -0400730
Tejun Heo1626aeb2007-05-04 12:43:58 +0200731 const struct ata_port_info *ppi[] = { NULL, NULL };
Jeff Garzik669a5db2006-08-29 18:12:40 -0400732 static char *mode[2] = { "pass through", "smart" };
733
734 /* Force the card into bypass mode if so requested */
735 if (it8212_noraid) {
736 printk(KERN_INFO DRV_NAME ": forcing bypass mode.\n");
737 it821x_disable_raid(pdev);
738 }
739 pci_read_config_byte(pdev, 0x50, &conf);
740 conf &= 1;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400741
Jeff Garzik669a5db2006-08-29 18:12:40 -0400742 printk(KERN_INFO DRV_NAME ": controller in %s mode.\n", mode[conf]);
743 if (conf == 0)
Tejun Heo1626aeb2007-05-04 12:43:58 +0200744 ppi[0] = &info_passthru;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400745 else
Tejun Heo1626aeb2007-05-04 12:43:58 +0200746 ppi[0] = &info_smart;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400747
Tejun Heo1626aeb2007-05-04 12:43:58 +0200748 return ata_pci_init_one(pdev, ppi);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400749}
750
Tejun Heo438ac6d2007-03-02 17:31:26 +0900751#ifdef CONFIG_PM
Alanf535d532006-11-27 16:14:36 +0000752static int it821x_reinit_one(struct pci_dev *pdev)
753{
754 /* Resume - turn raid back off if need be */
755 if (it8212_noraid)
756 it821x_disable_raid(pdev);
757 return ata_pci_device_resume(pdev);
758}
Tejun Heo438ac6d2007-03-02 17:31:26 +0900759#endif
Alanf535d532006-11-27 16:14:36 +0000760
Jeff Garzik2d2744f2006-09-28 20:21:59 -0400761static const struct pci_device_id it821x[] = {
762 { PCI_VDEVICE(ITE, PCI_DEVICE_ID_ITE_8211), },
763 { PCI_VDEVICE(ITE, PCI_DEVICE_ID_ITE_8212), },
764
765 { },
Jeff Garzik669a5db2006-08-29 18:12:40 -0400766};
767
768static struct pci_driver it821x_pci_driver = {
Jeff Garzik2d2744f2006-09-28 20:21:59 -0400769 .name = DRV_NAME,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400770 .id_table = it821x,
771 .probe = it821x_init_one,
Alanf535d532006-11-27 16:14:36 +0000772 .remove = ata_pci_remove_one,
Tejun Heo438ac6d2007-03-02 17:31:26 +0900773#ifdef CONFIG_PM
Alanf535d532006-11-27 16:14:36 +0000774 .suspend = ata_pci_device_suspend,
775 .resume = it821x_reinit_one,
Tejun Heo438ac6d2007-03-02 17:31:26 +0900776#endif
Jeff Garzik669a5db2006-08-29 18:12:40 -0400777};
778
779static int __init it821x_init(void)
780{
781 return pci_register_driver(&it821x_pci_driver);
782}
783
Jeff Garzik669a5db2006-08-29 18:12:40 -0400784static void __exit it821x_exit(void)
785{
786 pci_unregister_driver(&it821x_pci_driver);
787}
788
Jeff Garzik669a5db2006-08-29 18:12:40 -0400789MODULE_AUTHOR("Alan Cox");
790MODULE_DESCRIPTION("low-level driver for the IT8211/IT8212 IDE RAID controller");
791MODULE_LICENSE("GPL");
792MODULE_DEVICE_TABLE(pci, it821x);
793MODULE_VERSION(DRV_VERSION);
794
795
796module_param_named(noraid, it8212_noraid, int, S_IRUGO);
797MODULE_PARM_DESC(it8212_noraid, "Force card into bypass mode");
798
799module_init(it821x_init);
800module_exit(it821x_exit);