blob: 22c260fd6b7d9e26445153a1c0e32d9fe9d8dd28 [file] [log] [blame]
Pushkar Joshi3acc46f2013-06-14 16:39:40 -07001/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13&soc {
14 tmc_etr: tmc@fc326000 {
15 compatible = "arm,coresight-tmc";
16 reg = <0xfc326000 0x1000>,
17 <0xfc37c000 0x3000>;
18 reg-names = "tmc-base", "bam-base";
19
20 qcom,memory-reservation-type = "EBI1";
21 qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
22
23 coresight-id = <0>;
24 coresight-name = "coresight-tmc-etr";
25 coresight-nr-inports = <1>;
Pushkar Joshi29666342013-07-03 11:33:45 -070026 coresight-ctis = <&cti0 &cti8>;
Pushkar Joshi3acc46f2013-06-14 16:39:40 -070027 };
28
29 replicator: replicator@fc324000 {
30 compatible = "qcom,coresight-replicator";
31 reg = <0xfc324000 0x1000>;
32 reg-names = "replicator-base";
33
34 coresight-id = <2>;
35 coresight-name = "coresight-replicator";
36 coresight-nr-inports = <1>;
37 coresight-outports = <0>;
38 coresight-child-list = <&tmc_etr>;
39 coresight-child-ports = <0>;
40 };
41
42 tmc_etf: tmc@fc325000 {
43 compatible = "arm,coresight-tmc";
44 reg = <0xfc325000 0x1000>;
45 reg-names = "tmc-base";
46
47 coresight-id = <3>;
48 coresight-name = "coresight-tmc-etf";
49 coresight-nr-inports = <1>;
50 coresight-outports = <0>;
51 coresight-child-list = <&replicator>;
52 coresight-child-ports = <0>;
53 coresight-default-sink;
Pushkar Joshi29666342013-07-03 11:33:45 -070054 coresight-ctis = <&cti0 &cti8>;
Pushkar Joshi3acc46f2013-06-14 16:39:40 -070055 };
56
57 funnel_merg: funnel@fc323000 {
58 compatible = "arm,coresight-funnel";
59 reg = <0xfc323000 0x1000>;
60 reg-names = "funnel-base";
61
62 coresight-id = <4>;
63 coresight-name = "coresight-funnel-merg";
64 coresight-nr-inports = <2>;
65 coresight-outports = <0>;
66 coresight-child-list = <&tmc_etf>;
67 coresight-child-ports = <0>;
68 };
69
70 funnel_in0: funnel@fc321000 {
71 compatible = "arm,coresight-funnel";
72 reg = <0xfc321000 0x1000>;
73 reg-names = "funnel-base";
74
75 coresight-id = <5>;
76 coresight-name = "coresight-funnel-in0";
77 coresight-nr-inports = <8>;
78 coresight-outports = <0>;
79 coresight-child-list = <&funnel_merg>;
80 coresight-child-ports = <0>;
81 };
82
83 funnel_in1: funnel@fc322000 {
84 compatible = "arm,coresight-funnel";
85 reg = <0xfc322000 0x1000>;
86 reg-names = "funnel-base";
87
88 coresight-id = <6>;
89 coresight-name = "coresight-funnel-in1";
90 coresight-nr-inports = <8>;
91 coresight-outports = <0>;
92 coresight-child-list = <&funnel_merg>;
93 coresight-child-ports = <1>;
94 };
95
96 funnel_kpss: funnel@fc355000 {
97 compatible = "arm,coresight-funnel";
98 reg = <0xfc355000 0x1000>;
99 reg-names = "funnel-base";
100
101 coresight-id = <7>;
102 coresight-name = "coresight-funnel-kpss";
103 coresight-nr-inports = <4>;
104 coresight-outports = <0>;
105 coresight-child-list = <&funnel_in1>;
106 coresight-child-ports = <5>;
107 };
108
109 funnel_mmss: funnel@fc36c000 {
110 compatible = "arm,coresight-funnel";
111 reg = <0xfc36c000 0x1000>;
112 reg-names = "funnel-base";
113
114 coresight-id = <8>;
115 coresight-name = "coresight-funnel-mmss";
116 coresight-nr-inports = <8>;
117 coresight-outports = <0>;
118 coresight-child-list = <&funnel_in1>;
119 coresight-child-ports = <1>;
120 };
121
122 stm: stm@fc302000 {
123 compatible = "arm,coresight-stm";
124 reg = <0xfc302000 0x1000>,
125 <0xfa280000 0x180000>;
126 reg-names = "stm-base", "stm-data-base";
127
128 coresight-id = <9>;
129 coresight-name = "coresight-stm";
130 coresight-nr-inports = <0>;
131 coresight-outports = <0>;
132 coresight-child-list = <&funnel_in1>;
133 coresight-child-ports = <7>;
134 };
135
Pushkar Joshi35c55432013-07-19 16:29:43 -0700136 etm0: etm@fc34c000 {
137 compatible = "arm,coresight-etm";
138 reg = <0xfc34c000 0x1000>;
139 reg-names = "etm-base";
140
141 coresight-id = <10>;
142 coresight-name = "coresight-etm0";
143 coresight-nr-inports = <0>;
144 coresight-outports = <0>;
145 coresight-child-list = <&funnel_kpss>;
146 coresight-child-ports = <0>;
147
148 qcom,pc-save;
149 qcom,round-robin;
150 };
151
152 etm1: etm@fc34d000 {
153 compatible = "arm,coresight-etm";
154 reg = <0xfc34d000 0x1000>;
155 reg-names = "etm-base";
156
157 coresight-id = <11>;
158 coresight-name = "coresight-etm1";
159 coresight-nr-inports = <0>;
160 coresight-outports = <0>;
161 coresight-child-list = <&funnel_kpss>;
162 coresight-child-ports = <1>;
163
164 qcom,pc-save;
165 qcom,round-robin;
166 };
167
168 etm2: etm@fc34e000 {
169 compatible = "arm,coresight-etm";
170 reg = <0xfc34e000 0x1000>;
171 reg-names = "etm-base";
172
173 coresight-id = <12>;
174 coresight-name = "coresight-etm2";
175 coresight-nr-inports = <0>;
176 coresight-outports = <0>;
177 coresight-child-list = <&funnel_kpss>;
178 coresight-child-ports = <2>;
179
180 qcom,pc-save;
181 qcom,round-robin;
182 };
183
184 etm3: etm@fc34f000 {
185 compatible = "arm,coresight-etm";
186 reg = <0xfc34f000 0x1000>;
187 reg-names = "etm-base";
188
189 coresight-id = <13>;
190 coresight-name = "coresight-etm3";
191 coresight-nr-inports = <0>;
192 coresight-outports = <0>;
193 coresight-child-list = <&funnel_kpss>;
194 coresight-child-ports = <3>;
195
196 qcom,pc-save;
197 qcom,round-robin;
198 };
199
Pushkar Joshi3acc46f2013-06-14 16:39:40 -0700200 csr: csr@fc301000 {
201 compatible = "qcom,coresight-csr";
202 reg = <0xfc301000 0x1000>;
203 reg-names = "csr-base";
204
205 coresight-id = <14>;
206 coresight-name = "coresight-csr";
207 coresight-nr-inports = <0>;
208
209 qcom,blk-size = <3>;
210 };
Pushkar Joshi29666342013-07-03 11:33:45 -0700211
212 cti0: cti@fc310000 {
213 compatible = "arm,coresight-cti";
214 reg = <0xfc310000 0x1000>;
215 reg-names = "cti-base";
216
217 coresight-id = <15>;
218 coresight-name = "coresight-cti0";
219 coresight-nr-inports = <0>;
220 };
221
222 cti1: cti@fc311000 {
223 compatible = "arm,coresight-cti";
224 reg = <0xfc311000 0x1000>;
225 reg-names = "cti-base";
226
227 coresight-id = <16>;
228 coresight-name = "coresight-cti1";
229 coresight-nr-inports = <0>;
230 };
231
232 cti2: cti@fc312000 {
233 compatible = "arm,coresight-cti";
234 reg = <0xfc312000 0x1000>;
235 reg-names = "cti-base";
236
237 coresight-id = <17>;
238 coresight-name = "coresight-cti2";
239 coresight-nr-inports = <0>;
240 };
241
242 cti3: cti@fc313000 {
243 compatible = "arm,coresight-cti";
244 reg = <0xfc313000 0x1000>;
245 reg-names = "cti-base";
246
247 coresight-id = <18>;
248 coresight-name = "coresight-cti3";
249 coresight-nr-inports = <0>;
250 };
251
252 cti4: cti@fc314000 {
253 compatible = "arm,coresight-cti";
254 reg = <0xfc314000 0x1000>;
255 reg-names = "cti-base";
256
257 coresight-id = <19>;
258 coresight-name = "coresight-cti4";
259 coresight-nr-inports = <0>;
260 };
261
262 cti5: cti@fc315000 {
263 compatible = "arm,coresight-cti";
264 reg = <0xfc315000 0x1000>;
265 reg-names = "cti-base";
266
267 coresight-id = <20>;
268 coresight-name = "coresight-cti5";
269 coresight-nr-inports = <0>;
270 };
271
272 cti6: cti@fc316000 {
273 compatible = "arm,coresight-cti";
274 reg = <0xfc316000 0x1000>;
275 reg-names = "cti-base";
276
277 coresight-id = <21>;
278 coresight-name = "coresight-cti6";
279 coresight-nr-inports = <0>;
280 };
281
282 cti7: cti@fc317000 {
283 compatible = "arm,coresight-cti";
284 reg = <0xfc317000 0x1000>;
285 reg-names = "cti-base";
286
287 coresight-id = <22>;
288 coresight-name = "coresight-cti7";
289 coresight-nr-inports = <0>;
290 };
291
292 cti8: cti@fc318000 {
293 compatible = "arm,coresight-cti";
294 reg = <0xfc318000 0x1000>;
295 reg-names = "cti-base";
296
297 coresight-id = <23>;
298 coresight-name = "coresight-cti8";
299 coresight-nr-inports = <0>;
300 };
301
302 cti_l2: cti@fc340000 {
303 compatible = "arm,coresight-cti";
304 reg = <0xfc340000 0x1000>;
305 reg-names = "cti-base";
306
307 coresight-id = <24>;
308 coresight-name = "coresight-cti-l2";
309 coresight-nr-inports = <0>;
310 };
311
312 cti_cpu0: cti@fc341000 {
313 compatible = "arm,coresight-cti";
314 reg = <0xfc341000 0x1000>;
315 reg-names = "cti-base";
316
317 coresight-id = <25>;
318 coresight-name = "coresight-cti-cpu0";
319 coresight-nr-inports = <0>;
320 };
321
322 cti_cpu1: cti@fc342000 {
323 compatible = "arm,coresight-cti";
324 reg = <0xfc342000 0x1000>;
325 reg-names = "cti-base";
326
327 coresight-id = <26>;
328 coresight-name = "coresight-cti-cpu1";
329 coresight-nr-inports = <0>;
330 };
331
332 cti_cpu2: cti@fc343000 {
333 compatible = "arm,coresight-cti";
334 reg = <0xfc343000 0x1000>;
335 reg-names = "cti-base";
336
337 coresight-id = <27>;
338 coresight-name = "coresight-cti-cpu2";
339 coresight-nr-inports = <0>;
340 };
341
342 cti_cpu3: cti@fc344000 {
343 compatible = "arm,coresight-cti";
344 reg = <0xfc344000 0x1000>;
345 reg-names = "cti-base";
346
347 coresight-id = <28>;
348 coresight-name = "coresight-cti-cpu3";
349 coresight-nr-inports = <0>;
350 };
Pushkar Joshi782280e2013-07-19 18:27:29 -0700351
352 hwevent: hwevent@fd828018 {
353 compatible = "qcom,coresight-hwevent";
354 reg = <0xfd828018 0x80>,
355 <0xf9011080 0x80>,
356 <0xfd4ab160 0x80>,
357 <0xfc401600 0x80>;
358 reg-names = "mmss-mux", "apcs-mux", "ppss-mux", "gcc-mux";
359
360 coresight-id = <29>;
361 coresight-name = "coresight-hwevent";
362 coresight-nr-inports = <0>;
363
364 qcom,hwevent-clks = "core_mmss_clk";
365 };
Pushkar Joshi6a1f4062013-07-24 14:07:27 -0700366
367 fuse: fuse@fc4be024 {
368 compatible = "arm,coresight-fuse";
369 reg = <0xfc4be024 0x8>;
370 reg-names = "fuse-base";
371
372 coresight-id = <30>;
373 coresight-name = "coresight-fuse";
374 coresight-nr-inports = <0>;
375 };
Pushkar Joshi3acc46f2013-06-14 16:39:40 -0700376};