blob: 9a373160b22a293aa115aba82f0f087d92b6c419 [file] [log] [blame]
Gilad Avidov289d0fc2012-08-08 14:06:24 -06001/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Ravi Kumar Vf4d78d22012-09-12 13:45:00 +05302 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "skeleton.dtsi"
14
15/ {
16 model = "Qualcomm MPQ8092";
17 compatible = "qcom,mpq8092";
18 interrupt-parent = <&intc>;
19
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -070020 soc: soc { };
21};
22
23/include/ "mpq8092-iommu.dtsi"
Chintan Pandya07541762013-05-23 15:21:54 +053024/include/ "mpq8092-iommu-domains.dtsi"
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -070025/include/ "msm-gdsc.dtsi"
26/include/ "mpq8092-ion.dtsi"
27
28&soc {
29 #address-cells = <1>;
30 #size-cells = <1>;
31 ranges;
32
Ravi Kumar Vf4d78d22012-09-12 13:45:00 +053033 intc: interrupt-controller@f9000000 {
34 compatible = "qcom,msm-qgic2";
35 interrupt-controller;
36 #interrupt-cells = <3>;
37 reg = <0xf9000000 0x1000>,
38 <0xf9002000 0x1000>;
39 };
40
Ravi Kumar V57f65f52012-09-12 14:39:23 +053041 msmgpio: gpio@fd510000 {
42 compatible = "qcom,msm-gpio";
43 gpio-controller;
44 #gpio-cells = <2>;
45 interrupt-controller;
46 #interrupt-cells = <2>;
47 reg = <0xfd510000 0x4000>;
Rohit Vaswani341c2032012-11-08 18:49:29 -080048 ngpio = <146>;
Rohit Vaswanid2001522012-12-05 19:23:44 -080049 interrupts = <0 208 0>;
Rohit Vaswanied0a4ef2012-12-11 15:14:42 -080050 qcom,direct-connect-irqs = <8>;
Ravi Kumar V57f65f52012-09-12 14:39:23 +053051 };
52
Ravi Kumar Vf4d78d22012-09-12 13:45:00 +053053 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -080054 compatible = "arm,armv7-timer";
Ravi Kumar Vf4d78d22012-09-12 13:45:00 +053055 interrupts = <1 2 0>, <1 3 0>;
56 clock-frequency = <19200000>;
57 };
58
Srinivas Ramanab4103ab2013-06-04 19:55:03 +053059 timer@f9020000 {
60 #address-cells = <1>;
61 #size-cells = <1>;
62 ranges;
63 compatible = "arm,armv7-timer-mem";
64 reg = <0xf9020000 0x1000>;
65 clock-frequency = <19200000>;
66
67 frame@f9021000 {
68 frame-number = <0>;
69 interrupts = <0 8 0x4>,
70 <0 7 0x4>;
71 reg = <0xf9021000 0x1000>,
72 <0xf9022000 0x1000>;
73 };
74
75 frame@f9023000 {
76 frame-number = <1>;
77 interrupts = <0 9 0x4>;
78 reg = <0xf9023000 0x1000>;
79 status = "disabled";
80 };
81
82 frame@f9024000 {
83 frame-number = <2>;
84 interrupts = <0 10 0x4>;
85 reg = <0xf9024000 0x1000>;
86 status = "disabled";
87 };
88
89 frame@f9025000 {
90 frame-number = <3>;
91 interrupts = <0 11 0x4>;
92 reg = <0xf9025000 0x1000>;
93 status = "disabled";
94 };
95
96 frame@f9026000 {
97 frame-number = <4>;
98 interrupts = <0 12 0x4>;
99 reg = <0xf9026000 0x1000>;
100 status = "disabled";
101 };
102
103 frame@f9027000 {
104 frame-number = <5>;
105 interrupts = <0 13 0x4>;
106 reg = <0xf9027000 0x1000>;
107 status = "disabled";
108 };
109
110 frame@f9028000 {
111 frame-number = <6>;
112 interrupts = <0 14 0x4>;
113 reg = <0xf9028000 0x1000>;
114 status = "disabled";
115 };
116 };
117
Ravi Kumar Vf4d78d22012-09-12 13:45:00 +0530118 serial@f991f000 {
119 compatible = "qcom,msm-lsuart-v14";
120 reg = <0xf991f000 0x1000>;
121 interrupts = <0 109 0>;
122 status = "disabled";
123 };
124
Srinivas Ramanab4103ab2013-06-04 19:55:03 +0530125 serial@f9922000 {
126 compatible = "qcom,msm-lsuart-v14";
127 reg = <0xf9922000 0x1000>;
128 interrupts = <0 112 0>;
129 status = "disabled";
130 };
131
Ravi Kumar Vf4d78d22012-09-12 13:45:00 +0530132 serial@f995e000 {
133 compatible = "qcom,msm-lsuart-v14";
134 reg = <0xf995e000 0x1000>;
135 interrupts = <0 114 0>;
136 status = "disabled";
137 };
Ravi Kumar V73e5cbc2012-09-10 20:22:39 +0530138
Srinivas Ramana8a9ad552013-05-22 14:58:56 +0530139 qcom,msm-imem@fe805000 {
140 compatible = "qcom,msm-imem";
141 reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
142 };
143
Sujeet Kumarce4360a2013-06-27 11:36:32 +0530144 usb@f9a55000 {
145 compatible = "qcom,hsusb-otg";
146 reg = <0xf9a55000 0x400>;
147 interrupts = <0 134 0>, <0 140 0>;
148 interrupt-names = "core_irq", "async_irq";
149
150 HSUSB_VDDCX-supply = <&pma8084_s8>;
151 HSUSB_1p8-supply = <&pma8084_l22>;
152 HSUSB_3p3-supply = <&pma8084_l24>;
153 qcom,vdd-voltage-level = <1050000 1050000>;
154
155 qcom,hsusb-otg-phy-type = <2>;
156 qcom,hsusb-otg-mode = <1>;
157 qcom,hsusb-otg-otg-control = <1>;
158 qcom,hsusb-otg-disable-reset;
159
160 qcom,msm_bus,name = "usb_otg";
161 qcom,msm_bus,num_cases = <3>;
162 qcom,msm_bus,active_only = <0>;
163 qcom,msm_bus,num_paths = <1>;
164 qcom,msm-bus,vectors-KBps =
165 <87 512 0 0>,
166 <87 512 60000 960000>,
167 <87 512 6000 6000>;
168 };
169
170 android_usb@fe8050c8 {
171 compatible = "qcom,android-usb";
172 reg = <0xfe8050c8 0xc8>;
173 qcom,android-usb-swfi-latency = <1>;
174 };
175
Ravi Kumar V73e5cbc2012-09-10 20:22:39 +0530176 spmi_bus: qcom,spmi@fc4c0000 {
177 cell-index = <0>;
178 compatible = "qcom,spmi-pmic-arb";
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700179 reg-names = "core", "intr", "cnfg";
Ravi Kumar V73e5cbc2012-09-10 20:22:39 +0530180 reg = <0xfc4cf000 0x1000>,
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700181 <0Xfc4cb000 0x1000>,
182 <0Xfc4ca000 0x1000>;
Ravi Kumar V73e5cbc2012-09-10 20:22:39 +0530183 /* 190,ee0_krait_hlos_spmi_periph_irq */
184 /* 187,channel_0_krait_hlos_trans_done_irq */
185 interrupts = <0 190 0 0 187 0>;
Sujit Reddy Thumma397dffd2012-10-29 13:38:49 +0530186 qcom,not-wakeup;
Ravi Kumar V73e5cbc2012-09-10 20:22:39 +0530187 qcom,pmic-arb-ee = <0>;
188 qcom,pmic-arb-channel = <0>;
Ravi Kumar V73e5cbc2012-09-10 20:22:39 +0530189 };
Sujit Reddy Thumma2330f3a372012-10-18 10:28:51 +0530190
191 sdcc1: qcom,sdcc@f9824000 {
192 cell-index = <1>; /* SDC1 eMMC slot */
193 compatible = "qcom,msm-sdcc";
194 reg = <0xf9824000 0x800>;
195 reg-names = "core_mem";
196 interrupts = <0 123 0>;
197 interrupt-names = "core_irq";
198
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700199 qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
200 qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
Krishna Konda6c5d0f42013-04-12 16:44:26 -0700201 qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700202 qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
Sujit Reddy Thumma2330f3a372012-10-18 10:28:51 +0530203
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700204 qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
205 qcom,sup-voltages = <2950 2950>;
206 qcom,bus-width = <8>;
207 qcom,nonremovable;
208 qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
Sujit Reddy Thumma2330f3a372012-10-18 10:28:51 +0530209 };
210
211 sdcc2: qcom,sdcc@f98a4000 {
212 cell-index = <2>; /* SDC2 SD card slot */
213 compatible = "qcom,msm-sdcc";
214 reg = <0xf98a4000 0x800>;
215 reg-names = "core_mem";
216 interrupts = <0 125 0>;
217 interrupt-names = "core_irq";
218
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700219 qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
220 qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
Krishna Konda6c5d0f42013-04-12 16:44:26 -0700221 qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700222 qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
Sujit Reddy Thumma2330f3a372012-10-18 10:28:51 +0530223
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700224 qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
225 qcom,sup-voltages = <2950 2950>;
226 qcom,bus-width = <4>;
227 qcom,xpc;
228 qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
229 qcom,current-limit = <800>;
Sujit Reddy Thumma2330f3a372012-10-18 10:28:51 +0530230 };
Sujit Reddy Thumma35106382012-10-12 20:36:53 +0530231
Yan Hec8914142013-07-17 17:56:18 -0700232 qcom,sps@f9980000 {
233 compatible = "qcom,msm_sps";
234 reg = <0xf9984000 0x15000>,
235 <0xf9999000 0xb000>;
236 reg-names = "bam_mem", "core_mem";
237 interrupts = <0 94 0>;
238 qcom,pipe-attr-ee;
239 };
240
Sujit Reddy Thumma35106382012-10-12 20:36:53 +0530241 sata: sata@fc580000 {
242 compatible = "qcom,msm-ahci";
243 reg = <0xfc580000 0x17c>;
244 interrupts = <0 243 0>;
245 };
Srinivas Ramana97e3a092013-05-21 19:23:39 +0530246
247 qcom,wdt@f9017000 {
248 compatible = "qcom,msm-watchdog";
249 reg = <0xf9017000 0x1000>;
250 interrupts = <0 3 0>, <0 4 0>;
251 qcom,bark-time = <11000>;
252 qcom,pet-time = <10000>;
253 qcom,ipi-ping;
254 };
Trilok Soni4220d462013-06-06 16:39:58 +0530255
256 qcom,ocmem@fdd00000 {
257 compatible = "qcom,msm-ocmem";
258 reg = <0xfdd00000 0x2000>,
259 <0xfdd02000 0x2000>,
260 <0xfe070000 0x400>,
261 <0xfec00000 0x180000>;
262 reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical";
263 interrupts = <0 76 0>, <0 77 0>;
264 interrupt-names = "ocmem_irq", "dm_irq";
265 qcom,ocmem-num-regions = <0x3>;
266 qcom,ocmem-num-macros = <0x18>;
267 qcom,resource-type = <0x706d636f>;
268 #address-cells = <1>;
269 #size-cells = <1>;
270 ranges = <0x0 0xfec00000 0x180000>;
271
272 partition@0 {
273 reg = <0x0 0x100000>;
274 qcom,ocmem-part-name = "graphics";
275 qcom,ocmem-part-min = <0x80000>;
276 };
277
278 partition@80000 {
279 reg = <0x100000 0x80000>;
280 qcom,ocmem-part-name = "lp_audio";
281 qcom,ocmem-part-min = <0x80000>;
282 };
283
284 partition@100000 {
285 reg = <0x100000 0x80000>;
286 qcom,ocmem-part-name = "video";
287 qcom,ocmem-part-min = <0x55000>;
288 };
289 };
Ravi Kumar Vf4d78d22012-09-12 13:45:00 +0530290};
Ravi Kumar V605f1cd2012-09-10 20:43:17 +0530291
Patrick Dalye8977aa2012-11-06 15:25:58 -0800292&gdsc_venus {
293 status = "ok";
294};
295
296&gdsc_mdss {
297 status = "ok";
298};
299
300&gdsc_jpeg {
301 status = "ok";
302};
303
Srinivas Ramanaa3817612013-07-09 12:29:12 +0530304&gdsc_vpu {
305 status = "ok";
306};
307
Patrick Dalye8977aa2012-11-06 15:25:58 -0800308&gdsc_oxili_gx {
309 status = "ok";
310};
311
312&gdsc_oxili_cx {
313 status = "ok";
314};
315
316&gdsc_usb_hsic {
317 status = "ok";
318};
319
Taniya Dasfde449f2013-05-22 19:09:41 +0530320&gdsc_vcap {
321 status = "ok";
322};
323
David Collins819bebf2013-04-22 14:55:19 -0700324/include/ "msm-pma8084.dtsi"
Ravi Kumar Vd9e522c2012-10-03 12:52:14 +0530325/include/ "mpq8092-regulator.dtsi"