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gerrit-public.fairphone.software / fp2-dev / kernel / msm / 393ffddae8176428814767ac42279db1f224d41b / . / arch / arm / boot / dts / msm-iommu-v1.dtsi
blob: c767b37b3738840c7d3f6969b7b725fd249b4c59 [file] [log] [blame]
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]1/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Olav Haugan9c255522012-11-16 16:43:17 -0800[diff] [blame]2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -0700[diff] [blame]13&soc {
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]14 jpeg_iommu: qcom,iommu@fda64000 {
Olav Haugan0e22c482013-01-28 17:39:36 -0800[diff] [blame]15 compatible = "qcom,msm-smmu-v1";
Olav Haugan9c255522012-11-16 16:43:17 -0800[diff] [blame]16 #address-cells = <1>;
17 #size-cells = <1>;
18 ranges;
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]19 reg = <0xfda64000 0x10000>;
20 reg-names = "iommu_base";
21 interrupts = <0 67 0>;
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]22 qcom,needs-alt-core-clk;
23 label = "jpeg_iommu";
Olav Haugan9c255522012-11-16 16:43:17 -0800[diff] [blame]24 status = "disabled";
Mitchel Humpherys6203d322013-06-05 11:47:34 -0700[diff] [blame]25 qcom,msm-bus,name = "jpeg_ebi";
26 qcom,msm-bus,num-cases = <2>;
Mitchel Humpherys6203d322013-06-05 11:47:34 -0700[diff] [blame]27 qcom,msm-bus,num-paths = <1>;
28 qcom,msm-bus,vectors-KBps =
29 <62 512 0 0>,
30 <62 512 0 1000>;
Olav Haugan9c255522012-11-16 16:43:17 -0800[diff] [blame]31
Olav Hauganf7674ed2013-01-24 17:07:13 -0800[diff] [blame]32 qcom,iommu-pmu-ngroups = <1>;
33 qcom,iommu-pmu-ncounters = <8>;
34 qcom,iommu-pmu-event-classes = <0x00
35 0x01
36 0x08
37 0x09
38 0x0A
39 0x10
40 0x11
41 0x12
42 0x80
43 0x81
44 0x82
45 0x83
46 0x90
47 0x91
48 0x92
49 0xb0
50 0xb1>;
51
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]52 qcom,iommu-bfb-regs = <0x204c
53 0x2050
54 0x2514
55 0x2540
56 0x256c
57 0x2314
58 0x2394
59 0x2414
60 0x20ac
61 0x215c
62 0x220c
63 0x2008
64 0x200c
65 0x2010
66 0x2014>;
67
68 qcom,iommu-bfb-data = <0x0000ffff
69 0x0
70 0x4
71 0x4
72 0x0
73 0x0
74 0x10
75 0x50
76 0x0
77 0x10
78 0x20
79 0x0
80 0x0
81 0x0
82 0x0>;
83
84 qcom,iommu-ctx@fda6c000 {
Olav Hauganbca3ded2013-05-10 11:19:34 -0700[diff] [blame]85 compatible = "qcom,msm-smmu-v1-ctx";
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]86 reg = <0xfda6c000 0x1000>;
87 interrupts = <0 70 0>;
88 qcom,iommu-ctx-sids = <0>;
89 label = "jpeg_enc0";
Olav Haugan9c255522012-11-16 16:43:17 -0800[diff] [blame]90 };
91
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]92 qcom,iommu-ctx@fda6d000 {
Olav Hauganbca3ded2013-05-10 11:19:34 -0700[diff] [blame]93 compatible = "qcom,msm-smmu-v1-ctx";
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]94 reg = <0xfda6d000 0x1000>;
95 interrupts = <0 70 0>;
96 qcom,iommu-ctx-sids = <1>;
97 label = "jpeg_enc1";
Olav Haugan9c255522012-11-16 16:43:17 -0800[diff] [blame]98 };
99
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]100 qcom,iommu-ctx@fda6e000 {
Olav Hauganbca3ded2013-05-10 11:19:34 -0700[diff] [blame]101 compatible = "qcom,msm-smmu-v1-ctx";
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]102 reg = <0xfda6e000 0x1000>;
103 interrupts = <0 70 0>;
104 qcom,iommu-ctx-sids = <2>;
105 label = "jpeg_dec";
Olav Haugan9c255522012-11-16 16:43:17 -0800[diff] [blame]106 };
107 };
108
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]109 mdp_iommu: qcom,iommu@fd928000 {
Olav Haugan0e22c482013-01-28 17:39:36 -0800[diff] [blame]110 compatible = "qcom,msm-smmu-v1";
Olav Haugan9c255522012-11-16 16:43:17 -0800[diff] [blame]111 #address-cells = <1>;
112 #size-cells = <1>;
113 ranges;
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]114 reg = <0xfd928000 0x10000>;
115 reg-names = "iommu_base";
116 interrupts = <0 73 0>;
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]117 qcom,iommu-secure-id = <1>;
118 label = "mdp_iommu";
Mitchel Humpherys6203d322013-06-05 11:47:34 -0700[diff] [blame]119 qcom,msm-bus,name = "mdp_ebi";
120 qcom,msm-bus,num-cases = <2>;
Mitchel Humpherys6203d322013-06-05 11:47:34 -0700[diff] [blame]121 qcom,msm-bus,num-paths = <1>;
122 qcom,msm-bus,vectors-KBps =
123 <22 512 0 0>,
124 <22 512 0 1000>;
Olav Haugan9c255522012-11-16 16:43:17 -0800[diff] [blame]125 status = "disabled";
126
Olav Hauganf7674ed2013-01-24 17:07:13 -0800[diff] [blame]127 qcom,iommu-pmu-ngroups = <1>;
128 qcom,iommu-pmu-ncounters = <8>;
129 qcom,iommu-pmu-event-classes = <0x00
130 0x01
131 0x08
132 0x09
133 0x0A
134 0x10
135 0x11
136 0x12
137 0x80
138 0x81
139 0x82
140 0x83
141 0x90
142 0x91
143 0x92
144 0xb0
145 0xb1>;
146
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]147 qcom,iommu-bfb-regs = <0x204c
148 0x2050
149 0x2514
150 0x2540
151 0x256c
152 0x20ac
153 0x215c
154 0x220c
155 0x2314
156 0x2394
157 0x2414
158 0x2008
159 0x200c
160 0x2010
161 0x2014
162 0x2018
163 0x201c
164 0x2020>;
165
166 qcom,iommu-bfb-data = <0xffffffff
167 0x0
168 0x00000004
169 0x00000010
170 0x00000000
171 0x00000000
172 0x00000034
173 0x00000044
174 0x0
175 0x34
176 0x74
177 0x0
178 0x0
179 0x0
180 0x0
181 0x0
182 0x0
183 0x0>;
184
185 qcom,iommu-ctx@fd930000 {
Olav Hauganbca3ded2013-05-10 11:19:34 -0700[diff] [blame]186 compatible = "qcom,msm-smmu-v1-ctx";
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]187 reg = <0xfd930000 0x1000>;
188 interrupts = <0 47 0>;
189 qcom,iommu-ctx-sids = <0>;
190 label = "mdp_0";
Olav Haugan9c255522012-11-16 16:43:17 -0800[diff] [blame]191 };
192
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]193 qcom,iommu-ctx@fd931000 {
Olav Hauganbca3ded2013-05-10 11:19:34 -0700[diff] [blame]194 compatible = "qcom,msm-smmu-v1-ctx";
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]195 reg = <0xfd931000 0x1000>;
Mitchel Humpherys20c9a212013-05-21 17:52:12 -0700[diff] [blame]196 interrupts = <0 47 0>, <0 46 0>;
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]197 qcom,iommu-ctx-sids = <1>;
198 label = "mdp_1";
199 qcom,secure-context;
Olav Haugan9c255522012-11-16 16:43:17 -0800[diff] [blame]200 };
Olav Haugane00b1742013-01-21 18:25:11 -0800[diff] [blame]201
202 qcom,iommu-ctx@fd932000 {
Olav Hauganbca3ded2013-05-10 11:19:34 -0700[diff] [blame]203 compatible = "qcom,msm-smmu-v1-ctx";
Olav Haugane00b1742013-01-21 18:25:11 -0800[diff] [blame]204 reg = <0xfd932000 0x1000>;
Mitchel Humpherys20c9a212013-05-21 17:52:12 -0700[diff] [blame]205 interrupts = <0 47 0>, <0 46 0>;
Olav Haugane00b1742013-01-21 18:25:11 -0800[diff] [blame]206 qcom,iommu-ctx-sids = <>;
207 label = "mdp_2";
208 qcom,secure-context;
209 };
Olav Haugan9c255522012-11-16 16:43:17 -0800[diff] [blame]210 };
211
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]212 venus_iommu: qcom,iommu@fdc84000 {
Olav Haugan0e22c482013-01-28 17:39:36 -0800[diff] [blame]213 compatible = "qcom,msm-smmu-v1";
Olav Haugan9c255522012-11-16 16:43:17 -0800[diff] [blame]214 #address-cells = <1>;
215 #size-cells = <1>;
216 ranges;
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]217 reg = <0xfdc84000 0x10000
218 0xfdce0004 0x4>;
219 reg-names = "iommu_base", "clk_base";
220 interrupts = <0 45 0>;
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]221 qcom,iommu-secure-id = <0>;
222 qcom,needs-alt-core-clk;
223 label = "venus_iommu";
Mitchel Humpherys6203d322013-06-05 11:47:34 -0700[diff] [blame]224 qcom,msm-bus,name = "venus_ebi";
225 qcom,msm-bus,num-cases = <2>;
Mitchel Humpherys6203d322013-06-05 11:47:34 -0700[diff] [blame]226 qcom,msm-bus,num-paths = <1>;
227 qcom,msm-bus,vectors-KBps =
228 <63 512 0 0>,
229 <63 512 0 1000>;
Olav Haugan9c255522012-11-16 16:43:17 -0800[diff] [blame]230 status = "disabled";
231
Olav Hauganf7674ed2013-01-24 17:07:13 -0800[diff] [blame]232 qcom,iommu-pmu-ngroups = <1>;
233 qcom,iommu-pmu-ncounters = <8>;
234 qcom,iommu-pmu-event-classes = <0x00
235 0x01
236 0x08
237 0x09
238 0x0A
239 0x10
240 0x11
241 0x12
242 0x80
243 0x81
244 0x82
245 0x83
246 0x90
247 0x91
248 0x92
249 0xb0
250 0xb1>;
251
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]252 qcom,iommu-bfb-regs = <0x204c
253 0x2050
254 0x2514
255 0x2540
256 0x256c
257 0x20ac
258 0x215c
259 0x220c
260 0x2314
261 0x2394
262 0x2414
263 0x2008
264 0x200c
265 0x2010
266 0x2014
267 0x2018
268 0x201c
269 0x2020
270 0x2024
271 0x2028
272 0x202c
273 0x2030
274 0x2034
275 0x2038>;
276
277 qcom,iommu-bfb-data = <0xffffffff
278 0xffffffff
279 0x00000004
280 0x00000008
281 0x00000000
282 0x00000000
283 0x00000094
284 0x000000b4
285 0x0
286 0x94
287 0x114
288 0x0
289 0x0
290 0x0
291 0x0
292 0x0
293 0x0
294 0x0
295 0x0
296 0x0
297 0x0
298 0x0
299 0x0
300 0x0>;
301
Olav Haugan7930a682013-01-29 13:28:06 -0800[diff] [blame]302 venus_ns: qcom,iommu-ctx@fdc8c000 {
Olav Hauganbca3ded2013-05-10 11:19:34 -0700[diff] [blame]303 compatible = "qcom,msm-smmu-v1-ctx";
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]304 reg = <0xfdc8c000 0x1000>;
305 interrupts = <0 42 0>;
306 qcom,iommu-ctx-sids = <0 1 2 3 4 5>;
307 label = "venus_ns";
Olav Haugan9c255522012-11-16 16:43:17 -0800[diff] [blame]308 };
309
Olav Haugan7930a682013-01-29 13:28:06 -0800[diff] [blame]310 venus_cp: qcom,iommu-ctx@fdc8d000 {
Olav Hauganbca3ded2013-05-10 11:19:34 -0700[diff] [blame]311 compatible = "qcom,msm-smmu-v1-ctx";
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]312 reg = <0xfdc8d000 0x1000>;
Mitchel Humpherys20c9a212013-05-21 17:52:12 -0700[diff] [blame]313 interrupts = <0 42 0>, <0 43 0>;
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]314 qcom,iommu-ctx-sids = <0x80 0x81 0x82 0x83 0x84 0x85>;
315 label = "venus_cp";
316 qcom,secure-context;
317 };
318
Olav Haugan7930a682013-01-29 13:28:06 -0800[diff] [blame]319 venus_fw: qcom,iommu-ctx@fdc8e000 {
Olav Hauganbca3ded2013-05-10 11:19:34 -0700[diff] [blame]320 compatible = "qcom,msm-smmu-v1-ctx";
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]321 reg = <0xfdc8e000 0x1000>;
Mitchel Humpherys20c9a212013-05-21 17:52:12 -0700[diff] [blame]322 interrupts = <0 42 0>, <0 43 0>;
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]323 qcom,iommu-ctx-sids = <0xc0 0xc6>;
324 label = "venus_fw";
325 qcom,secure-context;
Olav Haugan9c255522012-11-16 16:43:17 -0800[diff] [blame]326 };
327 };
328
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]329 kgsl_iommu: qcom,iommu@fdb10000 {
Olav Haugan0e22c482013-01-28 17:39:36 -0800[diff] [blame]330 compatible = "qcom,msm-smmu-v1";
Olav Haugan9c255522012-11-16 16:43:17 -0800[diff] [blame]331 #address-cells = <1>;
332 #size-cells = <1>;
333 ranges;
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]334 reg = <0xfdb10000 0x10000>;
335 reg-names = "iommu_base";
336 interrupts = <0 38 0>;
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]337 label = "kgsl_iommu";
Mitchel Humpherys6203d322013-06-05 11:47:34 -0700[diff] [blame]338 qcom,msm-bus,name = "kgsl_ebi";
339 qcom,msm-bus,num-cases = <2>;
Mitchel Humpherys6203d322013-06-05 11:47:34 -0700[diff] [blame]340 qcom,msm-bus,num-paths = <1>;
341 qcom,msm-bus,vectors-KBps =
342 <26 512 0 0>,
343 <26 512 0 1000>;
Olav Haugan9c255522012-11-16 16:43:17 -0800[diff] [blame]344 status = "disabled";
345
Olav Hauganf7674ed2013-01-24 17:07:13 -0800[diff] [blame]346 qcom,iommu-pmu-ngroups = <1>;
347 qcom,iommu-pmu-ncounters = <8>;
348 qcom,iommu-pmu-event-classes = <0x00
349 0x01
350 0x08
351 0x09
352 0x0A
353 0x10
354 0x11
355 0x12
356 0x80
357 0x81
358 0x82
359 0x83
360 0x90
361 0x91
362 0x92
363 0xb0
364 0xb1>;
365
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]366 qcom,iommu-bfb-regs = <0x204c
367 0x2050
368 0x2514
369 0x2540
370 0x256c
371 0x20ac
372 0x215c
373 0x220c
374 0x2314
375 0x2394
376 0x2414
377 0x2008>;
Olav Haugan9c255522012-11-16 16:43:17 -0800[diff] [blame]378
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]379 qcom,iommu-bfb-data = <0x00000003
380 0x0
381 0x00000004
382 0x00000010
383 0x00000000
384 0x00000000
385 0x00000001
386 0x00000021
387 0x0
388 0x1
389 0x81
390 0x0>;
Olav Haugan9c255522012-11-16 16:43:17 -0800[diff] [blame]391
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]392 qcom,iommu-ctx@fdb18000 {
Olav Hauganbca3ded2013-05-10 11:19:34 -0700[diff] [blame]393 compatible = "qcom,msm-smmu-v1-ctx";
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]394 reg = <0xfdb18000 0x1000>;
Olav Haugan9c255522012-11-16 16:43:17 -0800[diff] [blame]395 interrupts = <0 241 0>;
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]396 qcom,iommu-ctx-sids = <0>;
Olav Haugan9c255522012-11-16 16:43:17 -0800[diff] [blame]397 label = "gfx3d_user";
398 };
399
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]400 qcom,iommu-ctx@fdb19000 {
Olav Hauganbca3ded2013-05-10 11:19:34 -0700[diff] [blame]401 compatible = "qcom,msm-smmu-v1-ctx";
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]402 reg = <0xfdb19000 0x1000>;
Olav Haugan9c255522012-11-16 16:43:17 -0800[diff] [blame]403 interrupts = <0 241 0>;
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]404 qcom,iommu-ctx-sids = <1>;
Olav Haugan9c255522012-11-16 16:43:17 -0800[diff] [blame]405 label = "gfx3d_priv";
406 };
Olav Haugan04655f32013-04-06 10:21:35 -0700[diff] [blame]407
408 qcom,iommu-ctx@fdb1a000 {
409 compatible = "qcom,msm-smmu-v1-ctx";
410 reg = <0xfdb1a000 0x1000>;
411 interrupts = <0 241 0>;
412 qcom,iommu-ctx-sids = <2>;
413 label = "gfx3d_spare";
414 };
415
Olav Haugan9c255522012-11-16 16:43:17 -0800[diff] [blame]416 };
417
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]418 vfe_iommu: qcom,iommu@fda44000 {
Olav Haugan0e22c482013-01-28 17:39:36 -0800[diff] [blame]419 compatible = "qcom,msm-smmu-v1";
Olav Haugan9c255522012-11-16 16:43:17 -0800[diff] [blame]420 #address-cells = <1>;
421 #size-cells = <1>;
422 ranges;
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]423 reg = <0xfda44000 0x10000>;
424 reg-names = "iommu_base";
425 interrupts = <0 62 0>;
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]426 qcom,needs-alt-core-clk;
Olav Haugan9c255522012-11-16 16:43:17 -0800[diff] [blame]427 label = "vfe_iommu";
Mitchel Humpherys6203d322013-06-05 11:47:34 -0700[diff] [blame]428 qcom,msm-bus,name = "vfe_ebi";
429 qcom,msm-bus,num-cases = <2>;
Mitchel Humpherys6203d322013-06-05 11:47:34 -0700[diff] [blame]430 qcom,msm-bus,num-paths = <1>;
431 qcom,msm-bus,vectors-KBps =
432 <29 512 0 0>,
433 <29 512 0 1000>;
Olav Haugan9c255522012-11-16 16:43:17 -0800[diff] [blame]434 status = "disabled";
435
Olav Hauganf7674ed2013-01-24 17:07:13 -0800[diff] [blame]436 qcom,iommu-pmu-ngroups = <1>;
437 qcom,iommu-pmu-ncounters = <8>;
438 qcom,iommu-pmu-event-classes = <0x00
439 0x01
440 0x08
441 0x09
442 0x0A
443 0x10
444 0x11
445 0x12
446 0x80
447 0x81
448 0x82
449 0x83
450 0x90
451 0x91
452 0x92
453 0xb0
454 0xb1>;
455
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]456 qcom,iommu-bfb-regs = <0x204c
457 0x2050
458 0x2514
459 0x2540
460 0x256c
461 0x2314
462 0x2394
463 0x2414
464 0x20ac
465 0x215c
466 0x220c
467 0x2008
468 0x200c
469 0x2010
470 0x2014
471 0x2018
472 0x201c
473 0x2020>;
474
475 qcom,iommu-bfb-data = <0xffffffff
476 0x00000000
477 0x4
478 0x8
479 0x0
480 0x0
481 0x20
482 0x78
483 0x0
484 0x20
485 0x36
486 0x0
487 0x0
488 0x0
489 0x0
490 0x0
491 0x0
492 0x0>;
493
494 qcom,iommu-ctx@fda4c000 {
Olav Hauganbca3ded2013-05-10 11:19:34 -0700[diff] [blame]495 compatible = "qcom,msm-smmu-v1-ctx";
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]496 reg = <0xfda4c000 0x1000>;
Olav Haugan9c255522012-11-16 16:43:17 -0800[diff] [blame]497 interrupts = <0 65 0>;
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]498 qcom,iommu-ctx-sids = <0>;
Olav Haugan9c255522012-11-16 16:43:17 -0800[diff] [blame]499 label = "vfe0";
500 };
501
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]502 qcom,iommu-ctx@fda4d000 {
Olav Hauganbca3ded2013-05-10 11:19:34 -0700[diff] [blame]503 compatible = "qcom,msm-smmu-v1-ctx";
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]504 reg = <0xfda4d000 0x1000>;
Olav Haugan9c255522012-11-16 16:43:17 -0800[diff] [blame]505 interrupts = <0 65 0>;
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]506 qcom,iommu-ctx-sids = <1>;
Olav Haugan9c255522012-11-16 16:43:17 -0800[diff] [blame]507 label = "vfe1";
508 };
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]509
510 qcom,iommu-ctx@fda4e000 {
Olav Hauganbca3ded2013-05-10 11:19:34 -0700[diff] [blame]511 compatible = "qcom,msm-smmu-v1-ctx";
Olav Haugan54166782013-01-28 16:59:51 -0800[diff] [blame]512 reg = <0xfda4e000 0x1000>;
513 interrupts = <0 65 0>;
514 qcom,iommu-ctx-sids = <2>;
515 label = "cpp";
516 };
Olav Haugan9c255522012-11-16 16:43:17 -0800[diff] [blame]517 };
Olav Haugan04655f32013-04-06 10:21:35 -0700[diff] [blame]518
519 copss_iommu: qcom,iommu@f9bc4000 {
520 compatible = "qcom,msm-smmu-v1";
521 #address-cells = <1>;
522 #size-cells = <1>;
523 ranges;
524 reg = <0xf9bc4000 0x10000>;
525 reg-names = "iommu_base";
526 interrupts = <0 153 0>;
527 label = "copss_iommu";
528 qcom,msm-bus,name = "copss_ebi";
529 qcom,msm-bus,num-cases = <2>;
Olav Haugan04655f32013-04-06 10:21:35 -0700[diff] [blame]530 qcom,msm-bus,num-paths = <1>;
531 qcom,msm-bus,vectors-KBps =
532 <88 512 0 0>,
533 <88 512 0 1000>;
534 status = "disabled";
535 qcom,iommu-pmu-ngroups = <1>;
536 qcom,iommu-pmu-ncounters = <8>;
537 qcom,iommu-pmu-event-classes = <0x00
538 0x01
539 0x08
540 0x09
541 0x0a
542 0x10
543 0x11
544 0x12
545 0x80
546 0x81
547 0x82
548 0x83
549 0x90
550 0x91
551 0x92
552 0xb0
553 0xb1>;
554
555 qcom,iommu-bfb-regs = <0x204c
556 0x2514
557 0x2540
558 0x256c
559 0x20ac
560 0x215c
561 0x220c
562 0x22bc
563 0x2314
564 0x2394
565 0x2414
566 0x2494
567 0x2008>;
568
569 qcom,iommu-bfb-data = <0x3
570 0x4
571 0x4
572 0x0
573 0x0
574 0x0
575 0x1
576 0x0
577 0x0
578 0x40
579 0x44
580 0x0
581 0x0>;
582
583 qcom,iommu-lpae-bfb-regs = <0x204c
584 0x2514
585 0x2540
586 0x256c
587 0x20ac
588 0x215c
589 0x220c
590 0x22bc
591 0x2314
592 0x2394
593 0x2414
594 0x2494
595 0x2008>;
596
597 qcom,iommu-lpae-bfb-data = <0x3
598 0x0
599 0x4
600 0x4
601 0x0
602 0x5
603 0x0
604 0x1
605 0x0
606 0x0
607 0x40
608 0x44
609 0x0>;
610
611
612 copss_cb_0: qcom,iommu-ctx@f9bcc000 {
613 compatible = "qcom,msm-smmu-v1-ctx";
614 reg = <0xf9bcc000 0x1000>;
615 interrupts = <0 142 0>;
616 qcom,iommu-ctx-sids = <0>;
617 label = "copss_cb_0";
618 };
619
620 copss_cb_1: qcom,iommu-ctx@f9bcd000 {
621 compatible = "qcom,msm-smmu-v1-ctx";
622 reg = <0xf9bcd000 0x1000>;
623 interrupts = <0 142 0>;
624 qcom,iommu-ctx-sids = <1>;
625 label = "copss_cb_1";
626 };
627
628 copss_cb_2: qcom,iommu-ctx@f9bce000 {
629 compatible = "qcom,msm-smmu-v1-ctx";
630 reg = <0xf9bce000 0x1000>;
631 interrupts = <0 142 0>;
632 qcom,iommu-ctx-sids = <2>;
633 label = "copss_cb_2";
634 };
635
636 copss_cb_3: qcom,iommu-ctx@f9bcf000 {
637 compatible = "qcom,msm-smmu-v1-ctx";
638 reg = <0xf9bcf000 0x1000>;
639 interrupts = <0 142 0>;
640 qcom,iommu-ctx-sids = <3>;
641 label = "copss_cb_3";
642 };
643
644 copss_cb_4: qcom,iommu-ctx@f9bd0000 {
645 compatible = "qcom,msm-smmu-v1-ctx";
646 reg = <0xf9bd0000 0x1000>;
647 interrupts = <0 142 0>;
648 qcom,iommu-ctx-sids = <4>;
649 label = "copss_cb_4";
650 };
651
652 copss_cb_5: qcom,iommu-ctx@f9bd1000 {
653 compatible = "qcom,msm-smmu-v1-ctx";
654 reg = <0xf9bd1000 0x1000>;
655 interrupts = <0 142 0>;
656 qcom,iommu-ctx-sids = <5>;
657 label = "copss_cb_5";
658 };
659
660 copss_cb_6: qcom,iommu-ctx@f9bd2000 {
661 compatible = "qcom,msm-smmu-v1-ctx";
662 reg = <0xf9bd2000 0x1000>;
663 interrupts = <0 142 0>;
664 qcom,iommu-ctx-sids = <6>;
665 label = "copss_cb_6";
666 };
667
668 copss_cb_7: qcom,iommu-ctx@f9bd3000 {
669 compatible = "qcom,msm-smmu-v1-ctx";
670 reg = <0xf9bd3000 0x1000>;
671 interrupts = <0 142 0>;
672 qcom,iommu-ctx-sids = <7>;
673 label = "copss_cb_7";
674 };
675 };
676
677 vpu_iommu: qcom,iommu@fdee4000 {
678 compatible = "qcom,msm-smmu-v1";
679 #address-cells = <1>;
680 #size-cells = <1>;
681 ranges;
682 reg = <0xfdee4000 0x10000>;
683 reg-names = "iommu_base";
684 interrupts = <0 147 0>;
685 label = "vpu_iommu";
686 qcom,msm-bus,name = "vpu_ebi";
687 qcom,msm-bus,num-cases = <2>;
Olav Haugan04655f32013-04-06 10:21:35 -0700[diff] [blame]688 qcom,msm-bus,num-paths = <1>;
689 qcom,msm-bus,vectors-KBps =
690 <93 512 0 0>,
691 <93 512 0 1000>;
692 status = "disabled";
693 qcom,iommu-pmu-ngroups = <1>;
694 qcom,iommu-pmu-ncounters = <8>;
695 qcom,iommu-pmu-event-classes = <0x00
696 0x01
697 0x08
698 0x09
699 0x0a
700 0x10
701 0x11
702 0x12
703 0x80
704 0x81
705 0x82
706 0x83
707 0x90
708 0x91
709 0x92
710 0xb0
711 0xb1>;
712
713 qcom,iommu-bfb-regs = <0x204c
714 0x2514
715 0x2540
716 0x256c
717 0x2314
718 0x2394
719 0x2414
720 0x2494
721 0x20ac
722 0x215c
723 0x220c
724 0x22bc
725 0x2008
726 0x200c
727 0x2010
728 0x2014>;
729
730 qcom,iommu-bfb-data = <0xffff
731 0x4
732 0x10
733 0x0
734 0x0
735 0xf
736 0x4b
737 0x0
738 0x1e00
739 0x1e00
740 0x5a0f
741 0x0
742 0x0
743 0x0
744 0x0
745 0x0>;
746
747 qcom,iommu-lpae-bfb-regs = <0x204c
748 0x2514
749 0x2540
750 0x256c
751 0x2314
752 0x2394
753 0x2414
754 0x2494
755 0x20ac
756 0x215c
757 0x220c
758 0x22bc
759 0x2008
760 0x200c
761 0x2010
762 0x2014>;
763
764 qcom,iommu-lpae-bfb-data = <0xffff
765 0x0
766 0x4
767 0x10
768 0x0
769 0x0
770 0xf
771 0x4b
772 0x1e00
773 0x5a2d
774 0x1e00
775 0x5a0f
776 0x0
777 0x0
778 0x0
779 0x0>;
780
781
782 vpu_cb_0: qcom,iommu-ctx@fdeec000 {
783 compatible = "qcom,msm-smmu-v1-ctx";
784 reg = <0xfdeec000 0x1000>;
785 interrupts = <0 145 0>;
786 qcom,iommu-ctx-sids = <0 1 3>;
787 label = "vpu_cb_0";
788 };
789
790 vpu_cb_1: qcom,iommu-ctx@fdeed000 {
791 compatible = "qcom,msm-smmu-v1-ctx";
792 reg = <0xfdeed000 0x1000>;
793 interrupts = <0 145 0>;
794 qcom,iommu-ctx-sids = <8 9>;
795 label = "vpu_cb_1";
796 };
797
798 vpu_cb_2: qcom,iommu-ctx@fdeee000 {
799 compatible = "qcom,msm-smmu-v1-ctx";
800 reg = <0xfdeee000 0x1000>;
801 interrupts = <0 145 0>;
802 qcom,iommu-ctx-sids = <5 7 15>;
803 label = "vpu_cb_2";
804 };
805 };
806
807 lpass_qdsp_iommu: qcom,iommu@fe054000 {
808 compatible = "qcom,msm-smmu-v1";
809 #address-cells = <1>;
810 #size-cells = <1>;
811 ranges;
812 reg = <0xfe054000 0x10000>;
813 reg-names = "iommu_base";
814 interrupts = <0 202 0>;
815 label = "lpass_qdsp_iommu";
816 qcom,msm-bus,name = "lpass_qdsp_ebi";
817 qcom,msm-bus,num-cases = <2>;
Olav Haugan04655f32013-04-06 10:21:35 -0700[diff] [blame]818 qcom,msm-bus,num-paths = <1>;
819 qcom,msm-bus,vectors-KBps =
820 <11 512 0 0>,
821 <11 512 0 1000>;
822 status = "disabled";
823 qcom,iommu-pmu-ngroups = <1>;
824 qcom,iommu-pmu-ncounters = <8>;
825 qcom,iommu-pmu-event-classes = <0x00
826 0x01
827 0x08
828 0x09
829 0x0a
830 0x10
831 0x11
832 0x12
833 0x80
834 0x81
835 0x82
836 0x83
837 0x90
838 0x91
839 0x92
840 0xb0
841 0xb1>;
842
843 qcom,iommu-bfb-regs = <0x204c
844 0x2514
845 0x2540
846 0x256c
847 0x20ac
848 0x215c
849 0x220c
850 0x22bc
851 0x2314
852 0x2394
853 0x2414
854 0x2494
855 0x2008>;
856
857 qcom,iommu-bfb-data = <0x3
858 0x4
859 0x4
860 0x0
861 0x0
862 0x0
863 0x10
864 0x0
865 0x0
866 0x15e
867 0x19e
868 0x0
869 0x0>;
870
871 qcom,iommu-lpae-bfb-regs = <0x204c
872 0x2514
873 0x2540
874 0x256c
875 0x20ac
876 0x215c
877 0x220c
878 0x22bc
879 0x2314
880 0x2394
881 0x2414
882 0x2494
883 0x2008>;
884
885 qcom,iommu-lpae-bfb-data = <0x3
886 0x0
887 0x4
888 0x4
889 0x0
890 0x20
891 0x0
892 0x10
893 0x0
894 0x0
895 0x15e
896 0x19e
897 0x0>;
898
899
900 lpass_qdsp_cb_0: qcom,iommu-ctx@fe05c000 {
901 compatible = "qcom,msm-smmu-v1-ctx";
902 reg = <0xfe05c000 0x1000>;
903 interrupts = <0 265 0>;
904 qcom,iommu-ctx-sids = <0>;
905 label = "lpass_qdsp_cb_0";
906 };
907
908 lpass_qdsp_cb_1: qcom,iommu-ctx@fe05d000 {
909 compatible = "qcom,msm-smmu-v1-ctx";
910 reg = <0xfe05d000 0x1000>;
911 interrupts = <0 265 0>;
912 qcom,iommu-ctx-sids = <1>;
913 label = "lpass_qdsp_cb_1";
914 };
915
916 lpass_qdsp_cb_2: qcom,iommu-ctx@fe05e000 {
917 compatible = "qcom,msm-smmu-v1-ctx";
918 reg = <0xfe05e000 0x1000>;
919 interrupts = <0 265 0>;
920 qcom,iommu-ctx-sids = <2>;
921 label = "lpass_qdsp_cb_2";
922 };
923
924 lpass_qdsp_cb_3: qcom,iommu-ctx@fe05f000 {
925 compatible = "qcom,msm-smmu-v1-ctx";
926 reg = <0xfe05f000 0x1000>;
927 interrupts = <0 265 0>;
928 qcom,iommu-ctx-sids = <3>;
929 label = "lpass_qdsp_cb_3";
930 };
931 };
932
933 lpass_core_iommu: qcom,iommu@fe064000 {
934 compatible = "qcom,msm-smmu-v1";
935 #address-cells = <1>;
936 #size-cells = <1>;
937 ranges;
938 reg = <0xfe064000 0x10000>;
939 reg-names = "iommu_base";
940 interrupts = <0 166 0>;
941 label = "lpass_core_iommu";
942 qcom,msm-bus,name = "lpass_core_ebi";
943 qcom,msm-bus,num-cases = <2>;
Olav Haugan04655f32013-04-06 10:21:35 -0700[diff] [blame]944 qcom,msm-bus,num-paths = <1>;
945 qcom,msm-bus,vectors-KBps =
946 <52 512 0 0>,
947 <52 512 0 1000>;
948 status = "disabled";
949 qcom,iommu-pmu-ngroups = <1>;
950 qcom,iommu-pmu-ncounters = <8>;
951 qcom,iommu-pmu-event-classes = <0x00
952 0x01
953 0x08
954 0x09
955 0x0a
956 0x10
957 0x11
958 0x12
959 0x80
960 0x81
961 0x82
962 0x83
963 0x90
964 0x91
965 0x92
966 0xb0
967 0xb1>;
968
969 qcom,iommu-bfb-regs = <0x204c
970 0x2514
971 0x2540
972 0x256c
973 0x20ac
974 0x215c
975 0x220c
976 0x22bc
977 0x2314
978 0x2394
979 0x2414
980 0x2494
981 0x2008>;
982
983 qcom,iommu-bfb-data = <0x3
984 0x4
985 0x4
986 0x0
987 0x0
988 0x0
989 0x4
990 0x0
991 0x0
992 0x40
993 0x50
994 0x0
995 0x0>;
996
997 qcom,iommu-lpae-bfb-regs = <0x204c
998 0x2514
999 0x2540
1000 0x256c
1001 0x20ac
1002 0x215c
1003 0x220c
1004 0x22bc
1005 0x2314
1006 0x2394
1007 0x2414
1008 0x2494
1009 0x2008>;
1010
1011 qcom,iommu-lpae-bfb-data = <0x3
1012 0x0
1013 0x4
1014 0x4
1015 0x0
1016 0xc
1017 0x0
1018 0x4
1019 0x0
1020 0x0
1021 0x40
1022 0x50
1023 0x0>;
1024
1025
1026 lpass_core_cb_0: qcom,iommu-ctx@fe06c000 {
1027 compatible = "qcom,msm-smmu-v1-ctx";
1028 reg = <0xfe06c000 0x1000>;
1029 interrupts = <0 267 0>;
1030 qcom,iommu-ctx-sids = <0>;
1031 label = "lpass_core_cb_0";
1032 };
1033
1034 lpass_core_cb_1: qcom,iommu-ctx@fe06d000 {
1035 compatible = "qcom,msm-smmu-v1-ctx";
1036 reg = <0xfe06d000 0x1000>;
1037 interrupts = <0 267 0>;
1038 qcom,iommu-ctx-sids = <1>;
1039 label = "lpass_core_cb_1";
1040 };
1041
1042 lpass_core_cb_2: qcom,iommu-ctx@fe06e000 {
1043 compatible = "qcom,msm-smmu-v1-ctx";
1044 reg = <0xfe06e000 0x1000>;
1045 interrupts = <0 267 0>;
1046 qcom,iommu-ctx-sids = <2>;
1047 label = "lpass_core_cb_2";
1048 };
1049 };
Susheel Khianif7d370a2013-07-05 11:49:10 +0530[diff] [blame]1050
1051 vcap_iommu: qcom,iommu@fdfb6000 {
1052 compatible = "qcom,msm-smmu-v1";
1053 #address-cells = <1>;
1054 #size-cells = <1>;
1055 ranges;
1056 reg = <0xfdfb6000 0x10000>;
1057 reg-names = "iommu_base";
1058 interrupts = <0 315 0>;
1059 qcom,needs-alt-core-clk;
1060 label = "vcap_iommu";
1061 status = "disabled";
1062 qcom,msm-bus,name = "vcap_ebi";
1063 qcom,msm-bus,num-cases = <2>;
Susheel Khianif7d370a2013-07-05 11:49:10 +0530[diff] [blame]1064 qcom,msm-bus,num-paths = <1>;
1065 qcom,msm-bus,vectors-KBps =
1066 <48 512 0 0>,
1067 <48 512 0 1000>;
1068
1069 qcom,iommu-pmu-ngroups = <1>;
1070 qcom,iommu-pmu-ncounters = <8>;
1071 qcom,iommu-pmu-event-classes = <0x00
1072 0x01
1073 0x08
1074 0x09
1075 0x0A
1076 0x10
1077 0x11
1078 0x12
1079 0x80
1080 0x81
1081 0x82
1082 0x83
1083 0x90
1084 0x91
1085 0x92
1086 0xb0
1087 0xb1>;
1088
1089 qcom,iommu-bfb-regs = <0x204c
1090 0x2514
1091 0x2540
1092 0x256c
1093 0x2314
1094 0x2394
1095 0x2414
1096 0x2494
1097 0x20ac
1098 0x215c
1099 0x220c
1100 0x22bc
1101 0x2008
1102 0x200c>;
1103
1104 qcom,iommu-bfb-data = <0x0ff
1105 0x00000004
1106 0x00000008
1107 0x0
1108 0x0
1109 0x00000008
1110 0x00000028
1111 0x0
1112 0x001000
1113 0x001000
1114 0x003008
1115 0x0
1116 0x0
1117 0x0>;
1118
1119 qcom,iommu-ctx@fdfbe000 {
1120 compatible = "qcom,msm-smmu-v1-ctx";
1121 reg = <0xfdfbe000 0x1000>;
1122 interrupts = <0 313 0>;
1123 qcom,iommu-ctx-sids = <0>;
1124 label = "vcap_cb0";
1125 };
1126
1127 qcom,iommu-ctx@fdfbf000 {
1128 compatible = "qcom,msm-smmu-v1-ctx";
1129 reg = <0xfdfbf000 0x1000>;
1130 interrupts = <0 313 0>;
1131 qcom,iommu-ctx-sids = <1>;
1132 label = "vcap_cb1";
1133 };
1134
1135 qcom,iommu-ctx@fdfc0000 {
1136 compatible = "qcom,msm-smmu-v1-ctx";
1137 reg = <0xfdfc0000 0x1000>;
1138 interrupts = <0 313 0>;
1139 qcom,iommu-ctx-sids = <>;
1140 label = "vcap_cb2";
1141 };
1142 };
Olav Haugan9c255522012-11-16 16:43:17 -0800[diff] [blame]1143};