blob: 24b8d18be4cd1b69a4d8391c9ad9d726ba436053 [file] [log] [blame]
Sreesudhan Ramakrish Ramkumar3a179a12013-02-13 17:33:54 -08001/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Stepan Moskovchenko7731cd12012-10-23 14:44:15 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "dsi-panel-sim-video.dtsi"
Sreesudhan Ramakrish Ramkumard53503f2012-10-18 10:42:27 -070014/include/ "msm8974-leds.dtsi"
Sreesudhan Ramakrish Ramkumar97657922013-03-13 10:07:12 -070015/include/ "msm8974-camera-sensor-cdp.dtsi"
Stepan Moskovchenko7731cd12012-10-23 14:44:15 -070016
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -070017&soc {
Stepan Moskovchenko7731cd12012-10-23 14:44:15 -070018 qcom,mdss_dsi@fd922800 {
19 qcom,mdss_dsi_sim_video {
20 status = "ok";
21 };
22 };
23
24 serial@f991f000 {
25 status = "ok";
26 };
27
28 serial@f995e000 {
29 status = "ok";
30 };
31};
32
33&jpeg_iommu {
34 qcom,iommu-ctx@fda6c000 {
35 interrupts = <0 69 0>;
36 };
37
38 qcom,iommu-ctx@fda6d000 {
39 interrupts = <0 70 0>;
40 };
41
42 qcom,iommu-ctx@fda6e000 {
43 interrupts = <0 71 0>;
44 };
45};
46
47&mdp_iommu {
48 qcom,iommu-ctx@fd930000 {
49 interrupts = <0 46 0>;
50 };
51
52 qcom,iommu-ctx@fd931000 {
53 interrupts = <0 47 0>;
54 };
55};
56
57&venus_iommu {
58 qcom,iommu-ctx@fdc8c000 {
59 interrupts = <0 43 0>;
60 };
61
62 qcom,iommu-ctx@fdc8d000 {
63 interrupts = <0 42 0>;
64 };
65
66 qcom,iommu-ctx@fdc8e000 {
67 interrupts = <0 41 0>;
68 };
69};
70
71&kgsl_iommu {
72 qcom,iommu-ctx@fdb18000 {
73 interrupts = <0 240 0>;
74 };
75
76 qcom,iommu-ctx@fdb19000 {
77 interrupts = <0 241 0>;
78 };
79};
80
81&vfe_iommu {
82 qcom,iommu-ctx@fda4c000 {
83 interrupts = <0 64 0>;
84 };
85
86 qcom,iommu-ctx@fda4d000 {
87 interrupts = <0 65 0>;
88 };
89
90 qcom,iommu-ctx@fda4e000 {
91 interrupts = <0 66 0>;
92 };
93};