blob: 6e8447dc020203c537383caa219d6c23bf2e775c [file] [log] [blame]
Grant Likely8e267f32011-07-19 17:26:54 -06001/dts-v1/;
2
Grant Likely8e267f32011-07-19 17:26:54 -06003/include/ "tegra20.dtsi"
4
5/ {
6 model = "NVIDIA Tegra2 Harmony evaluation board";
7 compatible = "nvidia,harmony", "nvidia,tegra20";
8
Grant Likely8e267f32011-07-19 17:26:54 -06009 memory@0 {
10 reg = < 0x00000000 0x40000000 >;
11 };
12
Stephen Warrend17adfd2012-01-25 14:43:27 -070013 pmc@7000f400 {
14 nvidia,invert-interrupt;
15 };
16
Grant Likely8e267f32011-07-19 17:26:54 -060017 i2c@7000c000 {
18 clock-frequency = <400000>;
19
Stephen Warren797acf72012-01-11 16:09:57 -070020 wm8903: wm8903@1a {
Grant Likely8e267f32011-07-19 17:26:54 -060021 compatible = "wlf,wm8903";
22 reg = <0x1a>;
Stephen Warren797acf72012-01-11 16:09:57 -070023 interrupt-parent = <&gpio>;
24 interrupts = < 187 0x04 >;
Grant Likely8e267f32011-07-19 17:26:54 -060025
26 gpio-controller;
27 #gpio-cells = <2>;
28
Stephen Warren797acf72012-01-11 16:09:57 -070029 micdet-cfg = <0>;
30 micdet-delay = <100>;
31 gpio-cfg = < 0xffffffff 0xffffffff 0 0xffffffff 0xffffffff >;
Grant Likely8e267f32011-07-19 17:26:54 -060032 };
33 };
34
35 i2c@7000c400 {
36 clock-frequency = <400000>;
37 };
38
39 i2c@7000c500 {
40 clock-frequency = <400000>;
41 };
42
43 i2c@7000d000 {
44 clock-frequency = <400000>;
45 };
46
Stephen Warren797acf72012-01-11 16:09:57 -070047 i2s@70002a00 {
48 status = "disable";
49 };
Grant Likely8e267f32011-07-19 17:26:54 -060050
Stephen Warren797acf72012-01-11 16:09:57 -070051 sound {
52 compatible = "nvidia,tegra-audio-wm8903-harmony",
53 "nvidia,tegra-audio-wm8903";
54 nvidia,model = "NVIDIA Tegra Harmony";
55
56 nvidia,audio-routing =
57 "Headphone Jack", "HPOUTR",
58 "Headphone Jack", "HPOUTL",
59 "Int Spk", "ROP",
60 "Int Spk", "RON",
61 "Int Spk", "LOP",
62 "Int Spk", "LON",
63 "Mic Jack", "MICBIAS",
64 "IN1L", "Mic Jack";
65
66 nvidia,i2s-controller = <&tegra_i2s1>;
67 nvidia,audio-codec = <&wm8903>;
68
69 nvidia,spkr-en-gpios = <&wm8903 2 0>;
70 nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
71 nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */
72 nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */
Grant Likely8e267f32011-07-19 17:26:54 -060073 };
74
Stephen Warren31c1ec92011-11-21 14:44:10 -070075 serial@70006000 {
76 status = "disable";
77 };
78
79 serial@70006040 {
80 status = "disable";
81 };
82
83 serial@70006200 {
84 status = "disable";
85 };
86
Grant Likely8e267f32011-07-19 17:26:54 -060087 serial@70006300 {
88 clock-frequency = < 216000000 >;
89 };
90
Stephen Warren31c1ec92011-11-21 14:44:10 -070091 serial@70006400 {
92 status = "disable";
93 };
94
Stephen Warren1292c122011-11-21 14:44:11 -070095 sdhci@c8000000 {
96 status = "disable";
97 };
98
Grant Likely8e267f32011-07-19 17:26:54 -060099 sdhci@c8000200 {
Stephen Warrena0638eb2011-09-20 10:46:25 -0600100 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
101 wp-gpios = <&gpio 57 0>; /* gpio PH1 */
102 power-gpios = <&gpio 155 0>; /* gpio PT3 */
Grant Likely8e267f32011-07-19 17:26:54 -0600103 };
104
Stephen Warren1292c122011-11-21 14:44:11 -0700105 sdhci@c8000400 {
106 status = "disable";
107 };
108
Grant Likely8e267f32011-07-19 17:26:54 -0600109 sdhci@c8000600 {
Stephen Warrena0638eb2011-09-20 10:46:25 -0600110 cd-gpios = <&gpio 58 0>; /* gpio PH2 */
111 wp-gpios = <&gpio 59 0>; /* gpio PH3 */
112 power-gpios = <&gpio 70 0>; /* gpio PI6 */
Stephen Warren6111d502011-09-20 10:46:26 -0600113 support-8bit;
Grant Likely8e267f32011-07-19 17:26:54 -0600114 };
115};