blob: 1e62998538a2fce79767d625829de9db0bf6f112 [file] [log] [blame]
Daniel Walker2682fd32010-02-24 15:47:58 -08001/*
2 * Copyright (C) 2007 Google, Inc.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003 * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
Daniel Walker2682fd32010-02-24 15:47:58 -08004 * Author: Brian Swetland <swetland@google.com>
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#include <linux/kernel.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070018#include <linux/gpio.h>
Daniel Walker2682fd32010-02-24 15:47:58 -080019#include <linux/init.h>
20#include <linux/platform_device.h>
21#include <linux/input.h>
22#include <linux/io.h>
23#include <linux/delay.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070024#include <linux/bootmem.h>
Daniel Walker2682fd32010-02-24 15:47:58 -080025#include <linux/power_supply.h>
26
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070027#include <mach/msm_memtypes.h>
Daniel Walker2682fd32010-02-24 15:47:58 -080028#include <mach/hardware.h>
29#include <asm/mach-types.h>
30#include <asm/mach/arch.h>
31#include <asm/mach/map.h>
32#include <asm/mach/flash.h>
33#include <asm/setup.h>
34#ifdef CONFIG_CACHE_L2X0
35#include <asm/hardware/cache-l2x0.h>
36#endif
37
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070038#include <asm/mach/mmc.h>
Daniel Walker2682fd32010-02-24 15:47:58 -080039#include <mach/vreg.h>
40#include <mach/mpp.h>
Daniel Walker2682fd32010-02-24 15:47:58 -080041#include <mach/board.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070042#include <mach/pmic.h>
Daniel Walker2682fd32010-02-24 15:47:58 -080043#include <mach/msm_iomap.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070044#include <mach/msm_rpcrouter.h>
45#include <mach/msm_hsusb.h>
46#include <mach/rpc_hsusb.h>
47#include <mach/rpc_pmapp.h>
48#include <mach/msm_serial_hs.h>
49#include <mach/memory.h>
50#include <mach/msm_battery.h>
51#include <mach/rpc_server_handset.h>
52#include <mach/msm_tsif.h>
53#include <mach/socinfo.h>
Daniel Walker2682fd32010-02-24 15:47:58 -080054
55#include <linux/mtd/nand.h>
56#include <linux/mtd/partitions.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070057#include <linux/i2c.h>
58#include <linux/android_pmem.h>
59#include <mach/camera.h>
Daniel Walker2682fd32010-02-24 15:47:58 -080060
61#include "devices.h"
Daniel Walker2682fd32010-02-24 15:47:58 -080062#include "clock.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070063#include "msm-keypad-devices.h"
64#include "pm.h"
65
66#ifdef CONFIG_USB_ANDROID
67#include <linux/usb/android_composite.h>
68#endif
69
70#ifdef CONFIG_ARCH_MSM7X25
71#define MSM_PMEM_MDP_SIZE 0xb21000
72#define MSM_PMEM_ADSP_SIZE 0x97b000
73#define MSM_PMEM_AUDIO_SIZE 0x121000
74#define MSM_FB_SIZE 0x200000
75#define PMEM_KERNEL_EBI1_SIZE 0x64000
76#endif
77
78#ifdef CONFIG_ARCH_MSM7X27
79#define MSM_PMEM_MDP_SIZE 0x1B76000
80#define MSM_PMEM_ADSP_SIZE 0xC8A000
81#define MSM_PMEM_AUDIO_SIZE 0x5B000
82
83#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
84#define MSM_FB_SIZE 0x233000
85#else
86#define MSM_FB_SIZE 0x177000
87#endif
88
89#define PMEM_KERNEL_EBI1_SIZE 0x1C000
90#endif
Daniel Walker2682fd32010-02-24 15:47:58 -080091
92static struct resource smc91x_resources[] = {
93 [0] = {
94 .start = 0x9C004300,
95 .end = 0x9C0043ff,
96 .flags = IORESOURCE_MEM,
97 },
98 [1] = {
99 .start = MSM_GPIO_TO_INT(132),
100 .end = MSM_GPIO_TO_INT(132),
101 .flags = IORESOURCE_IRQ,
102 },
103};
104
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700105#ifdef CONFIG_USB_FUNCTION
106static struct usb_mass_storage_platform_data usb_mass_storage_pdata = {
107 .nluns = 0x02,
108 .buf_size = 16384,
109 .vendor = "GOOGLE",
110 .product = "Mass storage",
111 .release = 0xffff,
112};
113
114static struct platform_device mass_storage_device = {
115 .name = "usb_mass_storage",
116 .id = -1,
117 .dev = {
118 .platform_data = &usb_mass_storage_pdata,
119 },
120};
121#endif
122#ifdef CONFIG_USB_ANDROID
123static char *usb_functions_default[] = {
124 "diag",
125 "modem",
126 "nmea",
127 "rmnet",
128 "usb_mass_storage",
129};
130
131static char *usb_functions_default_adb[] = {
132 "diag",
133 "adb",
134 "modem",
135 "nmea",
136 "rmnet",
137 "usb_mass_storage",
138};
139
140static char *usb_functions_rndis[] = {
141 "rndis",
142};
143
144static char *usb_functions_rndis_adb[] = {
145 "rndis",
146 "adb",
147};
148
149static char *usb_functions_all[] = {
150#ifdef CONFIG_USB_ANDROID_RNDIS
151 "rndis",
152#endif
153#ifdef CONFIG_USB_ANDROID_DIAG
154 "diag",
155#endif
156 "adb",
157#ifdef CONFIG_USB_F_SERIAL
158 "modem",
159 "nmea",
160#endif
161#ifdef CONFIG_USB_ANDROID_RMNET
162 "rmnet",
163#endif
164 "usb_mass_storage",
165#ifdef CONFIG_USB_ANDROID_ACM
166 "acm",
167#endif
168};
169
170static struct android_usb_product usb_products[] = {
171 {
172 .product_id = 0x9026,
173 .num_functions = ARRAY_SIZE(usb_functions_default),
174 .functions = usb_functions_default,
175 },
176 {
177 .product_id = 0x9025,
178 .num_functions = ARRAY_SIZE(usb_functions_default_adb),
179 .functions = usb_functions_default_adb,
180 },
181 {
182 .product_id = 0xf00e,
183 .num_functions = ARRAY_SIZE(usb_functions_rndis),
184 .functions = usb_functions_rndis,
185 },
186 {
187 .product_id = 0x9024,
188 .num_functions = ARRAY_SIZE(usb_functions_rndis_adb),
189 .functions = usb_functions_rndis_adb,
190 },
191};
192
193static struct usb_mass_storage_platform_data mass_storage_pdata = {
194 .nluns = 1,
195 .vendor = "Qualcomm Incorporated",
196 .product = "Mass storage",
197 .release = 0x0100,
198 .can_stall = 1,
199};
200
201static struct platform_device usb_mass_storage_device = {
202 .name = "usb_mass_storage",
203 .id = -1,
204 .dev = {
205 .platform_data = &mass_storage_pdata,
206 },
207};
208
209static struct usb_ether_platform_data rndis_pdata = {
210 /* ethaddr is filled by board_serialno_setup */
211 .vendorID = 0x05C6,
212 .vendorDescr = "Qualcomm Incorporated",
213};
214
215static struct platform_device rndis_device = {
216 .name = "rndis",
217 .id = -1,
218 .dev = {
219 .platform_data = &rndis_pdata,
220 },
221};
222
223static struct android_usb_platform_data android_usb_pdata = {
224 .vendor_id = 0x05C6,
225 .product_id = 0x9026,
226 .version = 0x0100,
227 .product_name = "Qualcomm HSUSB Device",
228 .manufacturer_name = "Qualcomm Incorporated",
229 .num_products = ARRAY_SIZE(usb_products),
230 .products = usb_products,
231 .num_functions = ARRAY_SIZE(usb_functions_all),
232 .functions = usb_functions_all,
233 .serial_number = "1234567890ABCDEF",
234};
235
236static struct platform_device android_usb_device = {
237 .name = "android_usb",
238 .id = -1,
239 .dev = {
240 .platform_data = &android_usb_pdata,
241 },
242};
243
244static int __init board_serialno_setup(char *serialno)
245{
246 int i;
247 char *src = serialno;
248
249 /* create a fake MAC address from our serial number.
250 * first byte is 0x02 to signify locally administered.
251 */
252 rndis_pdata.ethaddr[0] = 0x02;
253 for (i = 0; *src; i++) {
254 /* XOR the USB serial across the remaining bytes */
255 rndis_pdata.ethaddr[i % (ETH_ALEN - 1) + 1] ^= *src++;
256 }
257
258 android_usb_pdata.serial_number = serialno;
259 return 1;
260}
261__setup("androidboot.serialno=", board_serialno_setup);
262#endif
263
Daniel Walker2682fd32010-02-24 15:47:58 -0800264static struct platform_device smc91x_device = {
265 .name = "smc91x",
266 .id = 0,
267 .num_resources = ARRAY_SIZE(smc91x_resources),
268 .resource = smc91x_resources,
269};
270
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700271#ifdef CONFIG_USB_FUNCTION
272static struct usb_function_map usb_functions_map[] = {
273 {"diag", 0},
274 {"adb", 1},
275 {"modem", 2},
276 {"nmea", 3},
277 {"mass_storage", 4},
278 {"ethernet", 5},
279 {"rmnet", 6},
280};
281
282/* dynamic composition */
283static struct usb_composition usb_func_composition[] = {
284 {
285 .product_id = 0x9012,
286 .functions = 0x5, /* 0101 */
287 },
288
289 {
290 .product_id = 0x9013,
291 .functions = 0x15, /* 10101 */
292 },
293
294 {
295 .product_id = 0x9014,
296 .functions = 0x30, /* 110000 */
297 },
298
299 {
300 .product_id = 0x9016,
301 .functions = 0xD, /* 01101 */
302 },
303
304 {
305 .product_id = 0x9017,
306 .functions = 0x1D, /* 11101 */
307 },
308
309 {
310 .product_id = 0xF000,
311 .functions = 0x10, /* 10000 */
312 },
313
314 {
315 .product_id = 0xF009,
316 .functions = 0x20, /* 100000 */
317 },
318
319 {
320 .product_id = 0x9018,
321 .functions = 0x1F, /* 011111 */
322 },
323#ifdef CONFIG_USB_FUNCTION_RMNET
324 {
325 .product_id = 0x9021,
326 /* DIAG + RMNET */
327 .functions = 0x41,
328 },
329 {
330 .product_id = 0x9022,
331 /* DIAG + ADB + RMNET */
332 .functions = 0x43,
333 },
334#endif
335
336};
337
338static struct msm_hsusb_platform_data msm_hsusb_pdata = {
339 .version = 0x0100,
340 .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_65NM),
341 .vendor_id = 0x5c6,
342 .product_name = "Qualcomm HSUSB Device",
343 .serial_number = "1234567890ABCDEF",
344 .manufacturer_name = "Qualcomm Incorporated",
345 .compositions = usb_func_composition,
346 .num_compositions = ARRAY_SIZE(usb_func_composition),
347 .function_map = usb_functions_map,
348 .num_functions = ARRAY_SIZE(usb_functions_map),
349 .config_gpio = NULL,
350};
351#endif
352
353#ifdef CONFIG_USB_EHCI_MSM_72K
354static void msm_hsusb_vbus_power(unsigned phy_info, int on)
355{
356 if (on)
357 msm_hsusb_vbus_powerup();
358 else
359 msm_hsusb_vbus_shutdown();
360}
361
362static struct msm_usb_host_platform_data msm_usb_host_pdata = {
363 .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_65NM),
364};
365
366static void __init msm7x2x_init_host(void)
367{
368 if (machine_is_msm7x25_ffa() || machine_is_msm7x27_ffa())
369 return;
370
371 msm_add_host(0, &msm_usb_host_pdata);
372}
373#endif
374
375#ifdef CONFIG_USB_MSM_OTG_72K
376static int hsusb_rpc_connect(int connect)
377{
378 if (connect)
379 return msm_hsusb_rpc_connect();
380 else
381 return msm_hsusb_rpc_close();
382}
383#endif
384
385#ifdef CONFIG_USB_MSM_OTG_72K
386struct vreg *vreg_3p3;
387static int msm_hsusb_ldo_init(int init)
388{
389 if (init) {
390 /*
391 * PHY 3.3V analog domain(VDDA33) is powered up by
392 * an always enabled power supply (LP5900TL-3.3).
393 * USB VREG default source is VBUS line. Turning
394 * on USB VREG has a side effect on the USB suspend
395 * current. Hence USB VREG is explicitly turned
396 * off here.
397 */
398 vreg_3p3 = vreg_get(NULL, "usb");
399 if (IS_ERR(vreg_3p3))
400 return PTR_ERR(vreg_3p3);
401 vreg_enable(vreg_3p3);
402 vreg_disable(vreg_3p3);
403 vreg_put(vreg_3p3);
404 }
405
406 return 0;
407}
408
409static int msm_hsusb_pmic_notif_init(void (*callback)(int online), int init)
410{
411 int ret;
412
413 if (init) {
414 ret = msm_pm_app_rpc_init(callback);
415 } else {
416 msm_pm_app_rpc_deinit(callback);
417 ret = 0;
418 }
419 return ret;
420}
421
422static int msm_otg_rpc_phy_reset(void __iomem *regs)
423{
424 return msm_hsusb_phy_reset();
425}
426
427static struct msm_otg_platform_data msm_otg_pdata = {
428 .rpc_connect = hsusb_rpc_connect,
429 .pmic_vbus_notif_init = msm_hsusb_pmic_notif_init,
430 .chg_vbus_draw = hsusb_chg_vbus_draw,
431 .chg_connected = hsusb_chg_connected,
432 .chg_init = hsusb_chg_init,
433#ifdef CONFIG_USB_EHCI_MSM_72K
434 .vbus_power = msm_hsusb_vbus_power,
435#endif
436 .ldo_init = msm_hsusb_ldo_init,
437 .pclk_required_during_lpm = 1,
438 .pclk_src_name = "ebi1_usb_clk",
439};
440
441#ifdef CONFIG_USB_GADGET
442static struct msm_hsusb_gadget_platform_data msm_gadget_pdata;
443#endif
444#endif
445
446#define SND(desc, num) { .name = #desc, .id = num }
447static struct snd_endpoint snd_endpoints_list[] = {
448 SND(HANDSET, 0),
449 SND(MONO_HEADSET, 2),
450 SND(HEADSET, 3),
451 SND(SPEAKER, 6),
452 SND(TTY_HEADSET, 8),
453 SND(TTY_VCO, 9),
454 SND(TTY_HCO, 10),
455 SND(BT, 12),
456 SND(IN_S_SADC_OUT_HANDSET, 16),
457 SND(IN_S_SADC_OUT_SPEAKER_PHONE, 25),
458 SND(CURRENT, 27),
459};
460#undef SND
461
462static struct msm_snd_endpoints msm_device_snd_endpoints = {
463 .endpoints = snd_endpoints_list,
464 .num = sizeof(snd_endpoints_list) / sizeof(struct snd_endpoint)
465};
466
467static struct platform_device msm_device_snd = {
468 .name = "msm_snd",
469 .id = -1,
470 .dev = {
471 .platform_data = &msm_device_snd_endpoints
472 },
473};
474
475#define DEC0_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
476 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
477 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
478 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
479 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
480 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
481#ifdef CONFIG_ARCH_MSM7X25
482#define DEC1_FORMAT ((1<<MSM_ADSP_CODEC_WAV)|(1<<MSM_ADSP_CODEC_ADPCM)| \
483 (1<<MSM_ADSP_CODEC_YADPCM)|(1<<MSM_ADSP_CODEC_QCELP)| \
484 (1<<MSM_ADSP_CODEC_MP3))
485#define DEC2_FORMAT ((1<<MSM_ADSP_CODEC_WAV)|(1<<MSM_ADSP_CODEC_ADPCM)| \
486 (1<<MSM_ADSP_CODEC_YADPCM)|(1<<MSM_ADSP_CODEC_QCELP)| \
487 (1<<MSM_ADSP_CODEC_MP3))
488#define DEC3_FORMAT 0
489#define DEC4_FORMAT 0
490#else
491#define DEC1_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
492 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
493 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
494 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
495 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
496 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
497#define DEC2_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
498 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
499 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
500 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
501 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
502 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
503#define DEC3_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
504 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
505 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
506 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
507 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
508 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
509#define DEC4_FORMAT (1<<MSM_ADSP_CODEC_MIDI)
510#endif
511
512static unsigned int dec_concurrency_table[] = {
513 /* Audio LP */
514 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DMA)), 0,
515 0, 0, 0,
516
517 /* Concurrency 1 */
518 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
519 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
520 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
521 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
522 (DEC4_FORMAT),
523
524 /* Concurrency 2 */
525 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
526 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
527 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
528 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
529 (DEC4_FORMAT),
530
531 /* Concurrency 3 */
532 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
533 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
534 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
535 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
536 (DEC4_FORMAT),
537
538 /* Concurrency 4 */
539 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
540 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
541 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
542 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
543 (DEC4_FORMAT),
544
545 /* Concurrency 5 */
546 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
547 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
548 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
549 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
550 (DEC4_FORMAT),
551
552 /* Concurrency 6 */
553 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
554 0, 0, 0, 0,
555
556 /* Concurrency 7 */
557 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
558 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
559 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
560 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
561 (DEC4_FORMAT),
562};
563
564#define DEC_INFO(name, queueid, decid, nr_codec) { .module_name = name, \
565 .module_queueid = queueid, .module_decid = decid, \
566 .nr_codec_support = nr_codec}
567
568static struct msm_adspdec_info dec_info_list[] = {
569 DEC_INFO("AUDPLAY0TASK", 13, 0, 11), /* AudPlay0BitStreamCtrlQueue */
570#ifdef CONFIG_ARCH_MSM7X25
571 DEC_INFO("AUDPLAY1TASK", 14, 1, 5), /* AudPlay1BitStreamCtrlQueue */
572 DEC_INFO("AUDPLAY2TASK", 15, 2, 5), /* AudPlay2BitStreamCtrlQueue */
573 DEC_INFO("AUDPLAY3TASK", 16, 3, 0), /* AudPlay3BitStreamCtrlQueue */
574 DEC_INFO("AUDPLAY4TASK", 17, 4, 0), /* AudPlay4BitStreamCtrlQueue */
575#else
576 DEC_INFO("AUDPLAY1TASK", 14, 1, 11), /* AudPlay1BitStreamCtrlQueue */
577 DEC_INFO("AUDPLAY2TASK", 15, 2, 11), /* AudPlay2BitStreamCtrlQueue */
578 DEC_INFO("AUDPLAY3TASK", 16, 3, 11), /* AudPlay3BitStreamCtrlQueue */
579 DEC_INFO("AUDPLAY4TASK", 17, 4, 1), /* AudPlay4BitStreamCtrlQueue */
580#endif
581};
582
583static struct msm_adspdec_database msm_device_adspdec_database = {
584 .num_dec = ARRAY_SIZE(dec_info_list),
585 .num_concurrency_support = (ARRAY_SIZE(dec_concurrency_table) / \
586 ARRAY_SIZE(dec_info_list)),
587 .dec_concurrency_table = dec_concurrency_table,
588 .dec_info_list = dec_info_list,
589};
590
591static struct platform_device msm_device_adspdec = {
592 .name = "msm_adspdec",
593 .id = -1,
594 .dev = {
595 .platform_data = &msm_device_adspdec_database
596 },
597};
598
599static struct android_pmem_platform_data android_pmem_pdata = {
600 .name = "pmem",
601 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
602 .cached = 1,
603 .memory_type = MEMTYPE_EBI1,
604};
605
606static struct android_pmem_platform_data android_pmem_adsp_pdata = {
607 .name = "pmem_adsp",
608 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
609 .cached = 0,
610 .memory_type = MEMTYPE_EBI1,
611};
612
613static struct android_pmem_platform_data android_pmem_audio_pdata = {
614 .name = "pmem_audio",
615 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
616 .cached = 0,
617 .memory_type = MEMTYPE_EBI1,
618};
619
620static struct platform_device android_pmem_device = {
621 .name = "android_pmem",
622 .id = 0,
623 .dev = { .platform_data = &android_pmem_pdata },
624};
625
626static struct platform_device android_pmem_adsp_device = {
627 .name = "android_pmem",
628 .id = 1,
629 .dev = { .platform_data = &android_pmem_adsp_pdata },
630};
631
632static struct platform_device android_pmem_audio_device = {
633 .name = "android_pmem",
634 .id = 2,
635 .dev = { .platform_data = &android_pmem_audio_pdata },
636};
637
638static struct msm_handset_platform_data hs_platform_data = {
639 .hs_name = "7k_handset",
640 .pwr_key_delay_ms = 500, /* 0 will disable end key */
641};
642
643static struct platform_device hs_device = {
644 .name = "msm-handset",
645 .id = -1,
646 .dev = {
647 .platform_data = &hs_platform_data,
648 },
649};
650
651/* TSIF begin */
652#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
653
654#define TSIF_B_SYNC GPIO_CFG(87, 5, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
655#define TSIF_B_DATA GPIO_CFG(86, 3, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
656#define TSIF_B_EN GPIO_CFG(85, 3, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
657#define TSIF_B_CLK GPIO_CFG(84, 4, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
658
659static const struct msm_gpio tsif_gpios[] = {
660 { .gpio_cfg = TSIF_B_CLK, .label = "tsif_clk", },
661 { .gpio_cfg = TSIF_B_EN, .label = "tsif_en", },
662 { .gpio_cfg = TSIF_B_DATA, .label = "tsif_data", },
663 { .gpio_cfg = TSIF_B_SYNC, .label = "tsif_sync", },
664};
665
666static struct msm_tsif_platform_data tsif_platform_data = {
667 .num_gpios = ARRAY_SIZE(tsif_gpios),
668 .gpios = tsif_gpios,
669 .tsif_clk = "tsif_clk",
670 .tsif_pclk = "tsif_pclk",
671 .tsif_ref_clk = "tsif_ref_clk",
672};
673#endif /* defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE) */
674/* TSIF end */
675
676#define LCDC_CONFIG_PROC 21
677#define LCDC_UN_CONFIG_PROC 22
678#define LCDC_API_PROG 0x30000066
679#define LCDC_API_VERS 0x00010001
680
681#define GPIO_OUT_132 132
682#define GPIO_OUT_131 131
683#define GPIO_OUT_103 103
684#define GPIO_OUT_102 102
685#define GPIO_OUT_88 88
686
687static struct msm_rpc_endpoint *lcdc_ep;
688
689static int msm_fb_lcdc_config(int on)
690{
691 int rc = 0;
692 struct rpc_request_hdr hdr;
693
694 if (on)
695 pr_info("lcdc config\n");
696 else
697 pr_info("lcdc un-config\n");
698
699 lcdc_ep = msm_rpc_connect_compatible(LCDC_API_PROG, LCDC_API_VERS, 0);
700 if (IS_ERR(lcdc_ep)) {
701 printk(KERN_ERR "%s: msm_rpc_connect failed! rc = %ld\n",
702 __func__, PTR_ERR(lcdc_ep));
703 return -EINVAL;
704 }
705
706 rc = msm_rpc_call(lcdc_ep,
707 (on) ? LCDC_CONFIG_PROC : LCDC_UN_CONFIG_PROC,
708 &hdr, sizeof(hdr),
709 5 * HZ);
710 if (rc)
711 printk(KERN_ERR
712 "%s: msm_rpc_call failed! rc = %d\n", __func__, rc);
713
714 msm_rpc_close(lcdc_ep);
715 return rc;
716}
717
718static int gpio_array_num[] = {
719 GPIO_OUT_132, /* spi_clk */
720 GPIO_OUT_131, /* spi_cs */
721 GPIO_OUT_103, /* spi_sdi */
722 GPIO_OUT_102, /* spi_sdoi */
723 GPIO_OUT_88
724 };
725
726static void lcdc_gordon_gpio_init(void)
727{
728 if (gpio_request(GPIO_OUT_132, "spi_clk"))
729 pr_err("failed to request gpio spi_clk\n");
730 if (gpio_request(GPIO_OUT_131, "spi_cs"))
731 pr_err("failed to request gpio spi_cs\n");
732 if (gpio_request(GPIO_OUT_103, "spi_sdi"))
733 pr_err("failed to request gpio spi_sdi\n");
734 if (gpio_request(GPIO_OUT_102, "spi_sdoi"))
735 pr_err("failed to request gpio spi_sdoi\n");
736 if (gpio_request(GPIO_OUT_88, "gpio_dac"))
737 pr_err("failed to request gpio_dac\n");
738}
739
740static uint32_t lcdc_gpio_table[] = {
741 GPIO_CFG(GPIO_OUT_132, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
742 GPIO_CFG(GPIO_OUT_131, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
743 GPIO_CFG(GPIO_OUT_103, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
744 GPIO_CFG(GPIO_OUT_102, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
745 GPIO_CFG(GPIO_OUT_88, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
746};
747
748static void config_lcdc_gpio_table(uint32_t *table, int len, unsigned enable)
749{
750 int n, rc;
751 for (n = 0; n < len; n++) {
752 rc = gpio_tlmm_config(table[n],
753 enable ? GPIO_CFG_ENABLE : GPIO_CFG_DISABLE);
754 if (rc) {
755 printk(KERN_ERR "%s: gpio_tlmm_config(%#x)=%d\n",
756 __func__, table[n], rc);
757 break;
758 }
759 }
760}
761
762static void lcdc_gordon_config_gpios(int enable)
763{
764 config_lcdc_gpio_table(lcdc_gpio_table,
765 ARRAY_SIZE(lcdc_gpio_table), enable);
766}
767
768static char *msm_fb_lcdc_vreg[] = {
769 "gp5"
770};
771
772static int msm_fb_lcdc_power_save(int on)
773{
774 struct vreg *vreg[ARRAY_SIZE(msm_fb_lcdc_vreg)];
775 int i, rc = 0;
776
777 for (i = 0; i < ARRAY_SIZE(msm_fb_lcdc_vreg); i++) {
778 if (on) {
779 vreg[i] = vreg_get(0, msm_fb_lcdc_vreg[i]);
780 rc = vreg_enable(vreg[i]);
781 if (rc) {
782 printk(KERN_ERR "vreg_enable: %s vreg"
783 "operation failed \n",
784 msm_fb_lcdc_vreg[i]);
785 goto bail;
786 }
787 } else {
788 int tmp;
789 vreg[i] = vreg_get(0, msm_fb_lcdc_vreg[i]);
790 tmp = vreg_disable(vreg[i]);
791 if (tmp) {
792 printk(KERN_ERR "vreg_disable: %s vreg "
793 "operation failed \n",
794 msm_fb_lcdc_vreg[i]);
795 if (!rc)
796 rc = tmp;
797 }
798 tmp = gpio_tlmm_config(GPIO_CFG(GPIO_OUT_88, 0,
799 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
800 GPIO_CFG_2MA), GPIO_CFG_ENABLE);
801 if (tmp) {
802 printk(KERN_ERR "gpio_tlmm_config failed\n");
803 if (!rc)
804 rc = tmp;
805 }
806 gpio_set_value(88, 0);
807 mdelay(15);
808 gpio_set_value(88, 1);
809 mdelay(15);
810 }
811 }
812
813 return rc;
814
815bail:
816 if (on) {
817 for (; i > 0; i--)
818 vreg_disable(vreg[i - 1]);
819 }
820
821 return rc;
822}
823static struct lcdc_platform_data lcdc_pdata = {
824 .lcdc_gpio_config = msm_fb_lcdc_config,
825 .lcdc_power_save = msm_fb_lcdc_power_save,
826};
827
828static struct msm_panel_common_pdata lcdc_gordon_panel_data = {
829 .panel_config_gpio = lcdc_gordon_config_gpios,
830 .gpio_num = gpio_array_num,
831};
832
833static struct platform_device lcdc_gordon_panel_device = {
834 .name = "lcdc_gordon_vga",
835 .id = 0,
836 .dev = {
837 .platform_data = &lcdc_gordon_panel_data,
838 }
839};
840
841static struct resource msm_fb_resources[] = {
842 {
843 .flags = IORESOURCE_DMA,
844 }
845};
846
847static int msm_fb_detect_panel(const char *name)
848{
849 int ret = -EPERM;
850
851 if (machine_is_msm7x25_ffa() || machine_is_msm7x27_ffa()) {
852 if (!strcmp(name, "lcdc_gordon_vga"))
853 ret = 0;
854 else
855 ret = -ENODEV;
856 }
857
858 return ret;
859}
860
861static struct msm_fb_platform_data msm_fb_pdata = {
862 .detect_client = msm_fb_detect_panel,
863 .mddi_prescan = 1,
864};
865
866static struct platform_device msm_fb_device = {
867 .name = "msm_fb",
868 .id = 0,
869 .num_resources = ARRAY_SIZE(msm_fb_resources),
870 .resource = msm_fb_resources,
871 .dev = {
872 .platform_data = &msm_fb_pdata,
873 }
874};
875
876#ifdef CONFIG_BT
877static struct platform_device msm_bt_power_device = {
878 .name = "bt_power",
879};
880
881enum {
882 BT_WAKE,
883 BT_RFR,
884 BT_CTS,
885 BT_RX,
886 BT_TX,
887 BT_PCM_DOUT,
888 BT_PCM_DIN,
889 BT_PCM_SYNC,
890 BT_PCM_CLK,
891 BT_HOST_WAKE,
892};
893
894static unsigned bt_config_power_on[] = {
895 GPIO_CFG(42, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* WAKE */
896 GPIO_CFG(43, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* RFR */
897 GPIO_CFG(44, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* CTS */
898 GPIO_CFG(45, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* Rx */
899 GPIO_CFG(46, 3, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* Tx */
900 GPIO_CFG(68, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* PCM_DOUT */
901 GPIO_CFG(69, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* PCM_DIN */
902 GPIO_CFG(70, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* PCM_SYNC */
903 GPIO_CFG(71, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* PCM_CLK */
904 GPIO_CFG(83, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* HOST_WAKE */
905};
906static unsigned bt_config_power_off[] = {
907 GPIO_CFG(42, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* WAKE */
908 GPIO_CFG(43, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* RFR */
909 GPIO_CFG(44, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* CTS */
910 GPIO_CFG(45, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* Rx */
911 GPIO_CFG(46, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* Tx */
912 GPIO_CFG(68, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* PCM_DOUT */
913 GPIO_CFG(69, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* PCM_DIN */
914 GPIO_CFG(70, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* PCM_SYNC */
915 GPIO_CFG(71, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* PCM_CLK */
916 GPIO_CFG(83, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* HOST_WAKE */
917};
918
919static int bluetooth_power(int on)
920{
921 struct vreg *vreg_bt;
922 int pin, rc;
923
924 printk(KERN_DEBUG "%s\n", __func__);
925
926 /* do not have vreg bt defined, gp6 is the same */
927 /* vreg_get parameter 1 (struct device *) is ignored */
928 vreg_bt = vreg_get(NULL, "gp6");
929
930 if (IS_ERR(vreg_bt)) {
931 printk(KERN_ERR "%s: vreg get failed (%ld)\n",
932 __func__, PTR_ERR(vreg_bt));
933 return PTR_ERR(vreg_bt);
934 }
935
936 if (on) {
937 for (pin = 0; pin < ARRAY_SIZE(bt_config_power_on); pin++) {
938 rc = gpio_tlmm_config(bt_config_power_on[pin],
939 GPIO_CFG_ENABLE);
940 if (rc) {
941 printk(KERN_ERR
942 "%s: gpio_tlmm_config(%#x)=%d\n",
943 __func__, bt_config_power_on[pin], rc);
944 return -EIO;
945 }
946 }
947
948 /* units of mV, steps of 50 mV */
949 rc = vreg_set_level(vreg_bt, 2600);
950 if (rc) {
951 printk(KERN_ERR "%s: vreg set level failed (%d)\n",
952 __func__, rc);
953 return -EIO;
954 }
955 rc = vreg_enable(vreg_bt);
956 if (rc) {
957 printk(KERN_ERR "%s: vreg enable failed (%d)\n",
958 __func__, rc);
959 return -EIO;
960 }
961 } else {
962 rc = vreg_disable(vreg_bt);
963 if (rc) {
964 printk(KERN_ERR "%s: vreg disable failed (%d)\n",
965 __func__, rc);
966 return -EIO;
967 }
968 for (pin = 0; pin < ARRAY_SIZE(bt_config_power_off); pin++) {
969 rc = gpio_tlmm_config(bt_config_power_off[pin],
970 GPIO_CFG_ENABLE);
971 if (rc) {
972 printk(KERN_ERR
973 "%s: gpio_tlmm_config(%#x)=%d\n",
974 __func__, bt_config_power_off[pin], rc);
975 return -EIO;
976 }
977 }
978 }
979 return 0;
980}
981
982static void __init bt_power_init(void)
983{
984 msm_bt_power_device.dev.platform_data = &bluetooth_power;
985}
986#else
987#define bt_power_init(x) do {} while (0)
988#endif
989
990static struct platform_device msm_device_pmic_leds = {
991 .name = "pmic-leds",
992 .id = -1,
993};
994
995static struct resource bluesleep_resources[] = {
996 {
997 .name = "gpio_host_wake",
998 .start = 83,
999 .end = 83,
1000 .flags = IORESOURCE_IO,
1001 },
1002 {
1003 .name = "gpio_ext_wake",
1004 .start = 42,
1005 .end = 42,
1006 .flags = IORESOURCE_IO,
1007 },
1008 {
1009 .name = "host_wake",
1010 .start = MSM_GPIO_TO_INT(83),
1011 .end = MSM_GPIO_TO_INT(83),
1012 .flags = IORESOURCE_IRQ,
1013 },
1014};
1015
1016static struct platform_device msm_bluesleep_device = {
1017 .name = "bluesleep",
1018 .id = -1,
1019 .num_resources = ARRAY_SIZE(bluesleep_resources),
1020 .resource = bluesleep_resources,
1021};
1022
1023static struct i2c_board_info i2c_devices[] = {
1024#ifdef CONFIG_MT9D112
1025 {
1026 I2C_BOARD_INFO("mt9d112", 0x78 >> 1),
1027 },
1028#endif
1029#ifdef CONFIG_S5K3E2FX
1030 {
1031 I2C_BOARD_INFO("s5k3e2fx", 0x20 >> 1),
1032 },
1033#endif
1034#ifdef CONFIG_MT9P012
1035 {
1036 I2C_BOARD_INFO("mt9p012", 0x6C >> 1),
1037 },
1038#endif
1039#ifdef CONFIG_MT9P012_KM
1040 {
1041 I2C_BOARD_INFO("mt9p012_km", 0x6C >> 2),
1042 },
1043#endif
1044#if defined(CONFIG_MT9T013) || defined(CONFIG_SENSORS_MT9T013)
1045 {
1046 I2C_BOARD_INFO("mt9t013", 0x6C),
1047 },
1048#endif
1049#ifdef CONFIG_VB6801
1050 {
1051 I2C_BOARD_INFO("vb6801", 0x20),
1052 },
1053#endif
1054};
1055
1056#ifdef CONFIG_MSM_CAMERA
1057static uint32_t camera_off_gpio_table[] = {
1058 /* parallel CAMERA interfaces */
1059 GPIO_CFG(0, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT0 */
1060 GPIO_CFG(1, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT1 */
1061 GPIO_CFG(2, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT2 */
1062 GPIO_CFG(3, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT3 */
1063 GPIO_CFG(4, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT4 */
1064 GPIO_CFG(5, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT5 */
1065 GPIO_CFG(6, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT6 */
1066 GPIO_CFG(7, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT7 */
1067 GPIO_CFG(8, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT8 */
1068 GPIO_CFG(9, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT9 */
1069 GPIO_CFG(10, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT10 */
1070 GPIO_CFG(11, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT11 */
1071 GPIO_CFG(12, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* PCLK */
1072 GPIO_CFG(13, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* HSYNC_IN */
1073 GPIO_CFG(14, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* VSYNC_IN */
1074 GPIO_CFG(15, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* MCLK */
1075};
1076
1077static uint32_t camera_on_gpio_table[] = {
1078 /* parallel CAMERA interfaces */
1079 GPIO_CFG(0, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT0 */
1080 GPIO_CFG(1, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT1 */
1081 GPIO_CFG(2, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT2 */
1082 GPIO_CFG(3, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT3 */
1083 GPIO_CFG(4, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT4 */
1084 GPIO_CFG(5, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT5 */
1085 GPIO_CFG(6, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT6 */
1086 GPIO_CFG(7, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT7 */
1087 GPIO_CFG(8, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT8 */
1088 GPIO_CFG(9, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT9 */
1089 GPIO_CFG(10, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT10 */
1090 GPIO_CFG(11, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT11 */
1091 GPIO_CFG(12, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_16MA), /* PCLK */
1092 GPIO_CFG(13, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* HSYNC_IN */
1093 GPIO_CFG(14, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* VSYNC_IN */
1094 GPIO_CFG(15, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_16MA), /* MCLK */
1095 };
1096
1097static void config_gpio_table(uint32_t *table, int len)
1098{
1099 int n, rc;
1100 for (n = 0; n < len; n++) {
1101 rc = gpio_tlmm_config(table[n], GPIO_CFG_ENABLE);
1102 if (rc) {
1103 printk(KERN_ERR "%s: gpio_tlmm_config(%#x)=%d\n",
1104 __func__, table[n], rc);
1105 break;
1106 }
1107 }
1108}
1109
1110static struct vreg *vreg_gp2;
1111static struct vreg *vreg_gp3;
1112
1113static void msm_camera_vreg_config(int vreg_en)
1114{
1115 int rc;
1116
1117 if (vreg_gp2 == NULL) {
1118 vreg_gp2 = vreg_get(NULL, "gp2");
1119 if (IS_ERR(vreg_gp2)) {
1120 printk(KERN_ERR "%s: vreg_get(%s) failed (%ld)\n",
1121 __func__, "gp2", PTR_ERR(vreg_gp2));
1122 return;
1123 }
1124
1125 rc = vreg_set_level(vreg_gp2, 1800);
1126 if (rc) {
1127 printk(KERN_ERR "%s: GP2 set_level failed (%d)\n",
1128 __func__, rc);
1129 }
1130 }
1131
1132 if (vreg_gp3 == NULL) {
1133 vreg_gp3 = vreg_get(NULL, "gp3");
1134 if (IS_ERR(vreg_gp3)) {
1135 printk(KERN_ERR "%s: vreg_get(%s) failed (%ld)\n",
1136 __func__, "gp3", PTR_ERR(vreg_gp3));
1137 return;
1138 }
1139
1140 rc = vreg_set_level(vreg_gp3, 2850);
1141 if (rc) {
1142 printk(KERN_ERR "%s: GP3 set level failed (%d)\n",
1143 __func__, rc);
1144 }
1145 }
1146
1147 if (vreg_en) {
1148 rc = vreg_enable(vreg_gp2);
1149 if (rc) {
1150 printk(KERN_ERR "%s: GP2 enable failed (%d)\n",
1151 __func__, rc);
1152 }
1153
1154 rc = vreg_enable(vreg_gp3);
1155 if (rc) {
1156 printk(KERN_ERR "%s: GP3 enable failed (%d)\n",
1157 __func__, rc);
1158 }
1159 } else {
1160 rc = vreg_disable(vreg_gp2);
1161 if (rc) {
1162 printk(KERN_ERR "%s: GP2 disable failed (%d)\n",
1163 __func__, rc);
1164 }
1165
1166 rc = vreg_disable(vreg_gp3);
1167 if (rc) {
1168 printk(KERN_ERR "%s: GP3 disable failed (%d)\n",
1169 __func__, rc);
1170 }
1171 }
1172}
1173
1174static int config_camera_on_gpios(void)
1175{
1176 int vreg_en = 1;
1177
1178 if (machine_is_msm7x25_ffa() ||
1179 machine_is_msm7x27_ffa())
1180 msm_camera_vreg_config(vreg_en);
1181
1182 config_gpio_table(camera_on_gpio_table,
1183 ARRAY_SIZE(camera_on_gpio_table));
1184 return 0;
1185}
1186
1187static void config_camera_off_gpios(void)
1188{
1189 int vreg_en = 0;
1190
1191 if (machine_is_msm7x25_ffa() ||
1192 machine_is_msm7x27_ffa())
1193 msm_camera_vreg_config(vreg_en);
1194
1195 config_gpio_table(camera_off_gpio_table,
1196 ARRAY_SIZE(camera_off_gpio_table));
1197}
1198
1199static struct msm_camera_device_platform_data msm_camera_device_data = {
1200 .camera_gpio_on = config_camera_on_gpios,
1201 .camera_gpio_off = config_camera_off_gpios,
1202 .ioext.mdcphy = MSM_MDC_PHYS,
1203 .ioext.mdcsz = MSM_MDC_SIZE,
1204 .ioext.appphy = MSM_CLK_CTL_PHYS,
1205 .ioext.appsz = MSM_CLK_CTL_SIZE,
1206};
1207
1208int pmic_set_flash_led_current(enum pmic8058_leds id, unsigned mA)
1209{
1210 int rc;
1211 rc = pmic_flash_led_set_current(mA);
1212 return rc;
1213}
1214
1215static struct msm_camera_sensor_flash_src msm_flash_src = {
1216 .flash_sr_type = MSM_CAMERA_FLASH_SRC_PMIC,
1217 ._fsrc.pmic_src.num_of_src = 1,
1218 ._fsrc.pmic_src.low_current = 30,
1219 ._fsrc.pmic_src.high_current = 100,
1220 ._fsrc.pmic_src.led_src_1 = 0,
1221 ._fsrc.pmic_src.led_src_2 = 0,
1222 ._fsrc.pmic_src.pmic_set_current = pmic_set_flash_led_current,
1223};
1224
1225#ifdef CONFIG_MT9D112
1226static struct msm_camera_sensor_flash_data flash_mt9d112 = {
1227 .flash_type = MSM_CAMERA_FLASH_LED,
1228 .flash_src = &msm_flash_src
1229};
1230
1231static struct msm_camera_sensor_info msm_camera_sensor_mt9d112_data = {
1232 .sensor_name = "mt9d112",
1233 .sensor_reset = 89,
1234 .sensor_pwd = 85,
1235 .vcm_pwd = 0,
1236 .vcm_enable = 0,
1237 .pdata = &msm_camera_device_data,
1238 .flash_data = &flash_mt9d112
1239};
1240
1241static struct platform_device msm_camera_sensor_mt9d112 = {
1242 .name = "msm_camera_mt9d112",
1243 .dev = {
1244 .platform_data = &msm_camera_sensor_mt9d112_data,
1245 },
1246};
1247#endif
1248
1249#ifdef CONFIG_S5K3E2FX
1250static struct msm_camera_sensor_flash_data flash_s5k3e2fx = {
1251 .flash_type = MSM_CAMERA_FLASH_LED,
1252 .flash_src = &msm_flash_src
1253};
1254
1255static struct msm_camera_sensor_info msm_camera_sensor_s5k3e2fx_data = {
1256 .sensor_name = "s5k3e2fx",
1257 .sensor_reset = 89,
1258 .sensor_pwd = 85,
1259 .vcm_pwd = 0,
1260 .vcm_enable = 0,
1261 .pdata = &msm_camera_device_data,
1262 .flash_data = &flash_s5k3e2fx
1263};
1264
1265static struct platform_device msm_camera_sensor_s5k3e2fx = {
1266 .name = "msm_camera_s5k3e2fx",
1267 .dev = {
1268 .platform_data = &msm_camera_sensor_s5k3e2fx_data,
1269 },
1270};
1271#endif
1272
1273#ifdef CONFIG_MT9P012
1274static struct msm_camera_sensor_flash_data flash_mt9p012 = {
1275 .flash_type = MSM_CAMERA_FLASH_LED,
1276 .flash_src = &msm_flash_src
1277};
1278
1279static struct msm_camera_sensor_info msm_camera_sensor_mt9p012_data = {
1280 .sensor_name = "mt9p012",
1281 .sensor_reset = 89,
1282 .sensor_pwd = 85,
1283 .vcm_pwd = 88,
1284 .vcm_enable = 0,
1285 .pdata = &msm_camera_device_data,
1286 .flash_data = &flash_mt9p012
1287};
1288
1289static struct platform_device msm_camera_sensor_mt9p012 = {
1290 .name = "msm_camera_mt9p012",
1291 .dev = {
1292 .platform_data = &msm_camera_sensor_mt9p012_data,
1293 },
1294};
1295#endif
1296
1297#ifdef CONFIG_MT9P012_KM
1298static struct msm_camera_sensor_flash_data flash_mt9p012_km = {
1299 .flash_type = MSM_CAMERA_FLASH_LED,
1300 .flash_src = &msm_flash_src
1301};
1302
1303static struct msm_camera_sensor_info msm_camera_sensor_mt9p012_km_data = {
1304 .sensor_name = "mt9p012_km",
1305 .sensor_reset = 89,
1306 .sensor_pwd = 85,
1307 .vcm_pwd = 88,
1308 .vcm_enable = 0,
1309 .pdata = &msm_camera_device_data,
1310 .flash_data = &flash_mt9p012_km
1311};
1312
1313static struct platform_device msm_camera_sensor_mt9p012_km = {
1314 .name = "msm_camera_mt9p012_km",
1315 .dev = {
1316 .platform_data = &msm_camera_sensor_mt9p012_km_data,
1317 },
1318};
1319#endif
1320
1321#ifdef CONFIG_MT9T013
1322static struct msm_camera_sensor_flash_data flash_mt9t013 = {
1323 .flash_type = MSM_CAMERA_FLASH_LED,
1324 .flash_src = &msm_flash_src
1325};
1326
1327static struct msm_camera_sensor_info msm_camera_sensor_mt9t013_data = {
1328 .sensor_name = "mt9t013",
1329 .sensor_reset = 89,
1330 .sensor_pwd = 85,
1331 .vcm_pwd = 0,
1332 .vcm_enable = 0,
1333 .pdata = &msm_camera_device_data,
1334 .flash_data = &flash_mt9t013
1335};
1336
1337static struct platform_device msm_camera_sensor_mt9t013 = {
1338 .name = "msm_camera_mt9t013",
1339 .dev = {
1340 .platform_data = &msm_camera_sensor_mt9t013_data,
1341 },
1342};
1343#endif
1344
1345#ifdef CONFIG_VB6801
1346static struct msm_camera_sensor_flash_data flash_vb6801 = {
1347 .flash_type = MSM_CAMERA_FLASH_LED,
1348 .flash_src = &msm_flash_src
1349};
1350
1351static struct msm_camera_sensor_info msm_camera_sensor_vb6801_data = {
1352 .sensor_name = "vb6801",
1353 .sensor_reset = 89,
1354 .sensor_pwd = 88,
1355 .vcm_pwd = 0,
1356 .vcm_enable = 0,
1357 .pdata = &msm_camera_device_data,
1358 .flash_data = &flash_vb6801
1359};
1360
1361static struct platform_device msm_camera_sensor_vb6801 = {
1362 .name = "msm_camera_vb6801",
1363 .dev = {
1364 .platform_data = &msm_camera_sensor_vb6801_data,
1365 },
1366};
1367#endif
1368#endif
1369
1370static u32 msm_calculate_batt_capacity(u32 current_voltage);
1371
1372static struct msm_psy_batt_pdata msm_psy_batt_data = {
1373 .voltage_min_design = 2800,
1374 .voltage_max_design = 4300,
1375 .avail_chg_sources = AC_CHG | USB_CHG ,
1376 .batt_technology = POWER_SUPPLY_TECHNOLOGY_LION,
1377 .calculate_capacity = &msm_calculate_batt_capacity,
1378};
1379
1380static u32 msm_calculate_batt_capacity(u32 current_voltage)
1381{
1382 u32 low_voltage = msm_psy_batt_data.voltage_min_design;
1383 u32 high_voltage = msm_psy_batt_data.voltage_max_design;
1384
1385 return (current_voltage - low_voltage) * 100
1386 / (high_voltage - low_voltage);
1387}
1388
1389static struct platform_device msm_batt_device = {
1390 .name = "msm-battery",
1391 .id = -1,
1392 .dev.platform_data = &msm_psy_batt_data,
1393};
1394
1395
Daniel Walker2682fd32010-02-24 15:47:58 -08001396static struct platform_device *devices[] __initdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001397 &asoc_msm_pcm,
1398 &asoc_msm_dai0,
1399 &asoc_msm_dai1,
1400
Daniel Walker2682fd32010-02-24 15:47:58 -08001401 &msm_device_smd,
1402 &msm_device_dmov,
1403 &msm_device_nand,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001404
1405#ifdef CONFIG_USB_MSM_OTG_72K
1406 &msm_device_otg,
1407#ifdef CONFIG_USB_GADGET
1408 &msm_device_gadget_peripheral,
1409#endif
1410#endif
1411
1412#ifdef CONFIG_USB_FUNCTION
1413 &msm_device_hsusb_peripheral,
1414 &mass_storage_device,
1415#endif
1416
1417#ifdef CONFIG_USB_ANDROID
1418 &usb_mass_storage_device,
1419 &rndis_device,
1420#ifdef CONFIG_USB_ANDROID_DIAG
1421 &usb_diag_device,
1422#endif
1423#ifdef CONFIG_USB_F_SERIAL
1424 &usb_gadget_fserial_device,
1425#endif
1426 &android_usb_device,
1427#endif
1428 &msm_device_i2c,
Daniel Walker2682fd32010-02-24 15:47:58 -08001429 &smc91x_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001430 &msm_device_tssc,
1431 &android_pmem_device,
1432 &android_pmem_adsp_device,
1433 &android_pmem_audio_device,
1434 &msm_fb_device,
1435 &lcdc_gordon_panel_device,
1436 &msm_device_uart_dm1,
1437#ifdef CONFIG_BT
1438 &msm_bt_power_device,
1439#endif
1440 &msm_device_pmic_leds,
1441 &msm_device_snd,
1442 &msm_device_adspdec,
1443#ifdef CONFIG_MT9T013
1444 &msm_camera_sensor_mt9t013,
1445#endif
1446#ifdef CONFIG_MT9D112
1447 &msm_camera_sensor_mt9d112,
1448#endif
1449#ifdef CONFIG_S5K3E2FX
1450 &msm_camera_sensor_s5k3e2fx,
1451#endif
1452#ifdef CONFIG_MT9P012
1453 &msm_camera_sensor_mt9p012,
1454#endif
1455#ifdef CONFIG_MT9P012_KM
1456 &msm_camera_sensor_mt9p012_km,
1457#endif
1458#ifdef CONFIG_VB6801
1459 &msm_camera_sensor_vb6801,
1460#endif
1461 &msm_bluesleep_device,
1462#ifdef CONFIG_ARCH_MSM7X27
1463 &msm_kgsl_3d0,
1464#endif
1465#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
1466 &msm_device_tsif,
1467#endif
1468 &hs_device,
1469 &msm_batt_device,
Daniel Walker2682fd32010-02-24 15:47:58 -08001470};
1471
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001472static struct msm_panel_common_pdata mdp_pdata = {
1473 .gpio = 97,
1474};
1475
1476static void __init msm_fb_add_devices(void)
1477{
1478 msm_fb_register_device("mdp", &mdp_pdata);
1479 msm_fb_register_device("pmdh", 0);
1480 msm_fb_register_device("lcdc", &lcdc_pdata);
1481}
1482
Daniel Walker2682fd32010-02-24 15:47:58 -08001483extern struct sys_timer msm_timer;
1484
1485static void __init msm7x2x_init_irq(void)
1486{
1487 msm_init_irq();
1488}
1489
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001490static struct msm_acpu_clock_platform_data msm7x2x_clock_data = {
1491 .acpu_switch_time_us = 50,
1492 .max_speed_delta_khz = 400000,
1493 .vdd_switch_time_us = 62,
1494 .max_axi_khz = 160000,
1495};
1496
1497void msm_serial_debug_init(unsigned int base, int irq,
1498 struct device *clk_device, int signal_irq);
1499
1500#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
1501 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
1502 || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
1503 || defined(CONFIG_MMC_MSM_SDC4_SUPPORT))
1504
1505static unsigned long vreg_sts, gpio_sts;
1506static struct vreg *vreg_mmc;
1507static unsigned mpp_mmc = 2;
1508
1509struct sdcc_gpio {
1510 struct msm_gpio *cfg_data;
1511 uint32_t size;
1512 struct msm_gpio *sleep_cfg_data;
1513};
1514
1515static struct msm_gpio sdc1_cfg_data[] = {
1516 {GPIO_CFG(51, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc1_dat_3"},
1517 {GPIO_CFG(52, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc1_dat_2"},
1518 {GPIO_CFG(53, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc1_dat_1"},
1519 {GPIO_CFG(54, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc1_dat_0"},
1520 {GPIO_CFG(55, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc1_cmd"},
1521 {GPIO_CFG(56, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), "sdc1_clk"},
1522};
1523
1524static struct msm_gpio sdc2_cfg_data[] = {
1525 {GPIO_CFG(62, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), "sdc2_clk"},
1526 {GPIO_CFG(63, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc2_cmd"},
1527 {GPIO_CFG(64, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc2_dat_3"},
1528 {GPIO_CFG(65, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc2_dat_2"},
1529 {GPIO_CFG(66, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc2_dat_1"},
1530 {GPIO_CFG(67, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc2_dat_0"},
1531};
1532
1533static struct msm_gpio sdc2_sleep_cfg_data[] = {
1534 {GPIO_CFG(62, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), "sdc2_clk"},
1535 {GPIO_CFG(63, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), "sdc2_cmd"},
1536 {GPIO_CFG(64, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), "sdc2_dat_3"},
1537 {GPIO_CFG(65, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), "sdc2_dat_2"},
1538 {GPIO_CFG(66, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), "sdc2_dat_1"},
1539 {GPIO_CFG(67, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), "sdc2_dat_0"},
1540};
1541static struct msm_gpio sdc3_cfg_data[] = {
1542 {GPIO_CFG(88, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), "sdc3_clk"},
1543 {GPIO_CFG(89, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc3_cmd"},
1544 {GPIO_CFG(90, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc3_dat_3"},
1545 {GPIO_CFG(91, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc3_dat_2"},
1546 {GPIO_CFG(92, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc3_dat_1"},
1547 {GPIO_CFG(93, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc3_dat_0"},
1548};
1549
1550static struct msm_gpio sdc4_cfg_data[] = {
1551 {GPIO_CFG(19, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc4_dat_3"},
1552 {GPIO_CFG(20, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc4_dat_2"},
1553 {GPIO_CFG(21, 4, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc4_dat_1"},
1554 {GPIO_CFG(107, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc4_cmd"},
1555 {GPIO_CFG(108, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc4_dat_0"},
1556 {GPIO_CFG(109, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), "sdc4_clk"},
1557};
1558
1559static struct sdcc_gpio sdcc_cfg_data[] = {
1560 {
1561 .cfg_data = sdc1_cfg_data,
1562 .size = ARRAY_SIZE(sdc1_cfg_data),
1563 .sleep_cfg_data = NULL,
1564 },
1565 {
1566 .cfg_data = sdc2_cfg_data,
1567 .size = ARRAY_SIZE(sdc2_cfg_data),
1568 .sleep_cfg_data = sdc2_sleep_cfg_data,
1569 },
1570 {
1571 .cfg_data = sdc3_cfg_data,
1572 .size = ARRAY_SIZE(sdc3_cfg_data),
1573 .sleep_cfg_data = NULL,
1574 },
1575 {
1576 .cfg_data = sdc4_cfg_data,
1577 .size = ARRAY_SIZE(sdc4_cfg_data),
1578 .sleep_cfg_data = NULL,
1579 },
1580};
1581
1582static void msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
1583{
1584 int rc = 0;
1585 struct sdcc_gpio *curr;
1586
1587 curr = &sdcc_cfg_data[dev_id - 1];
1588 if (!(test_bit(dev_id, &gpio_sts)^enable))
1589 return;
1590
1591 if (enable) {
1592 set_bit(dev_id, &gpio_sts);
1593 rc = msm_gpios_request_enable(curr->cfg_data, curr->size);
1594 if (rc)
1595 printk(KERN_ERR "%s: Failed to turn on GPIOs for slot %d\n",
1596 __func__, dev_id);
1597 } else {
1598 clear_bit(dev_id, &gpio_sts);
1599 if (curr->sleep_cfg_data) {
1600 msm_gpios_enable(curr->sleep_cfg_data, curr->size);
1601 msm_gpios_free(curr->sleep_cfg_data, curr->size);
1602 return;
1603 }
1604 msm_gpios_disable_free(curr->cfg_data, curr->size);
1605 }
1606}
1607
1608static uint32_t msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
1609{
1610 int rc = 0;
1611 struct platform_device *pdev;
1612
1613 pdev = container_of(dv, struct platform_device, dev);
1614 msm_sdcc_setup_gpio(pdev->id, !!vdd);
1615
1616 if (vdd == 0) {
1617 if (!vreg_sts)
1618 return 0;
1619
1620 clear_bit(pdev->id, &vreg_sts);
1621
1622 if (!vreg_sts) {
1623 if (machine_is_msm7x25_ffa() ||
1624 machine_is_msm7x27_ffa()) {
1625 rc = mpp_config_digital_out(mpp_mmc,
1626 MPP_CFG(MPP_DLOGIC_LVL_MSMP,
1627 MPP_DLOGIC_OUT_CTRL_LOW));
1628 } else
1629 rc = vreg_disable(vreg_mmc);
1630 if (rc)
1631 printk(KERN_ERR "%s: return val: %d \n",
1632 __func__, rc);
1633 }
1634 return 0;
1635 }
1636
1637 if (!vreg_sts) {
1638 if (machine_is_msm7x25_ffa() || machine_is_msm7x27_ffa()) {
1639 rc = mpp_config_digital_out(mpp_mmc,
1640 MPP_CFG(MPP_DLOGIC_LVL_MSMP,
1641 MPP_DLOGIC_OUT_CTRL_HIGH));
1642 } else {
1643 rc = vreg_set_level(vreg_mmc, 2850);
1644 if (!rc)
1645 rc = vreg_enable(vreg_mmc);
1646 }
1647 if (rc)
1648 printk(KERN_ERR "%s: return val: %d \n",
1649 __func__, rc);
1650 }
1651 set_bit(pdev->id, &vreg_sts);
1652 return 0;
1653}
1654
1655#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
1656static struct mmc_platform_data msm7x2x_sdc1_data = {
1657 .ocr_mask = MMC_VDD_28_29,
1658 .translate_vdd = msm_sdcc_setup_power,
1659 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1660 .msmsdcc_fmin = 144000,
1661 .msmsdcc_fmid = 24576000,
1662 .msmsdcc_fmax = 49152000,
1663 .nonremovable = 0,
1664#ifdef CONFIG_MMC_MSM_SDC1_DUMMY52_REQUIRED
1665 .dummy52_required = 1,
1666#endif
1667};
1668#endif
1669
1670#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
1671static struct mmc_platform_data msm7x2x_sdc2_data = {
1672 .ocr_mask = MMC_VDD_28_29,
1673 .translate_vdd = msm_sdcc_setup_power,
1674 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1675#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
1676 .sdiowakeup_irq = MSM_GPIO_TO_INT(66),
1677#endif
1678 .msmsdcc_fmin = 144000,
1679 .msmsdcc_fmid = 24576000,
1680 .msmsdcc_fmax = 49152000,
1681 .nonremovable = 0,
1682#ifdef CONFIG_MMC_MSM_SDC2_DUMMY52_REQUIRED
1683 .dummy52_required = 1,
1684#endif
1685};
1686#endif
1687
1688#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
1689static struct mmc_platform_data msm7x2x_sdc3_data = {
1690 .ocr_mask = MMC_VDD_28_29,
1691 .translate_vdd = msm_sdcc_setup_power,
1692 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1693 .msmsdcc_fmin = 144000,
1694 .msmsdcc_fmid = 24576000,
1695 .msmsdcc_fmax = 49152000,
1696 .nonremovable = 0,
1697#ifdef CONFIG_MMC_MSM_SDC3_DUMMY52_REQUIRED
1698 .dummy52_required = 1,
1699#endif
1700};
1701#endif
1702
1703#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
1704static struct mmc_platform_data msm7x2x_sdc4_data = {
1705 .ocr_mask = MMC_VDD_28_29,
1706 .translate_vdd = msm_sdcc_setup_power,
1707 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1708 .msmsdcc_fmin = 144000,
1709 .msmsdcc_fmid = 24576000,
1710 .msmsdcc_fmax = 49152000,
1711 .nonremovable = 0,
1712#ifdef CONFIG_MMC_MSM_SDC4_DUMMY52_REQUIRED
1713 .dummy52_required = 1,
1714#endif
1715};
1716#endif
1717
1718static void __init msm7x2x_init_mmc(void)
1719{
1720 if (!machine_is_msm7x25_ffa() && !machine_is_msm7x27_ffa()) {
1721 vreg_mmc = vreg_get(NULL, "mmc");
1722 if (IS_ERR(vreg_mmc)) {
1723 printk(KERN_ERR "%s: vreg get failed (%ld)\n",
1724 __func__, PTR_ERR(vreg_mmc));
1725 return;
1726 }
1727 }
1728
1729#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
1730 msm_add_sdcc(1, &msm7x2x_sdc1_data);
1731#endif
1732
1733 if (machine_is_msm7x25_surf() || machine_is_msm7x27_surf() ||
1734 machine_is_msm7x27_ffa()) {
1735#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
1736 msm_sdcc_setup_gpio(2, 1);
1737 msm_add_sdcc(2, &msm7x2x_sdc2_data);
1738#endif
1739 }
1740
1741 if (machine_is_msm7x25_surf() || machine_is_msm7x27_surf()) {
1742#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
1743 msm_add_sdcc(3, &msm7x2x_sdc3_data);
1744#endif
1745#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
1746 msm_add_sdcc(4, &msm7x2x_sdc4_data);
1747#endif
1748 }
1749}
1750#else
1751#define msm7x2x_init_mmc() do {} while (0)
1752#endif
1753
1754
1755static struct msm_pm_platform_data msm7x25_pm_data[MSM_PM_SLEEP_MODE_NR] = {
1756 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE].latency = 16000,
1757
1758 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN].latency = 12000,
1759
1760 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency = 2000,
1761};
1762
1763static struct msm_pm_platform_data msm7x27_pm_data[MSM_PM_SLEEP_MODE_NR] = {
1764 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE] = {
1765 .idle_supported = 1,
1766 .suspend_supported = 1,
1767 .idle_enabled = 1,
1768 .suspend_enabled = 1,
1769 .latency = 16000,
1770 .residency = 20000,
1771 },
1772
1773 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN] = {
1774 .idle_supported = 1,
1775 .suspend_supported = 1,
1776 .idle_enabled = 1,
1777 .suspend_enabled = 1,
1778 .latency = 12000,
1779 .residency = 20000,
1780 },
1781
1782 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT] = {
1783 .idle_supported = 1,
1784 .suspend_supported = 1,
1785 .idle_enabled = 1,
1786 .suspend_enabled = 1,
1787 .latency = 2000,
1788 .residency = 0,
1789 },
1790};
1791
1792static void
1793msm_i2c_gpio_config(int iface, int config_type)
1794{
1795 int gpio_scl;
1796 int gpio_sda;
1797 if (iface) {
1798 gpio_scl = 95;
1799 gpio_sda = 96;
1800 } else {
1801 gpio_scl = 60;
1802 gpio_sda = 61;
1803 }
1804 if (config_type) {
1805 gpio_tlmm_config(GPIO_CFG(gpio_scl, 1, GPIO_CFG_INPUT,
1806 GPIO_CFG_NO_PULL, GPIO_CFG_16MA), GPIO_CFG_ENABLE);
1807 gpio_tlmm_config(GPIO_CFG(gpio_sda, 1, GPIO_CFG_INPUT,
1808 GPIO_CFG_NO_PULL, GPIO_CFG_16MA), GPIO_CFG_ENABLE);
1809 } else {
1810 gpio_tlmm_config(GPIO_CFG(gpio_scl, 0, GPIO_CFG_OUTPUT,
1811 GPIO_CFG_NO_PULL, GPIO_CFG_16MA), GPIO_CFG_ENABLE);
1812 gpio_tlmm_config(GPIO_CFG(gpio_sda, 0, GPIO_CFG_OUTPUT,
1813 GPIO_CFG_NO_PULL, GPIO_CFG_16MA), GPIO_CFG_ENABLE);
1814 }
1815}
1816
1817static struct msm_i2c_platform_data msm_i2c_pdata = {
1818 .clk_freq = 100000,
1819 .rmutex = 0,
1820 .pri_clk = 60,
1821 .pri_dat = 61,
1822 .aux_clk = 95,
1823 .aux_dat = 96,
1824 .msm_i2c_config_gpio = msm_i2c_gpio_config,
1825};
1826
1827static void __init msm_device_i2c_init(void)
1828{
1829 if (gpio_request(60, "i2c_pri_clk"))
1830 pr_err("failed to request gpio i2c_pri_clk\n");
1831 if (gpio_request(61, "i2c_pri_dat"))
1832 pr_err("failed to request gpio i2c_pri_dat\n");
1833 if (gpio_request(95, "i2c_sec_clk"))
1834 pr_err("failed to request gpio i2c_sec_clk\n");
1835 if (gpio_request(96, "i2c_sec_dat"))
1836 pr_err("failed to request gpio i2c_sec_dat\n");
1837
1838 if (cpu_is_msm7x27())
1839 msm_i2c_pdata.pm_lat =
1840 msm7x27_pm_data[MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN]
1841 .latency;
1842 else
1843 msm_i2c_pdata.pm_lat =
1844 msm7x25_pm_data[MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN]
1845 .latency;
1846
1847 msm_device_i2c.dev.platform_data = &msm_i2c_pdata;
1848}
1849
1850static void usb_mpp_init(void)
1851{
1852 unsigned rc;
1853 unsigned mpp_usb = 7;
1854
1855 if (machine_is_msm7x25_ffa() || machine_is_msm7x27_ffa()) {
1856 rc = mpp_config_digital_out(mpp_usb,
1857 MPP_CFG(MPP_DLOGIC_LVL_VDD,
1858 MPP_DLOGIC_OUT_CTRL_HIGH));
1859 if (rc)
1860 pr_err("%s: configuring mpp pin"
1861 "to enable 3.3V LDO failed\n", __func__);
1862 }
1863}
1864
1865static void msm7x27_wlan_init(void)
1866{
1867 int rc = 0;
1868 /* TBD: if (machine_is_msm7x27_ffa_with_wcn1312()) */
1869 if (machine_is_msm7x27_ffa()) {
1870 rc = mpp_config_digital_out(3, MPP_CFG(MPP_DLOGIC_LVL_MSMP,
1871 MPP_DLOGIC_OUT_CTRL_LOW));
1872 if (rc)
1873 printk(KERN_ERR "%s: return val: %d \n",
1874 __func__, rc);
1875 }
1876}
1877
Daniel Walker2682fd32010-02-24 15:47:58 -08001878static void __init msm7x2x_init(void)
1879{
Daniel Walker2682fd32010-02-24 15:47:58 -08001880
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001881#ifdef CONFIG_ARCH_MSM7X25
1882 msm_clock_init(msm_clocks_7x25, msm_num_clocks_7x25);
1883#elif defined(CONFIG_ARCH_MSM7X27)
1884 msm_clock_init(msm_clocks_7x27, msm_num_clocks_7x27);
1885#endif
1886
1887#if defined(CONFIG_SMC91X)
Daniel Walker2682fd32010-02-24 15:47:58 -08001888 if (machine_is_msm7x25_ffa() || machine_is_msm7x27_ffa()) {
1889 smc91x_resources[0].start = 0x98000300;
1890 smc91x_resources[0].end = 0x980003ff;
1891 smc91x_resources[1].start = MSM_GPIO_TO_INT(85);
1892 smc91x_resources[1].end = MSM_GPIO_TO_INT(85);
1893 if (gpio_tlmm_config(GPIO_CFG(85, 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001894 GPIO_CFG_INPUT,
1895 GPIO_CFG_PULL_DOWN,
1896 GPIO_CFG_2MA),
1897 GPIO_CFG_ENABLE)) {
Daniel Walker2682fd32010-02-24 15:47:58 -08001898 printk(KERN_ERR
1899 "%s: Err: Config GPIO-85 INT\n",
1900 __func__);
1901 }
1902 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001903#endif
Daniel Walker2682fd32010-02-24 15:47:58 -08001904
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001905 if (cpu_is_msm7x27())
1906 msm7x2x_clock_data.max_axi_khz = 200000;
1907
1908 msm_acpu_clock_init(&msm7x2x_clock_data);
1909
1910 usb_mpp_init();
1911
1912#ifdef CONFIG_USB_FUNCTION
1913 msm_hsusb_pdata.swfi_latency =
1914 msm7x27_pm_data
1915 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency;
1916
1917 msm_device_hsusb_peripheral.dev.platform_data = &msm_hsusb_pdata;
1918#endif
1919
1920#ifdef CONFIG_USB_MSM_OTG_72K
1921 msm_device_otg.dev.platform_data = &msm_otg_pdata;
1922 if (machine_is_msm7x25_surf() || machine_is_msm7x25_ffa()) {
1923 msm_otg_pdata.pemp_level =
1924 PRE_EMPHASIS_WITH_20_PERCENT;
1925 msm_otg_pdata.drv_ampl = HS_DRV_AMPLITUDE_5_PERCENT;
1926 msm_otg_pdata.cdr_autoreset = CDR_AUTO_RESET_ENABLE;
1927 msm_otg_pdata.phy_reset = msm_otg_rpc_phy_reset;
1928 }
1929 if (machine_is_msm7x27_surf() || machine_is_msm7x27_ffa()) {
1930 msm_otg_pdata.pemp_level =
1931 PRE_EMPHASIS_WITH_10_PERCENT;
1932 msm_otg_pdata.drv_ampl = HS_DRV_AMPLITUDE_5_PERCENT;
1933 msm_otg_pdata.cdr_autoreset = CDR_AUTO_RESET_DISABLE;
1934 msm_otg_pdata.phy_reset_sig_inverted = 1;
1935 }
1936
1937#ifdef CONFIG_USB_GADGET
1938 msm_otg_pdata.swfi_latency =
1939 msm7x27_pm_data
1940 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency;
1941 msm_device_gadget_peripheral.dev.platform_data = &msm_gadget_pdata;
1942 msm_gadget_pdata.is_phy_status_timer_on = 1;
1943#endif
1944#endif
1945#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
1946 msm_device_tsif.dev.platform_data = &tsif_platform_data;
1947#endif
1948 platform_add_devices(msm_footswitch_devices,
1949 msm_num_footswitch_devices);
Daniel Walker2682fd32010-02-24 15:47:58 -08001950 platform_add_devices(devices, ARRAY_SIZE(devices));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001951#ifdef CONFIG_MSM_CAMERA
1952 config_camera_off_gpios(); /* might not be necessary */
1953#endif
1954 msm_device_i2c_init();
1955 i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices));
1956
1957#ifdef CONFIG_SURF_FFA_GPIO_KEYPAD
1958 if (machine_is_msm7x25_ffa() || machine_is_msm7x27_ffa())
1959 platform_device_register(&keypad_device_7k_ffa);
1960 else
1961 platform_device_register(&keypad_device_surf);
1962#endif
1963 lcdc_gordon_gpio_init();
1964 msm_fb_add_devices();
1965#ifdef CONFIG_USB_EHCI_MSM_72K
1966 msm7x2x_init_host();
1967#endif
1968 msm7x2x_init_mmc();
1969 bt_power_init();
1970
1971 if (cpu_is_msm7x27())
1972 msm_pm_set_platform_data(msm7x27_pm_data,
1973 ARRAY_SIZE(msm7x27_pm_data));
1974 else
1975 msm_pm_set_platform_data(msm7x25_pm_data,
1976 ARRAY_SIZE(msm7x25_pm_data));
1977 msm7x27_wlan_init();
1978}
1979
1980static unsigned pmem_kernel_ebi1_size = PMEM_KERNEL_EBI1_SIZE;
1981static int __init pmem_kernel_ebi1_size_setup(char *p)
1982{
1983 pmem_kernel_ebi1_size = memparse(p, NULL);
1984 return 0;
1985}
1986early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
1987
1988static unsigned pmem_mdp_size = MSM_PMEM_MDP_SIZE;
1989static int __init pmem_mdp_size_setup(char *p)
1990{
1991 pmem_mdp_size = memparse(p, NULL);
1992 return 0;
1993}
1994early_param("pmem_mdp_size", pmem_mdp_size_setup);
1995
1996static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
1997static int __init pmem_adsp_size_setup(char *p)
1998{
1999 pmem_adsp_size = memparse(p, NULL);
2000 return 0;
2001}
2002early_param("pmem_adsp_size", pmem_adsp_size_setup);
2003
2004static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
2005static int __init pmem_audio_size_setup(char *p)
2006{
2007 pmem_audio_size = memparse(p, NULL);
2008 return 0;
2009}
2010early_param("pmem_audio_size", pmem_audio_size_setup);
2011
2012static unsigned fb_size = MSM_FB_SIZE;
2013static int __init fb_size_setup(char *p)
2014{
2015 fb_size = memparse(p, NULL);
2016 return 0;
2017}
2018early_param("fb_size", fb_size_setup);
2019
2020static void __init msm_msm7x2x_allocate_memory_regions(void)
2021{
2022 void *addr;
2023 unsigned long size;
2024
2025 size = fb_size ? : MSM_FB_SIZE;
2026 addr = alloc_bootmem_align(size, 0x1000);
2027 msm_fb_resources[0].start = __pa(addr);
2028 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
2029 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
2030 size, addr, __pa(addr));
2031}
2032
2033static struct memtype_reserve msm7x27_reserve_table[] __initdata = {
2034 [MEMTYPE_SMI] = {
2035 },
2036 [MEMTYPE_EBI0] = {
2037 .flags = MEMTYPE_FLAGS_1M_ALIGN,
2038 },
2039 [MEMTYPE_EBI1] = {
2040 .flags = MEMTYPE_FLAGS_1M_ALIGN,
2041 },
2042};
2043
2044static void __init size_pmem_devices(void)
2045{
2046#ifdef CONFIG_ANDROID_PMEM
2047 android_pmem_adsp_pdata.size = pmem_adsp_size;
2048 android_pmem_pdata.size = pmem_mdp_size;
2049 android_pmem_audio_pdata.size = pmem_audio_size;
2050#endif
2051}
2052
2053static void __init reserve_memory_for(struct android_pmem_platform_data *p)
2054{
2055 msm7x27_reserve_table[p->memory_type].size += p->size;
2056}
2057
2058static void __init reserve_pmem_memory(void)
2059{
2060#ifdef CONFIG_ANDROID_PMEM
2061 reserve_memory_for(&android_pmem_adsp_pdata);
2062 reserve_memory_for(&android_pmem_pdata);
2063 reserve_memory_for(&android_pmem_audio_pdata);
2064 msm7x27_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
2065#endif
2066}
2067
2068static void __init msm7x27_calculate_reserve_sizes(void)
2069{
2070 size_pmem_devices();
2071 reserve_pmem_memory();
2072}
2073
2074static int msm7x27_paddr_to_memtype(unsigned int paddr)
2075{
2076 return MEMTYPE_EBI1;
2077}
2078
2079static struct reserve_info msm7x27_reserve_info __initdata = {
2080 .memtype_reserve_table = msm7x27_reserve_table,
2081 .calculate_reserve_sizes = msm7x27_calculate_reserve_sizes,
2082 .paddr_to_memtype = msm7x27_paddr_to_memtype,
2083};
2084
2085static void __init msm7x27_reserve(void)
2086{
2087 reserve_info = &msm7x27_reserve_info;
2088 msm_reserve();
2089}
2090
2091static void __init msm7x27_init_early(void)
2092{
2093 msm_msm7x2x_allocate_memory_regions();
Daniel Walker2682fd32010-02-24 15:47:58 -08002094}
2095
2096static void __init msm7x2x_map_io(void)
2097{
2098 msm_map_common_io();
Daniel Walker2682fd32010-02-24 15:47:58 -08002099
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002100 if (socinfo_init() < 0)
2101 BUG();
Daniel Walker2682fd32010-02-24 15:47:58 -08002102
2103#ifdef CONFIG_CACHE_L2X0
2104 if (machine_is_msm7x27_surf() || machine_is_msm7x27_ffa()) {
2105 /* 7x27 has 256KB L2 cache:
2106 64Kb/Way and 4-Way Associativity;
Daniel Walker2682fd32010-02-24 15:47:58 -08002107 evmon/parity/share disabled. */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002108 if ((SOCINFO_VERSION_MAJOR(socinfo_get_version()) > 1)
2109 || ((SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 1)
2110 && (SOCINFO_VERSION_MINOR(socinfo_get_version()) >= 3)))
2111 /* R/W latency: 4 cycles; */
2112 l2x0_init(MSM_L2CC_BASE, 0x0006801B, 0xfe000000);
2113 else
2114 /* R/W latency: 3 cycles; */
2115 l2x0_init(MSM_L2CC_BASE, 0x00068012, 0xfe000000);
Daniel Walker2682fd32010-02-24 15:47:58 -08002116 }
2117#endif
2118}
2119
2120MACHINE_START(MSM7X27_SURF, "QCT MSM7x27 SURF")
Russell Kingb75c1782011-01-04 19:03:16 +00002121 .boot_params = PLAT_PHYS_OFFSET + 0x100,
Daniel Walker2682fd32010-02-24 15:47:58 -08002122 .map_io = msm7x2x_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002123 .reserve = msm7x27_reserve,
Daniel Walker2682fd32010-02-24 15:47:58 -08002124 .init_irq = msm7x2x_init_irq,
2125 .init_machine = msm7x2x_init,
2126 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002127 .init_early = msm7x27_init_early,
Daniel Walker2682fd32010-02-24 15:47:58 -08002128MACHINE_END
2129
2130MACHINE_START(MSM7X27_FFA, "QCT MSM7x27 FFA")
Russell Kingb75c1782011-01-04 19:03:16 +00002131 .boot_params = PLAT_PHYS_OFFSET + 0x100,
Daniel Walker2682fd32010-02-24 15:47:58 -08002132 .map_io = msm7x2x_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002133 .reserve = msm7x27_reserve,
Daniel Walker2682fd32010-02-24 15:47:58 -08002134 .init_irq = msm7x2x_init_irq,
2135 .init_machine = msm7x2x_init,
2136 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002137 .init_early = msm7x27_init_early,
Daniel Walker2682fd32010-02-24 15:47:58 -08002138MACHINE_END
2139
2140MACHINE_START(MSM7X25_SURF, "QCT MSM7x25 SURF")
Russell Kingb75c1782011-01-04 19:03:16 +00002141 .boot_params = PLAT_PHYS_OFFSET + 0x100,
Daniel Walker2682fd32010-02-24 15:47:58 -08002142 .map_io = msm7x2x_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002143 .reserve = msm7x27_reserve,
Daniel Walker2682fd32010-02-24 15:47:58 -08002144 .init_irq = msm7x2x_init_irq,
2145 .init_machine = msm7x2x_init,
2146 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002147 .init_early = msm7x27_init_early,
Daniel Walker2682fd32010-02-24 15:47:58 -08002148MACHINE_END
2149
2150MACHINE_START(MSM7X25_FFA, "QCT MSM7x25 FFA")
Russell Kingb75c1782011-01-04 19:03:16 +00002151 .boot_params = PLAT_PHYS_OFFSET + 0x100,
Daniel Walker2682fd32010-02-24 15:47:58 -08002152 .map_io = msm7x2x_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002153 .reserve = msm7x27_reserve,
Daniel Walker2682fd32010-02-24 15:47:58 -08002154 .init_irq = msm7x2x_init_irq,
2155 .init_machine = msm7x2x_init,
2156 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002157 .init_early = msm7x27_init_early,
Daniel Walker2682fd32010-02-24 15:47:58 -08002158MACHINE_END