blob: db2cdfd7ddc4edec3b7f99dc20bb0d3a5266b2ba [file] [log] [blame]
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08001/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -080012 */
13#include <linux/kernel.h>
14#include <linux/platform_device.h>
15#include <linux/io.h>
16#include <linux/irq.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070017#include <linux/i2c.h>
18#include <linux/gpio.h>
19#include <linux/msm_ssbi.h>
20#include <linux/regulator/gpio-regulator.h>
21#include <linux/mfd/pm8xxx/pm8921.h>
22#include <linux/regulator/consumer.h>
23#include <linux/spi/spi.h>
24#include <linux/slimbus/slimbus.h>
25#include <linux/bootmem.h>
26#ifdef CONFIG_ANDROID_PMEM
27#include <linux/android_pmem.h>
28#endif
29#include <linux/cyttsp.h>
30#include <linux/dma-mapping.h>
31#include <linux/platform_data/qcom_crypto_device.h>
32#include <linux/leds.h>
33#include <linux/leds-pm8xxx.h>
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -080034
35#include <asm/mach-types.h>
36#include <asm/mach/arch.h>
37#include <asm/hardware/gic.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070038#include <asm/mach/mmc.h>
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -080039
40#include <mach/board.h>
41#include <mach/msm_iomap.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070042#include <mach/msm_spi.h>
43#ifdef CONFIG_USB_MSM_OTG_72K
44#include <mach/msm_hsusb.h>
45#else
46#include <linux/usb/msm_hsusb.h>
47#endif
48#include <linux/usb/android.h>
49#include <mach/usbdiag.h>
50#include <mach/socinfo.h>
51#include <mach/rpm.h>
52#include <mach/gpio.h>
53#include <mach/msm_bus_board.h>
54#include <mach/msm_memtypes.h>
55#include <mach/dma.h>
56#include <mach/msm_dsps.h>
57#include <mach/msm_xo.h>
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -080058
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070059#ifdef CONFIG_WCD9310_CODEC
60#include <linux/slimbus/slimbus.h>
61#include <linux/mfd/wcd9310/core.h>
62#include <linux/mfd/wcd9310/pdata.h>
63#endif
64
65#include "timer.h"
66#include "gpiomux.h"
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -080067#include "devices.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070068#include "devices-msm8x60.h"
69#include "gpiomux.h"
70#include "spm.h"
71#include "board-msm8960.h"
72#include "pm.h"
73#include "cpuidle.h"
74#include "rpm_resources.h"
75#include "mpm.h"
76
77static struct platform_device msm_fm_platform_init = {
78 .name = "iris_fm",
79 .id = -1,
80};
81
82struct pm8xxx_gpio_init {
83 unsigned gpio;
84 struct pm_gpio config;
85};
86
87struct pm8xxx_mpp_init {
88 unsigned mpp;
89 struct pm8xxx_mpp_config_data config;
90};
91
92#define PM8XXX_GPIO_INIT(_gpio, _dir, _buf, _val, _pull, _vin, _out_strength, \
93 _func, _inv, _disable) \
94{ \
95 .gpio = PM8921_GPIO_PM_TO_SYS(_gpio), \
96 .config = { \
97 .direction = _dir, \
98 .output_buffer = _buf, \
99 .output_value = _val, \
100 .pull = _pull, \
101 .vin_sel = _vin, \
102 .out_strength = _out_strength, \
103 .function = _func, \
104 .inv_int_pol = _inv, \
105 .disable_pin = _disable, \
106 } \
107}
108
109#define PM8XXX_MPP_INIT(_mpp, _type, _level, _control) \
110{ \
111 .mpp = PM8921_MPP_PM_TO_SYS(_mpp), \
112 .config = { \
113 .type = PM8XXX_MPP_TYPE_##_type, \
114 .level = _level, \
115 .control = PM8XXX_MPP_##_control, \
116 } \
117}
118
119#define PM8XXX_GPIO_DISABLE(_gpio) \
120 PM8XXX_GPIO_INIT(_gpio, PM_GPIO_DIR_IN, 0, 0, 0, PM_GPIO_VIN_S4, \
121 0, 0, 0, 1)
122
123#define PM8XXX_GPIO_OUTPUT(_gpio, _val) \
124 PM8XXX_GPIO_INIT(_gpio, PM_GPIO_DIR_OUT, PM_GPIO_OUT_BUF_CMOS, _val, \
125 PM_GPIO_PULL_NO, PM_GPIO_VIN_S4, \
126 PM_GPIO_STRENGTH_HIGH, \
127 PM_GPIO_FUNC_NORMAL, 0, 0)
128
129#define PM8XXX_GPIO_INPUT(_gpio, _pull) \
130 PM8XXX_GPIO_INIT(_gpio, PM_GPIO_DIR_IN, PM_GPIO_OUT_BUF_CMOS, 0, \
131 _pull, PM_GPIO_VIN_S4, \
132 PM_GPIO_STRENGTH_NO, \
133 PM_GPIO_FUNC_NORMAL, 0, 0)
134
135#define PM8XXX_GPIO_OUTPUT_FUNC(_gpio, _val, _func) \
136 PM8XXX_GPIO_INIT(_gpio, PM_GPIO_DIR_OUT, PM_GPIO_OUT_BUF_CMOS, _val, \
137 PM_GPIO_PULL_NO, PM_GPIO_VIN_S4, \
138 PM_GPIO_STRENGTH_HIGH, \
139 _func, 0, 0)
140
141/* Initial PM8921 GPIO configurations */
142static struct pm8xxx_gpio_init pm8921_gpios[] __initdata = {
143 PM8XXX_GPIO_DISABLE(6), /* Disable unused */
144 PM8XXX_GPIO_DISABLE(7), /* Disable NFC */
145 PM8XXX_GPIO_INPUT(16, PM_GPIO_PULL_UP_30), /* SD_CARD_WP */
146 PM8XXX_GPIO_DISABLE(22), /* Disable NFC */
147 PM8XXX_GPIO_OUTPUT_FUNC(24, 0, PM_GPIO_FUNC_1), /* Bl: Off, PWM mode */
148 PM8XXX_GPIO_INPUT(26, PM_GPIO_PULL_UP_30), /* SD_CARD_DET_N */
149 PM8XXX_GPIO_OUTPUT(43, 0), /* DISP_RESET_N */
150};
151
152/* Initial PM8921 MPP configurations */
153static struct pm8xxx_mpp_init pm8921_mpps[] __initdata = {
154 /* External 5V regulator enable; shared by HDMI and USB_OTG switches. */
155 PM8XXX_MPP_INIT(7, D_INPUT, PM8921_MPP_DIG_LEVEL_VPH, DIN_TO_INT),
156 PM8XXX_MPP_INIT(PM8921_AMUX_MPP_3, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH6,
157 DOUT_CTRL_LOW),
158 PM8XXX_MPP_INIT(PM8921_AMUX_MPP_8, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH8,
159 DOUT_CTRL_LOW),
160};
161
162static void __init pm8921_gpio_mpp_init(void)
163{
164 int i, rc;
165
166 for (i = 0; i < ARRAY_SIZE(pm8921_gpios); i++) {
167 rc = pm8xxx_gpio_config(pm8921_gpios[i].gpio,
168 &pm8921_gpios[i].config);
169 if (rc) {
170 pr_err("%s: pm8xxx_gpio_config: rc=%d\n", __func__, rc);
171 break;
172 }
173 }
174
175 for (i = 0; i < ARRAY_SIZE(pm8921_mpps); i++) {
176 rc = pm8xxx_mpp_config(pm8921_mpps[i].mpp,
177 &pm8921_mpps[i].config);
178 if (rc) {
179 pr_err("%s: pm8xxx_mpp_config: rc=%d\n", __func__, rc);
180 break;
181 }
182 }
183}
184
185#define FPGA_CS_GPIO 14
186#define KS8851_RST_GPIO 89
187#define KS8851_IRQ_GPIO 90
188
189/* Macros assume PMIC GPIOs and MPPs start at 1 */
190#define PM8921_GPIO_BASE NR_GPIO_IRQS
191#define PM8921_GPIO_PM_TO_SYS(pm_gpio) (pm_gpio - 1 + PM8921_GPIO_BASE)
192#define PM8921_MPP_BASE (PM8921_GPIO_BASE + PM8921_NR_GPIOS)
193#define PM8921_MPP_PM_TO_SYS(pm_gpio) (pm_gpio - 1 + PM8921_MPP_BASE)
194#define PM8921_IRQ_BASE (NR_MSM_IRQS + NR_GPIO_IRQS)
195#define PM8921_MPP_IRQ_BASE (PM8921_IRQ_BASE + NR_GPIO_IRQS)
196
197static struct gpiomux_setting gsbi1 = {
198 .func = GPIOMUX_FUNC_1,
199 .drv = GPIOMUX_DRV_8MA,
200 .pull = GPIOMUX_PULL_NONE,
201};
202
203static struct gpiomux_setting gsbi3 = {
204 .func = GPIOMUX_FUNC_1,
205 .drv = GPIOMUX_DRV_8MA,
206 .pull = GPIOMUX_PULL_NONE,
207};
208
209static struct gpiomux_setting gsbi4 = {
210 .func = GPIOMUX_FUNC_1,
211 .drv = GPIOMUX_DRV_8MA,
212 .pull = GPIOMUX_PULL_NONE,
213};
214
215static struct gpiomux_setting gsbi5 = {
216 .func = GPIOMUX_FUNC_1,
217 .drv = GPIOMUX_DRV_8MA,
218 .pull = GPIOMUX_PULL_NONE,
219};
220
221static struct gpiomux_setting gsbi10 = {
222 .func = GPIOMUX_FUNC_2,
223 .drv = GPIOMUX_DRV_8MA,
224 .pull = GPIOMUX_PULL_NONE,
225};
226
227static struct gpiomux_setting gsbi12 = {
228 .func = GPIOMUX_FUNC_1,
229 .drv = GPIOMUX_DRV_8MA,
230 .pull = GPIOMUX_PULL_NONE,
231};
232
233static struct gpiomux_setting cdc_mclk = {
234 .func = GPIOMUX_FUNC_1,
235 .drv = GPIOMUX_DRV_8MA,
236 .pull = GPIOMUX_PULL_NONE,
237};
238
239static struct gpiomux_setting gpio_eth_config = {
240 .pull = GPIOMUX_PULL_NONE,
241 .drv = GPIOMUX_DRV_8MA,
242 .func = GPIOMUX_FUNC_GPIO,
243};
244
245static struct gpiomux_setting slimbus = {
246 .func = GPIOMUX_FUNC_1,
247 .drv = GPIOMUX_DRV_8MA,
248 .pull = GPIOMUX_PULL_KEEPER,
249};
250
251struct msm_gpiomux_config msm8960_gpiomux_configs[NR_GPIO_IRQS] = {
252 {
253 .gpio = KS8851_IRQ_GPIO,
254 .settings = {
255 [GPIOMUX_SUSPENDED] = &gpio_eth_config,
256 }
257 },
258 {
259 .gpio = KS8851_RST_GPIO,
260 .settings = {
261 [GPIOMUX_SUSPENDED] = &gpio_eth_config,
262 }
263 },
264 {
265 .gpio = FPGA_CS_GPIO,
266 .settings = {
267 [GPIOMUX_SUSPENDED] = &gpio_eth_config,
268 }
269 },
270};
271
272static struct msm_gpiomux_config msm8960_gsbi_configs[] __initdata = {
273 {
274 .gpio = 6, /* GSBI1 QUP SPI_DATA_MOSI */
275 .settings = {
276 [GPIOMUX_SUSPENDED] = &gsbi1,
277 },
278 },
279 {
280 .gpio = 7, /* GSBI1 QUP SPI_DATA_MISO */
281 .settings = {
282 [GPIOMUX_SUSPENDED] = &gsbi1,
283 },
284 },
285 {
286 .gpio = 8, /* GSBI1 QUP SPI_CS_N */
287 .settings = {
288 [GPIOMUX_SUSPENDED] = &gsbi1,
289 },
290 },
291 {
292 .gpio = 9, /* GSBI1 QUP SPI_CLK */
293 .settings = {
294 [GPIOMUX_SUSPENDED] = &gsbi1,
295 },
296 },
297 {
298 .gpio = 16, /* GSBI3 I2C QUP SDA */
299 .settings = {
300 [GPIOMUX_SUSPENDED] = &gsbi3,
301 },
302 },
303 {
304 .gpio = 17, /* GSBI3 I2C QUP SCL */
305 .settings = {
306 [GPIOMUX_SUSPENDED] = &gsbi3,
307 },
308 },
309 {
310 .gpio = 20, /* GSBI4 I2C QUP SDA */
311 .settings = {
312 [GPIOMUX_SUSPENDED] = &gsbi4,
313 },
314 },
315 {
316 .gpio = 21, /* GSBI4 I2C QUP SCL */
317 .settings = {
318 [GPIOMUX_SUSPENDED] = &gsbi4,
319 },
320 },
321 {
322 .gpio = 22, /* GSBI5 UART2 */
323 .settings = {
324 [GPIOMUX_SUSPENDED] = &gsbi5,
325 },
326 },
327 {
328 .gpio = 23, /* GSBI5 UART2 */
329 .settings = {
330 [GPIOMUX_SUSPENDED] = &gsbi5,
331 },
332 },
333 {
334 .gpio = 24, /* GSBI5 UART2 */
335 .settings = {
336 [GPIOMUX_SUSPENDED] = &gsbi5,
337 },
338 },
339 {
340 .gpio = 25, /* GSBI5 UART2 */
341 .settings = {
342 [GPIOMUX_SUSPENDED] = &gsbi5,
343 },
344 },
345 {
346 .gpio = 44, /* GSBI12 I2C QUP SDA */
347 .settings = {
348 [GPIOMUX_SUSPENDED] = &gsbi12,
349 },
350 },
351 {
352 .gpio = 45, /* GSBI12 I2C QUP SCL */
353 .settings = {
354 [GPIOMUX_SUSPENDED] = &gsbi12,
355 },
356 },
357 {
358 .gpio = 73, /* GSBI10 I2C QUP SDA */
359 .settings = {
360 [GPIOMUX_SUSPENDED] = &gsbi10,
361 },
362 },
363 {
364 .gpio = 74, /* GSBI10 I2C QUP SCL */
365 .settings = {
366 [GPIOMUX_SUSPENDED] = &gsbi10,
367 },
368 },
369};
370
371static struct msm_gpiomux_config msm8960_slimbus_config[] __initdata = {
372 {
373 .gpio = 60, /* slimbus data */
374 .settings = {
375 [GPIOMUX_SUSPENDED] = &slimbus,
376 },
377 },
378 {
379 .gpio = 61, /* slimbus clk */
380 .settings = {
381 [GPIOMUX_SUSPENDED] = &slimbus,
382 },
383 },
384};
385
386static struct msm_gpiomux_config msm8960_audio_codec_configs[] __initdata = {
387 {
388 .gpio = 59,
389 .settings = {
390 [GPIOMUX_SUSPENDED] = &cdc_mclk,
391 },
392 },
393};
394static struct gpiomux_setting wcnss_5wire_suspend_cfg = {
395 .func = GPIOMUX_FUNC_GPIO,
396 .drv = GPIOMUX_DRV_2MA,
397 .pull = GPIOMUX_PULL_NONE,
398};
399
400static struct gpiomux_setting wcnss_5wire_active_cfg = {
401 .func = GPIOMUX_FUNC_1,
402 .drv = GPIOMUX_DRV_6MA,
403 .pull = GPIOMUX_PULL_DOWN,
404};
405
406static struct msm_gpiomux_config wcnss_5wire_interface[] = {
407 {
408 .gpio = 84,
409 .settings = {
410 [GPIOMUX_ACTIVE] = &wcnss_5wire_active_cfg,
411 [GPIOMUX_SUSPENDED] = &wcnss_5wire_suspend_cfg,
412 },
413 },
414 {
415 .gpio = 85,
416 .settings = {
417 [GPIOMUX_ACTIVE] = &wcnss_5wire_active_cfg,
418 [GPIOMUX_SUSPENDED] = &wcnss_5wire_suspend_cfg,
419 },
420 },
421 {
422 .gpio = 86,
423 .settings = {
424 [GPIOMUX_ACTIVE] = &wcnss_5wire_active_cfg,
425 [GPIOMUX_SUSPENDED] = &wcnss_5wire_suspend_cfg,
426 },
427 },
428 {
429 .gpio = 87,
430 .settings = {
431 [GPIOMUX_ACTIVE] = &wcnss_5wire_active_cfg,
432 [GPIOMUX_SUSPENDED] = &wcnss_5wire_suspend_cfg,
433 },
434 },
435 {
436 .gpio = 88,
437 .settings = {
438 [GPIOMUX_ACTIVE] = &wcnss_5wire_active_cfg,
439 [GPIOMUX_SUSPENDED] = &wcnss_5wire_suspend_cfg,
440 },
441 },
442};
443
444static struct gpiomux_setting cam_suspend_cfg = {
445 .func = GPIOMUX_FUNC_GPIO,
446 .drv = GPIOMUX_DRV_2MA,
447 .pull = GPIOMUX_PULL_DOWN,
448};
449
450static struct gpiomux_setting cam_active_1_cfg = {
451 .func = GPIOMUX_FUNC_1,
452 .drv = GPIOMUX_DRV_2MA,
453 .pull = GPIOMUX_PULL_NONE,
454};
455
456static struct gpiomux_setting cam_active_2_cfg = {
457 .func = GPIOMUX_FUNC_GPIO,
458 .drv = GPIOMUX_DRV_2MA,
459 .pull = GPIOMUX_PULL_NONE,
460};
461
462static struct gpiomux_setting cam_active_3_cfg = {
463 .func = GPIOMUX_FUNC_1,
464 .drv = GPIOMUX_DRV_8MA,
465 .pull = GPIOMUX_PULL_UP,
466};
467
468static struct msm_gpiomux_config msm8960_cam_configs[] __initdata = {
469 {
470 .gpio = 2,
471 .settings = {
472 [GPIOMUX_ACTIVE] = &cam_active_2_cfg,
473 [GPIOMUX_SUSPENDED] = &cam_suspend_cfg,
474 },
475 },
476 {
477 .gpio = 3,
478 .settings = {
479 [GPIOMUX_ACTIVE] = &cam_active_1_cfg,
480 [GPIOMUX_SUSPENDED] = &cam_suspend_cfg,
481 },
482 },
483 {
484 .gpio = 4,
485 .settings = {
486 [GPIOMUX_ACTIVE] = &cam_active_1_cfg,
487 [GPIOMUX_SUSPENDED] = &cam_suspend_cfg,
488 },
489 },
490 {
491 .gpio = 5,
492 .settings = {
493 [GPIOMUX_ACTIVE] = &cam_active_1_cfg,
494 [GPIOMUX_SUSPENDED] = &cam_suspend_cfg,
495 },
496 },
497 {
498 .gpio = 18,
499 .settings = {
500 [GPIOMUX_ACTIVE] = &cam_active_3_cfg,
501 [GPIOMUX_SUSPENDED] = &cam_suspend_cfg,
502 },
503 },
504 {
505 .gpio = 19,
506 .settings = {
507 [GPIOMUX_ACTIVE] = &cam_active_3_cfg,
508 [GPIOMUX_SUSPENDED] = &cam_suspend_cfg,
509 },
510 },
511 {
512 .gpio = 20,
513 .settings = {
514 [GPIOMUX_ACTIVE] = &cam_active_3_cfg,
515 [GPIOMUX_SUSPENDED] = &cam_suspend_cfg,
516 },
517 },
518 {
519 .gpio = 21,
520 .settings = {
521 [GPIOMUX_ACTIVE] = &cam_active_3_cfg,
522 [GPIOMUX_SUSPENDED] = &cam_suspend_cfg,
523 },
524 },
525 {
526 .gpio = 76,
527 .settings = {
528 [GPIOMUX_ACTIVE] = &cam_active_2_cfg,
529 [GPIOMUX_SUSPENDED] = &cam_suspend_cfg,
530 },
531 },
532 {
533 .gpio = 107,
534 .settings = {
535 [GPIOMUX_ACTIVE] = &cam_active_2_cfg,
536 [GPIOMUX_SUSPENDED] = &cam_suspend_cfg,
537 },
538 },
539};
540
541static struct gpiomux_setting cyts_resout_sus_cfg = {
542 .func = GPIOMUX_FUNC_GPIO,
543 .drv = GPIOMUX_DRV_6MA,
544 .pull = GPIOMUX_PULL_UP,
545};
546
547static struct gpiomux_setting cyts_resout_act_cfg = {
548 .func = GPIOMUX_FUNC_GPIO,
549 .drv = GPIOMUX_DRV_6MA,
550 .pull = GPIOMUX_PULL_UP,
551};
552
553static struct gpiomux_setting cyts_sleep_sus_cfg = {
554 .func = GPIOMUX_FUNC_GPIO,
555 .drv = GPIOMUX_DRV_6MA,
556 .pull = GPIOMUX_PULL_DOWN,
557};
558
559static struct gpiomux_setting cyts_sleep_act_cfg = {
560 .func = GPIOMUX_FUNC_GPIO,
561 .drv = GPIOMUX_DRV_6MA,
562 .pull = GPIOMUX_PULL_DOWN,
563};
564
565static struct gpiomux_setting cyts_int_act_cfg = {
566 .func = GPIOMUX_FUNC_GPIO,
567 .drv = GPIOMUX_DRV_8MA,
568 .pull = GPIOMUX_PULL_UP,
569};
570
571static struct gpiomux_setting cyts_int_sus_cfg = {
572 .func = GPIOMUX_FUNC_GPIO,
573 .drv = GPIOMUX_DRV_2MA,
574 .pull = GPIOMUX_PULL_UP,
575};
576
577
578static struct msm_gpiomux_config msm8960_cyts_configs[] __initdata = {
579 { /* TS INTERRUPT */
580 .gpio = 11,
581 .settings = {
582 [GPIOMUX_ACTIVE] = &cyts_int_act_cfg,
583 [GPIOMUX_SUSPENDED] = &cyts_int_sus_cfg,
584 },
585 },
586 { /* TS SLEEP */
587 .gpio = 50,
588 .settings = {
589 [GPIOMUX_ACTIVE] = &cyts_sleep_act_cfg,
590 [GPIOMUX_SUSPENDED] = &cyts_sleep_sus_cfg,
591 },
592 },
593 { /* TS RESOUT */
594 .gpio = 52,
595 .settings = {
596 [GPIOMUX_ACTIVE] = &cyts_resout_act_cfg,
597 [GPIOMUX_SUSPENDED] = &cyts_resout_sus_cfg,
598 },
599 },
600};
601
602#define MSM_PMEM_KERNEL_EBI1_SIZE 0x110C000
603#define MSM_PMEM_ADSP_SIZE 0x3800000
604#define MSM_PMEM_AUDIO_SIZE 0x279000
605#define MSM_PMEM_SIZE 0x1800000 /* 24 Mbytes */
606
607#ifdef CONFIG_KERNEL_PMEM_EBI_REGION
608static unsigned pmem_kernel_ebi1_size = MSM_PMEM_KERNEL_EBI1_SIZE;
609static int __init pmem_kernel_ebi1_size_setup(char *p)
610{
611 pmem_kernel_ebi1_size = memparse(p, NULL);
612 return 0;
613}
614early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
615#endif
616
617#ifdef CONFIG_ANDROID_PMEM
618static unsigned pmem_size = MSM_PMEM_SIZE;
619static int __init pmem_size_setup(char *p)
620{
621 pmem_size = memparse(p, NULL);
622 return 0;
623}
624early_param("pmem_size", pmem_size_setup);
625
626static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
627
628static int __init pmem_adsp_size_setup(char *p)
629{
630 pmem_adsp_size = memparse(p, NULL);
631 return 0;
632}
633early_param("pmem_adsp_size", pmem_adsp_size_setup);
634
635static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
636
637static int __init pmem_audio_size_setup(char *p)
638{
639 pmem_audio_size = memparse(p, NULL);
640 return 0;
641}
642early_param("pmem_audio_size", pmem_audio_size_setup);
643#endif
644
645#ifdef CONFIG_ANDROID_PMEM
646static struct android_pmem_platform_data android_pmem_pdata = {
647 .name = "pmem",
648 .allocator_type = PMEM_ALLOCATORTYPE_ALLORNOTHING,
649 .cached = 1,
650 .memory_type = MEMTYPE_EBI1,
651};
652
653static struct platform_device android_pmem_device = {
654 .name = "android_pmem",
655 .id = 0,
656 .dev = {.platform_data = &android_pmem_pdata},
657};
658
659static struct android_pmem_platform_data android_pmem_adsp_pdata = {
660 .name = "pmem_adsp",
661 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
662 .cached = 0,
663 .memory_type = MEMTYPE_EBI1,
664};
665static struct platform_device android_pmem_adsp_device = {
666 .name = "android_pmem",
667 .id = 2,
668 .dev = { .platform_data = &android_pmem_adsp_pdata },
669};
670
671static struct android_pmem_platform_data android_pmem_audio_pdata = {
672 .name = "pmem_audio",
673 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
674 .cached = 0,
675 .memory_type = MEMTYPE_EBI1,
676};
677
678static struct platform_device android_pmem_audio_device = {
679 .name = "android_pmem",
680 .id = 4,
681 .dev = { .platform_data = &android_pmem_audio_pdata },
682};
683#endif
684
685static struct memtype_reserve msm8960_reserve_table[] __initdata = {
686 [MEMTYPE_SMI] = {
687 },
688 [MEMTYPE_EBI0] = {
689 .flags = MEMTYPE_FLAGS_1M_ALIGN,
690 },
691 [MEMTYPE_EBI1] = {
692 .flags = MEMTYPE_FLAGS_1M_ALIGN,
693 },
694};
695
696static void __init size_pmem_devices(void)
697{
698#ifdef CONFIG_ANDROID_PMEM
699 android_pmem_adsp_pdata.size = pmem_adsp_size;
700 android_pmem_pdata.size = pmem_size;
701 android_pmem_audio_pdata.size = MSM_PMEM_AUDIO_SIZE;
702#endif
703}
704
705static void __init reserve_memory_for(struct android_pmem_platform_data *p)
706{
707 msm8960_reserve_table[p->memory_type].size += p->size;
708}
709
710static void __init reserve_pmem_memory(void)
711{
712#ifdef CONFIG_ANDROID_PMEM
713 reserve_memory_for(&android_pmem_adsp_pdata);
714 reserve_memory_for(&android_pmem_pdata);
715 reserve_memory_for(&android_pmem_audio_pdata);
716 msm8960_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
717#endif
718}
719
720static void __init msm8960_calculate_reserve_sizes(void)
721{
722 size_pmem_devices();
723 reserve_pmem_memory();
724}
725
726static int msm8960_paddr_to_memtype(unsigned int paddr)
727{
728 return MEMTYPE_EBI1;
729}
730
731static struct reserve_info msm8960_reserve_info __initdata = {
732 .memtype_reserve_table = msm8960_reserve_table,
733 .calculate_reserve_sizes = msm8960_calculate_reserve_sizes,
734 .paddr_to_memtype = msm8960_paddr_to_memtype,
735};
736
737static void __init msm8960_reserve(void)
738{
739 reserve_info = &msm8960_reserve_info;
740 msm_reserve();
741}
742
743#ifdef CONFIG_MSM_CAMERA
744
745static int msm_cam_gpio_tbl[] = {
746 5, /*CAMIF_MCLK*/
747 20, /*CAMIF_I2C_DATA*/
748 21, /*CAMIF_I2C_CLK*/
749};
750
751#define VFE_CAMIF_TIMER1_GPIO 2
752#define VFE_CAMIF_TIMER2_GPIO 3
753#define VFE_CAMIF_TIMER3_GPIO_INT 4
754struct msm_camera_sensor_strobe_flash_data strobe_flash_xenon = {
755 .flash_trigger = VFE_CAMIF_TIMER2_GPIO,
756 .flash_charge = VFE_CAMIF_TIMER1_GPIO,
757 .flash_charge_done = VFE_CAMIF_TIMER3_GPIO_INT,
758 .flash_recharge_duration = 50000,
759 .irq = MSM_GPIO_TO_INT(VFE_CAMIF_TIMER3_GPIO_INT),
760};
761
762#ifdef CONFIG_IMX074
763static struct msm_camera_sensor_platform_info sensor_board_info = {
764 .mount_angle = 0
765};
766#endif
767
768static int config_gpio_table(int gpio_en)
769{
770 int rc = 0, i = 0;
771 if (gpio_en) {
772 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++) {
773 rc = gpio_request(msm_cam_gpio_tbl[i], "CAM_GPIO");
774 if (rc < 0) {
775 pr_err("%s not able to get gpio\n", __func__);
776 for (i--; i >= 0; i--)
777 gpio_free(msm_cam_gpio_tbl[i]);
778 break;
779 }
780 }
781 } else {
782 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++)
783 gpio_free(msm_cam_gpio_tbl[i]);
784 }
785 return rc;
786}
787
788static int config_camera_on_gpios(void)
789{
790 int rc = 0;
791
792 rc = config_gpio_table(1);
793 if (rc < 0) {
794 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
795 "failed\n", __func__);
796 return rc;
797 }
798 return rc;
799}
800
801static void config_camera_off_gpios(void)
802{
803 config_gpio_table(0);
804}
805
806struct msm_camera_device_platform_data msm_camera_csi0_device_data = {
807 .camera_gpio_on = config_camera_on_gpios,
808 .camera_gpio_off = config_camera_off_gpios,
809 .ioclk.mclk_clk_rate = 24000000,
810 .ioclk.vfe_clk_rate = 228570000,
811 .csid_core = 0,
812};
813
814struct msm_camera_device_platform_data msm_camera_csi1_device_data = {
815 .camera_gpio_on = config_camera_on_gpios,
816 .camera_gpio_off = config_camera_off_gpios,
817 .ioclk.mclk_clk_rate = 24000000,
818 .ioclk.vfe_clk_rate = 228570000,
819 .csid_core = 1,
820};
821
822#ifdef CONFIG_IMX074
823static struct msm_camera_sensor_flash_data flash_imx074 = {
824 .flash_type = MSM_CAMERA_FLASH_LED,
825};
826
827static struct msm_camera_sensor_info msm_camera_sensor_imx074_data = {
828 .sensor_name = "imx074",
829 .sensor_reset = 107,
830 .sensor_pwd = 85,
831 .vcm_pwd = 0,
832 .vcm_enable = 1,
833 .pdata = &msm_camera_csi0_device_data,
834 .flash_data = &flash_imx074,
835 .strobe_flash_data = &strobe_flash_xenon,
836 .sensor_platform_info = &sensor_board_info,
837 .csi_if = 1
838};
839
840struct platform_device msm8960_camera_sensor_imx074 = {
841 .name = "msm_camera_imx074",
842 .dev = {
843 .platform_data = &msm_camera_sensor_imx074_data,
844 },
845};
846#endif
847#ifdef CONFIG_OV2720
848static struct msm_camera_sensor_flash_data flash_ov2720 = {
849 .flash_type = MSM_CAMERA_FLASH_LED,
850};
851
852static struct msm_camera_sensor_info msm_camera_sensor_ov2720_data = {
853 .sensor_name = "ov2720",
854 .sensor_reset = 76,
855 .sensor_pwd = 85,
856 .vcm_pwd = 0,
857 .vcm_enable = 1,
858 .pdata = &msm_camera_csi1_device_data,
859 .flash_data = &flash_ov2720,
860 .csi_if = 1
861};
862
863struct platform_device msm8960_camera_sensor_ov2720 = {
864 .name = "msm_camera_ov2720",
865 .dev = {
866 .platform_data = &msm_camera_sensor_ov2720_data,
867 },
868};
869#endif
870static void __init msm8960_init_cam(void)
871{
872 int i;
873 struct platform_device *cam_dev[] = {
874 &msm8960_camera_sensor_imx074,
875 &msm8960_camera_sensor_ov2720,
876 };
877
878 for (i = 0; i < ARRAY_SIZE(cam_dev); i++) {
879 struct msm_camera_sensor_info *s_info;
880 s_info = cam_dev[i]->dev.platform_data;
881 msm_get_cam_resources(s_info);
882 platform_device_register(cam_dev[i]);
883 }
884}
885#endif
886
887#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
888/* prim = 608 x 1024 x 4(bpp) x 3(pages) */
889#define MSM_FB_PRIM_BUF_SIZE 0x720000
890#else
891/* prim = 608 x 1024 x 4(bpp) x 2(pages) */
892#define MSM_FB_PRIM_BUF_SIZE 0x4C0000
893#endif
894
895#ifdef CONFIG_FB_MSM_MIPI_DSI
896/* 960 x 540 x 3 x 2 */
897#define MIPI_DSI_WRITEBACK_SIZE 0x300000
898#else
899#define MIPI_DSI_WRITEBACK_SIZE 0
900#endif
901
902#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
903/* hdmi = 1920 x 1088 x 2(bpp) x 1(page) */
904#define MSM_FB_EXT_BUF_SIZE 0x3FC000
905#elif defined(CONFIG_FB_MSM_TVOUT)
906/* tvout = 720 x 576 x 2(bpp) x 2(pages) */
907#define MSM_FB_EXT_BUF_SIZE 0x195000
908#else /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
909#define MSM_FB_EXT_BUF_SIZE 0
910#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
911
912#define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE +\
913 MIPI_DSI_WRITEBACK_SIZE, 4096)
914
915#define MDP_VSYNC_GPIO 0
916
917static struct resource msm_fb_resources[] = {
918 {
919 .flags = IORESOURCE_DMA,
920 }
921};
922
923static struct platform_device msm_fb_device = {
924 .name = "msm_fb",
925 .id = 0,
926 .num_resources = ARRAY_SIZE(msm_fb_resources),
927 .resource = msm_fb_resources,
928};
929
930static bool dsi_power_on;
931
932static int mipi_dsi_panel_power(int on)
933{
934 static struct regulator *reg_l8, *reg_l23, *reg_l2;
935 static int gpio24, gpio43;
936 int rc;
937
938 struct pm_gpio gpio43_param = {
939 .direction = PM_GPIO_DIR_OUT,
940 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
941 .output_value = 0,
942 .pull = PM_GPIO_PULL_NO,
943 .vin_sel = 2,
944 .out_strength = PM_GPIO_STRENGTH_HIGH,
945 .function = PM_GPIO_FUNC_PAIRED,
946 .inv_int_pol = 0,
947 .disable_pin = 0,
948 };
949
950 struct pm_gpio gpio24_param = {
951 .direction = PM_GPIO_DIR_OUT,
952 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
953 .output_value = 1,
954 .pull = PM_GPIO_PULL_NO,
955 .vin_sel = 2,
956 .out_strength = PM_GPIO_STRENGTH_HIGH,
957 .function = PM_GPIO_FUNC_NORMAL,
958 .inv_int_pol = 0,
959 .disable_pin = 0,
960 };
961
962 pr_info("%s: state : %d\n", __func__, on);
963
964 if (!dsi_power_on) {
965
966 reg_l8 = regulator_get(&msm_mipi_dsi1_device.dev,
967 "dsi_vdc");
968 if (IS_ERR(reg_l8)) {
969 pr_err("could not get 8921_l8, rc = %ld\n",
970 PTR_ERR(reg_l8));
971 return -ENODEV;
972 }
973
974 reg_l23 = regulator_get(&msm_mipi_dsi1_device.dev,
975 "dsi_vddio");
976 if (IS_ERR(reg_l23)) {
977 pr_err("could not get 8921_l23, rc = %ld\n",
978 PTR_ERR(reg_l23));
979 return -ENODEV;
980 }
981
982 reg_l2 = regulator_get(&msm_mipi_dsi1_device.dev,
983 "dsi_vdda");
984 if (IS_ERR(reg_l2)) {
985 pr_err("could not get 8921_l2, rc = %ld\n",
986 PTR_ERR(reg_l2));
987 return -ENODEV;
988 }
989
990 rc = regulator_set_voltage(reg_l8, 2800000, 3000000);
991 if (rc) {
992 pr_err("set_voltage l8 failed, rc=%d\n", rc);
993 return -EINVAL;
994 }
995 rc = regulator_set_voltage(reg_l23, 1800000, 1800000);
996 if (rc) {
997 pr_err("set_voltage l23 failed, rc=%d\n", rc);
998 return -EINVAL;
999 }
1000 rc = regulator_set_voltage(reg_l2, 1200000, 1200000);
1001 if (rc) {
1002 pr_err("set_voltage l2 failed, rc=%d\n", rc);
1003 return -EINVAL;
1004 }
1005
1006 gpio43 = PM8921_GPIO_PM_TO_SYS(43);
1007 rc = gpio_request(gpio43, "disp_rst_n");
1008 if (rc) {
1009 pr_err("request gpio 43 failed, rc=%d\n", rc);
1010 return -ENODEV;
1011 }
1012
1013 gpio24 = PM8921_GPIO_PM_TO_SYS(24);
1014 rc = gpio_request(gpio24, "disp_backlight");
1015 if (rc) {
1016 pr_err("request gpio 24 failed, rc=%d\n", rc);
1017 return -EINVAL;
1018 }
1019 dsi_power_on = true;
1020 }
1021
1022 if (on) {
1023 rc = regulator_set_optimum_mode(reg_l8, 100000);
1024 if (rc < 0) {
1025 pr_err("set_optimum_mode l8 failed, rc=%d\n", rc);
1026 return -EINVAL;
1027 }
1028 rc = regulator_set_optimum_mode(reg_l23, 100000);
1029 if (rc < 0) {
1030 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
1031 return -EINVAL;
1032 }
1033 rc = regulator_set_optimum_mode(reg_l2, 100000);
1034 if (rc < 0) {
1035 pr_err("set_optimum_mode l2 failed, rc=%d\n", rc);
1036 return -EINVAL;
1037 }
1038 rc = regulator_enable(reg_l8);
1039 if (rc) {
1040 pr_err("enable l8 failed, rc=%d\n", rc);
1041 return -ENODEV;
1042 }
1043 rc = regulator_enable(reg_l23);
1044 if (rc) {
1045 pr_err("enable l8 failed, rc=%d\n", rc);
1046 return -ENODEV;
1047 }
1048 rc = regulator_enable(reg_l2);
1049 if (rc) {
1050 pr_err("enable l2 failed, rc=%d\n", rc);
1051 return -ENODEV;
1052 }
1053
1054 gpio43_param.pull = PM_GPIO_PULL_NO;
1055 rc = pm8xxx_gpio_config(gpio43, &gpio43_param);
1056 if (rc) {
1057 pr_err("gpio_config 43 failed (1), rc=%d\n", rc);
1058 return -EINVAL;
1059 }
1060 gpio43_param.pull = PM_GPIO_PULL_UP_30;
1061 rc = pm8xxx_gpio_config(gpio43, &gpio43_param);
1062 if (rc) {
1063 pr_err("gpio_config 43 failed (2), rc=%d\n", rc);
1064 return -EINVAL;
1065 }
1066 gpio43_param.pull = PM_GPIO_PULL_NO;
1067 rc = pm8xxx_gpio_config(gpio43, &gpio43_param);
1068 if (rc) {
1069 pr_err("gpio_config 43 failed (3), rc=%d\n", rc);
1070 return -EINVAL;
1071 }
1072 gpio43_param.pull = PM_GPIO_PULL_UP_30;
1073 rc = pm8xxx_gpio_config(gpio43, &gpio43_param);
1074 if (rc) {
1075 pr_err("gpio_config 43 failed (4), rc=%d\n", rc);
1076 return -EINVAL;
1077 }
1078
1079 rc = pm8xxx_gpio_config(gpio24, &gpio24_param);
1080 if (rc) {
1081 pr_err("gpio_config 24 failed, rc=%d\n", rc);
1082 return -EINVAL;
1083 }
1084
1085 gpio_set_value_cansleep(gpio43, 1);
1086 } else {
1087 rc = regulator_set_optimum_mode(reg_l8, 100);
1088 if (rc < 0) {
1089 pr_err("set_optimum_mode l8 failed, rc=%d\n", rc);
1090 return -EINVAL;
1091 }
1092 rc = regulator_set_optimum_mode(reg_l23, 100);
1093 if (rc < 0) {
1094 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
1095 return -EINVAL;
1096 }
1097 rc = regulator_set_optimum_mode(reg_l2, 100);
1098 if (rc < 0) {
1099 pr_err("set_optimum_mode l2 failed, rc=%d\n", rc);
1100 return -EINVAL;
1101 }
1102 gpio_set_value_cansleep(gpio43, 0);
1103 }
1104 return 0;
1105}
1106
1107static struct mipi_dsi_platform_data mipi_dsi_pdata = {
1108 .vsync_gpio = MDP_VSYNC_GPIO,
1109 .dsi_power_save = mipi_dsi_panel_power,
1110};
1111
1112#ifdef CONFIG_MSM_BUS_SCALING
1113
1114static struct msm_bus_vectors mdp_init_vectors[] = {
1115 /* For now, 0th array entry is reserved.
1116 * Please leave 0 as is and don't use it
1117 */
1118 {
1119 .src = MSM_BUS_MASTER_MDP_PORT0,
1120 .dst = MSM_BUS_SLAVE_EBI_CH0,
1121 .ab = 0,
1122 .ib = 0,
1123 },
1124 /* Master and slaves can be from different fabrics */
1125 {
1126 .src = MSM_BUS_MASTER_MDP_PORT0,
1127 .dst = MSM_BUS_SLAVE_EBI_CH0,
1128 .ab = 0,
1129 .ib = 0,
1130 },
1131};
1132
1133static struct msm_bus_vectors mdp_vga_vectors[] = {
1134 /* VGA and less video */
1135 {
1136 .src = MSM_BUS_MASTER_MDP_PORT0,
1137 .dst = MSM_BUS_SLAVE_EBI_CH0,
1138 .ab = 175110000,
1139 .ib = 218887500,
1140 },
1141 {
1142 .src = MSM_BUS_MASTER_MDP_PORT0,
1143 .dst = MSM_BUS_SLAVE_EBI_CH0,
1144 .ab = 175110000,
1145 .ib = 218887500,
1146 },
1147};
1148
1149static struct msm_bus_vectors mdp_720p_vectors[] = {
1150 /* 720p and less video */
1151 {
1152 .src = MSM_BUS_MASTER_MDP_PORT0,
1153 .dst = MSM_BUS_SLAVE_EBI_CH0,
1154 .ab = 230400000,
1155 .ib = 288000000,
1156 },
1157 /* Master and slaves can be from different fabrics */
1158 {
1159 .src = MSM_BUS_MASTER_MDP_PORT0,
1160 .dst = MSM_BUS_SLAVE_EBI_CH0,
1161 .ab = 230400000,
1162 .ib = 288000000,
1163 },
1164};
1165
1166static struct msm_bus_vectors mdp_1080p_vectors[] = {
1167 /* 1080p and less video */
1168 {
1169 .src = MSM_BUS_MASTER_MDP_PORT0,
1170 .dst = MSM_BUS_SLAVE_EBI_CH0,
1171 .ab = 334080000,
1172 .ib = 417600000,
1173 },
1174 /* Master and slaves can be from different fabrics */
1175 {
1176 .src = MSM_BUS_MASTER_MDP_PORT0,
1177 .dst = MSM_BUS_SLAVE_EBI_CH0,
1178 .ab = 334080000,
1179 .ib = 417600000,
1180 },
1181};
1182
1183static struct msm_bus_vectors mdp_rgb_vectors[] = {
1184 /* RGB playing on VG or RGB pipe, might be on EBI */
1185 {
1186 .src = MSM_BUS_MASTER_MDP_PORT0,
1187 .dst = MSM_BUS_SLAVE_EBI_CH0,
1188 .ab = 334080000,
1189 .ib = 417600000,
1190 },
1191 /* FB on EBI, request for EBI too*/
1192 {
1193 .src = MSM_BUS_MASTER_MDP_PORT0,
1194 .dst = MSM_BUS_SLAVE_EBI_CH0,
1195 .ab = 334080000,
1196 .ib = 417600000,
1197 },
1198};
1199
1200static struct msm_bus_paths mdp_bus_scale_usecases[] = {
1201 {
1202 ARRAY_SIZE(mdp_init_vectors),
1203 mdp_init_vectors,
1204 },
1205 {
1206 ARRAY_SIZE(mdp_vga_vectors),
1207 mdp_vga_vectors,
1208 },
1209 {
1210 ARRAY_SIZE(mdp_720p_vectors),
1211 mdp_720p_vectors,
1212 },
1213 {
1214 ARRAY_SIZE(mdp_1080p_vectors),
1215 mdp_1080p_vectors,
1216 },
1217 {
1218 ARRAY_SIZE(mdp_rgb_vectors),
1219 mdp_rgb_vectors,
1220 },
1221};
1222
1223static struct msm_bus_scale_pdata mdp_bus_scale_pdata = {
1224 mdp_bus_scale_usecases,
1225 ARRAY_SIZE(mdp_bus_scale_usecases),
1226 .name = "mdp",
1227};
1228
1229#endif
1230
1231int mdp_core_clk_rate_table[] = {
1232 85330000,
1233 85330000,
1234 128000000,
1235 200000000,
1236 200000000,
1237};
1238
1239static struct msm_panel_common_pdata mdp_pdata = {
1240 .gpio = MDP_VSYNC_GPIO,
1241 .mdp_core_clk_rate = 85330000,
1242 .mdp_core_clk_table = mdp_core_clk_rate_table,
1243 .num_mdp_clk = ARRAY_SIZE(mdp_core_clk_rate_table),
1244#ifdef CONFIG_MSM_BUS_SCALING
1245 .mdp_bus_scale_table = &mdp_bus_scale_pdata,
1246#endif
1247 .mdp_rev = MDP_REV_42,
1248};
1249
1250static struct platform_device mipi_dsi_renesas_panel_device = {
1251 .name = "mipi_renesas",
1252 .id = 0,
1253};
1254
1255static struct platform_device mipi_dsi_simulator_panel_device = {
1256 .name = "mipi_simulator",
1257 .id = 0,
1258};
1259
1260static struct platform_device mipi_dsi_toshiba_panel_device = {
1261 .name = "mipi_toshiba",
1262 .id = 0,
1263};
1264
1265#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
1266static struct resource hdmi_msm_resources[] = {
1267 {
1268 .name = "hdmi_msm_qfprom_addr",
1269 .start = 0x00700000,
1270 .end = 0x007060FF,
1271 .flags = IORESOURCE_MEM,
1272 },
1273 {
1274 .name = "hdmi_msm_hdmi_addr",
1275 .start = 0x04A00000,
1276 .end = 0x04A00FFF,
1277 .flags = IORESOURCE_MEM,
1278 },
1279 {
1280 .name = "hdmi_msm_irq",
1281 .start = HDMI_IRQ,
1282 .end = HDMI_IRQ,
1283 .flags = IORESOURCE_IRQ,
1284 },
1285};
1286
1287static int hdmi_enable_5v(int on);
1288static int hdmi_core_power(int on, int show);
1289static int hdmi_cec_power(int on);
1290
1291static struct msm_hdmi_platform_data hdmi_msm_data = {
1292 .irq = HDMI_IRQ,
1293 .enable_5v = hdmi_enable_5v,
1294 .core_power = hdmi_core_power,
1295 .cec_power = hdmi_cec_power,
1296};
1297
1298static struct platform_device hdmi_msm_device = {
1299 .name = "hdmi_msm",
1300 .id = 0,
1301 .num_resources = ARRAY_SIZE(hdmi_msm_resources),
1302 .resource = hdmi_msm_resources,
1303 .dev.platform_data = &hdmi_msm_data,
1304};
1305#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
1306
1307static void __init msm_fb_add_devices(void)
1308{
1309 if (machine_is_msm8x60_rumi3()) {
1310 msm_fb_register_device("mdp", NULL);
1311 mipi_dsi_pdata.target_type = 1;
1312 } else
1313 msm_fb_register_device("mdp", &mdp_pdata);
1314 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
1315}
1316
1317#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
1318static struct gpiomux_setting hdmi_suspend_cfg = {
1319 .func = GPIOMUX_FUNC_GPIO,
1320 .drv = GPIOMUX_DRV_2MA,
1321 .pull = GPIOMUX_PULL_DOWN,
1322};
1323
1324static struct gpiomux_setting hdmi_active_1_cfg = {
1325 .func = GPIOMUX_FUNC_1,
1326 .drv = GPIOMUX_DRV_2MA,
1327 .pull = GPIOMUX_PULL_UP,
1328};
1329
1330static struct gpiomux_setting hdmi_active_2_cfg = {
1331 .func = GPIOMUX_FUNC_1,
1332 .drv = GPIOMUX_DRV_2MA,
1333 .pull = GPIOMUX_PULL_DOWN,
1334};
1335
1336static struct msm_gpiomux_config msm8960_hdmi_configs[] __initdata = {
1337 {
1338 .gpio = 99,
1339 .settings = {
1340 [GPIOMUX_ACTIVE] = &hdmi_active_1_cfg,
1341 [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg,
1342 },
1343 },
1344 {
1345 .gpio = 100,
1346 .settings = {
1347 [GPIOMUX_ACTIVE] = &hdmi_active_1_cfg,
1348 [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg,
1349 },
1350 },
1351 {
1352 .gpio = 101,
1353 .settings = {
1354 [GPIOMUX_ACTIVE] = &hdmi_active_1_cfg,
1355 [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg,
1356 },
1357 },
1358 {
1359 .gpio = 102,
1360 .settings = {
1361 [GPIOMUX_ACTIVE] = &hdmi_active_2_cfg,
1362 [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg,
1363 },
1364 },
1365};
1366
1367static int hdmi_enable_5v(int on)
1368{
1369 /* TBD: PM8921 regulator instead of 8901 */
1370 static struct regulator *reg_8921_hdmi_mvs; /* HDMI_5V */
1371 static int prev_on;
1372 int rc;
1373
1374 if (on == prev_on)
1375 return 0;
1376
1377 if (!reg_8921_hdmi_mvs)
1378 reg_8921_hdmi_mvs = regulator_get(&hdmi_msm_device.dev,
1379 "hdmi_mvs");
1380
1381 if (on) {
1382 rc = regulator_enable(reg_8921_hdmi_mvs);
1383 if (rc) {
1384 pr_err("'%s' regulator enable failed, rc=%d\n",
1385 "8921_hdmi_mvs", rc);
1386 return rc;
1387 }
1388 pr_debug("%s(on): success\n", __func__);
1389 } else {
1390 rc = regulator_disable(reg_8921_hdmi_mvs);
1391 if (rc)
1392 pr_warning("'%s' regulator disable failed, rc=%d\n",
1393 "8921_hdmi_mvs", rc);
1394 pr_debug("%s(off): success\n", __func__);
1395 }
1396
1397 prev_on = on;
1398
1399 return 0;
1400}
1401
1402static int hdmi_core_power(int on, int show)
1403{
1404 static struct regulator *reg_8921_l23, *reg_8921_s4;
1405 static int prev_on;
1406 int rc;
1407
1408 if (on == prev_on)
1409 return 0;
1410
1411 /* TBD: PM8921 regulator instead of 8901 */
1412 if (!reg_8921_l23)
1413 reg_8921_l23 = regulator_get(&hdmi_msm_device.dev, "hdmi_avdd");
1414
1415 if (!reg_8921_s4)
1416 reg_8921_s4 = regulator_get(&hdmi_msm_device.dev, "hdmi_vcc");
1417
1418 if (on) {
1419 rc = regulator_set_optimum_mode(reg_8921_l23, 100000);
1420 if (rc < 0) {
1421 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
1422 return -EINVAL;
1423 }
1424
1425 rc = regulator_set_voltage(reg_8921_l23, 1800000, 1800000);
1426 if (!rc)
1427 rc = regulator_enable(reg_8921_l23);
1428 if (rc) {
1429 pr_err("'%s' regulator enable failed, rc=%d\n",
1430 "hdmi_avdd", rc);
1431 return rc;
1432 }
1433 rc = regulator_set_voltage(reg_8921_s4, 1800000, 1800000);
1434 if (!rc)
1435 rc = regulator_enable(reg_8921_s4);
1436 if (rc) {
1437 pr_err("'%s' regulator enable failed, rc=%d\n",
1438 "hdmi_vcc", rc);
1439 return rc;
1440 }
1441
1442 rc = gpio_request(100, "HDMI_DDC_CLK");
1443 if (rc) {
1444 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
1445 "HDMI_DDC_CLK", 100, rc);
1446 goto error1;
1447 }
1448 rc = gpio_request(101, "HDMI_DDC_DATA");
1449 if (rc) {
1450 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
1451 "HDMI_DDC_DATA", 101, rc);
1452 goto error2;
1453 }
1454 rc = gpio_request(102, "HDMI_HPD");
1455 if (rc) {
1456 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
1457 "HDMI_HPD", 102, rc);
1458 goto error3;
1459 }
1460 pr_debug("%s(on): success\n", __func__);
1461 } else {
1462 gpio_free(100);
1463 gpio_free(101);
1464 gpio_free(102);
1465
1466 rc = regulator_set_optimum_mode(reg_8921_l23, 100);
1467 if (rc < 0) {
1468 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
1469 return -EINVAL;
1470 }
1471
1472 pr_debug("%s(off): success\n", __func__);
1473 }
1474
1475 prev_on = on;
1476
1477 return 0;
1478
1479error3:
1480 gpio_free(101);
1481error2:
1482 gpio_free(100);
1483error1:
1484 regulator_disable(reg_8921_l23);
1485 return rc;
1486}
1487
1488static int hdmi_cec_power(int on)
1489{
1490 static int prev_on;
1491 int rc;
1492
1493 if (on == prev_on)
1494 return 0;
1495
1496 if (on) {
1497 rc = gpio_request(99, "HDMI_CEC_VAR");
1498 if (rc) {
1499 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
1500 "HDMI_CEC_VAR", 99, rc);
1501 goto error;
1502 }
1503 pr_debug("%s(on): success\n", __func__);
1504 } else {
1505 gpio_free(99);
1506 pr_debug("%s(off): success\n", __func__);
1507 }
1508
1509 prev_on = on;
1510
1511 return 0;
1512error:
1513 return rc;
1514}
1515#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
1516
1517static void __init msm8960_allocate_memory_regions(void)
1518{
1519 void *addr;
1520 unsigned long size;
1521
1522 size = MSM_FB_SIZE;
1523 addr = alloc_bootmem_align(size, 0x1000);
1524 msm_fb_resources[0].start = __pa(addr);
1525 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
1526 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
1527 size, addr, __pa(addr));
1528
1529}
1530#ifdef CONFIG_WCD9310_CODEC
1531
1532#define TABLA_INTERRUPT_BASE (NR_MSM_IRQS + NR_GPIO_IRQS + NR_PM8921_IRQS)
1533
1534static struct tabla_pdata tabla_platform_data = {
1535 .slimbus_slave_device = {
1536 .name = "tabla-slave",
1537 .e_addr = {0, 0, 0x10, 0, 0x17, 2},
1538 },
1539 .irq = MSM_GPIO_TO_INT(62),
1540 .irq_base = TABLA_INTERRUPT_BASE,
1541 .num_irqs = NR_TABLA_IRQS,
1542 .reset_gpio = PM8921_GPIO_PM_TO_SYS(34),
1543};
1544
1545static struct slim_device msm_slim_tabla = {
1546 .name = "tabla-slim",
1547 .e_addr = {0, 1, 0x10, 0, 0x17, 2},
1548 .dev = {
1549 .platform_data = &tabla_platform_data,
1550 },
1551};
1552#endif
1553
1554static struct slim_boardinfo msm_slim_devices[] = {
1555#ifdef CONFIG_WCD9310_CODEC
1556 {
1557 .bus_num = 1,
1558 .slim_slave = &msm_slim_tabla,
1559 },
1560#endif
1561 /* add more slimbus slaves as needed */
1562};
1563
1564#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
1565 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE) || \
1566 defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
1567 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
1568
1569#define QCE_SIZE 0x10000
1570#define QCE_0_BASE 0x18500000
1571
1572#define QCE_HW_KEY_SUPPORT 0
1573#define QCE_SHA_HMAC_SUPPORT 1
1574#define QCE_SHARE_CE_RESOURCE 1
1575#define QCE_CE_SHARED 0
1576
1577static struct resource qcrypto_resources[] = {
1578 [0] = {
1579 .start = QCE_0_BASE,
1580 .end = QCE_0_BASE + QCE_SIZE - 1,
1581 .flags = IORESOURCE_MEM,
1582 },
1583 [1] = {
1584 .name = "crypto_channels",
1585 .start = DMOV_CE_IN_CHAN,
1586 .end = DMOV_CE_OUT_CHAN,
1587 .flags = IORESOURCE_DMA,
1588 },
1589 [2] = {
1590 .name = "crypto_crci_in",
1591 .start = DMOV_CE_IN_CRCI,
1592 .end = DMOV_CE_IN_CRCI,
1593 .flags = IORESOURCE_DMA,
1594 },
1595 [3] = {
1596 .name = "crypto_crci_out",
1597 .start = DMOV_CE_OUT_CRCI,
1598 .end = DMOV_CE_OUT_CRCI,
1599 .flags = IORESOURCE_DMA,
1600 },
1601};
1602
1603static struct resource qcedev_resources[] = {
1604 [0] = {
1605 .start = QCE_0_BASE,
1606 .end = QCE_0_BASE + QCE_SIZE - 1,
1607 .flags = IORESOURCE_MEM,
1608 },
1609 [1] = {
1610 .name = "crypto_channels",
1611 .start = DMOV_CE_IN_CHAN,
1612 .end = DMOV_CE_OUT_CHAN,
1613 .flags = IORESOURCE_DMA,
1614 },
1615 [2] = {
1616 .name = "crypto_crci_in",
1617 .start = DMOV_CE_IN_CRCI,
1618 .end = DMOV_CE_IN_CRCI,
1619 .flags = IORESOURCE_DMA,
1620 },
1621 [3] = {
1622 .name = "crypto_crci_out",
1623 .start = DMOV_CE_OUT_CRCI,
1624 .end = DMOV_CE_OUT_CRCI,
1625 .flags = IORESOURCE_DMA,
1626 },
1627};
1628
1629#endif
1630
1631#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
1632 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
1633
1634static struct msm_ce_hw_support qcrypto_ce_hw_suppport = {
1635 .ce_shared = QCE_CE_SHARED,
1636 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
1637 .hw_key_support = QCE_HW_KEY_SUPPORT,
1638 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
1639};
1640
1641static struct platform_device qcrypto_device = {
1642 .name = "qcrypto",
1643 .id = 0,
1644 .num_resources = ARRAY_SIZE(qcrypto_resources),
1645 .resource = qcrypto_resources,
1646 .dev = {
1647 .coherent_dma_mask = DMA_BIT_MASK(32),
1648 .platform_data = &qcrypto_ce_hw_suppport,
1649 },
1650};
1651#endif
1652
1653#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
1654 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
1655
1656static struct msm_ce_hw_support qcedev_ce_hw_suppport = {
1657 .ce_shared = QCE_CE_SHARED,
1658 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
1659 .hw_key_support = QCE_HW_KEY_SUPPORT,
1660 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
1661};
1662
1663static struct platform_device qcedev_device = {
1664 .name = "qce",
1665 .id = 0,
1666 .num_resources = ARRAY_SIZE(qcedev_resources),
1667 .resource = qcedev_resources,
1668 .dev = {
1669 .coherent_dma_mask = DMA_BIT_MASK(32),
1670 .platform_data = &qcedev_ce_hw_suppport,
1671 },
1672};
1673#endif
1674
1675
1676static int __init gpiomux_init(void)
1677{
1678 int rc;
1679
1680 rc = msm_gpiomux_init(NR_GPIO_IRQS);
1681 if (rc) {
1682 pr_err(KERN_ERR "msm_gpiomux_init failed %d\n", rc);
1683 return rc;
1684 }
1685
1686 msm_gpiomux_install(msm8960_cam_configs,
1687 ARRAY_SIZE(msm8960_cam_configs));
1688
1689 msm_gpiomux_install(msm8960_gpiomux_configs,
1690 ARRAY_SIZE(msm8960_gsbi_configs));
1691
1692 msm_gpiomux_install(msm8960_gsbi_configs,
1693 ARRAY_SIZE(msm8960_gsbi_configs));
1694
1695 msm_gpiomux_install(msm8960_cyts_configs,
1696 ARRAY_SIZE(msm8960_cyts_configs));
1697
1698 msm_gpiomux_install(msm8960_slimbus_config,
1699 ARRAY_SIZE(msm8960_slimbus_config));
1700
1701 msm_gpiomux_install(msm8960_audio_codec_configs,
1702 ARRAY_SIZE(msm8960_audio_codec_configs));
1703
1704#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
1705 msm_gpiomux_install(msm8960_hdmi_configs,
1706 ARRAY_SIZE(msm8960_hdmi_configs));
1707#endif
1708
1709 msm_gpiomux_install(wcnss_5wire_interface,
1710 ARRAY_SIZE(wcnss_5wire_interface));
1711
1712 return 0;
1713}
1714
1715static struct msm_acpu_clock_platform_data msm8960_acpu_clock_data = {
1716 .acpu_switch_time_us = 0,
1717 .vdd_switch_time_us = 0,
1718};
1719
1720#define MSM_SHARED_RAM_PHYS 0x80000000
1721
1722static struct pm8921_adc_amux pm8921_adc_channels_data[] = {
1723 {"vcoin", CHANNEL_VCOIN, CHAN_PATH_SCALING2, AMUX_RSV1,
1724 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1725 {"vbat", CHANNEL_VBAT, CHAN_PATH_SCALING2, AMUX_RSV1,
1726 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1727 {"dcin", CHANNEL_DCIN, CHAN_PATH_SCALING4, AMUX_RSV1,
1728 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1729 {"ichg", CHANNEL_ICHG, CHAN_PATH_SCALING1, AMUX_RSV1,
1730 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1731 {"vph_pwr", CHANNEL_VPH_PWR, CHAN_PATH_SCALING2, AMUX_RSV1,
1732 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1733 {"ibat", CHANNEL_IBAT, CHAN_PATH_SCALING1, AMUX_RSV1,
1734 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1735 {"m4", CHANNEL_MPP_1, CHAN_PATH_SCALING1, AMUX_RSV1,
1736 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1737 {"m5", CHANNEL_MPP_2, CHAN_PATH_SCALING2, AMUX_RSV1,
1738 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1739 {"batt_therm", CHANNEL_BATT_THERM, CHAN_PATH_SCALING1, AMUX_RSV2,
1740 ADC_DECIMATION_TYPE2, ADC_SCALE_BATT_THERM},
1741 {"batt_id", CHANNEL_BATT_ID, CHAN_PATH_SCALING1, AMUX_RSV1,
1742 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1743 {"usbin", CHANNEL_USBIN, CHAN_PATH_SCALING3, AMUX_RSV1,
1744 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1745 {"pmic_therm", CHANNEL_DIE_TEMP, CHAN_PATH_SCALING1, AMUX_RSV1,
1746 ADC_DECIMATION_TYPE2, ADC_SCALE_PMIC_THERM},
1747 {"625mv", CHANNEL_625MV, CHAN_PATH_SCALING1, AMUX_RSV1,
1748 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1749 {"125v", CHANNEL_125V, CHAN_PATH_SCALING1, AMUX_RSV1,
1750 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1751 {"chg_temp", CHANNEL_CHG_TEMP, CHAN_PATH_SCALING1, AMUX_RSV1,
1752 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
1753};
1754
1755static struct pm8921_adc_properties pm8921_adc_data = {
1756 .adc_vdd_reference = 1800, /* milli-voltage for this adc */
1757 .bitresolution = 15,
1758 .bipolar = 0,
1759};
1760
1761static struct pm8921_adc_platform_data pm8921_adc_pdata = {
1762 .adc_channel = pm8921_adc_channels_data,
1763 .adc_num_channel = ARRAY_SIZE(pm8921_adc_channels_data),
1764 .adc_prop = &pm8921_adc_data,
1765};
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08001766
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08001767static void __init msm8960_map_io(void)
1768{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001769 msm_shared_ram_phys = MSM_SHARED_RAM_PHYS;
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08001770 msm_map_msm8960_io();
1771}
1772
1773static void __init msm8960_init_irq(void)
1774{
1775 unsigned int i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001776
1777 msm_mpm_irq_extn_init();
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08001778 gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001779 (void *)MSM_QGIC_CPU_BASE);
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08001780
1781 /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001782 writel_relaxed(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08001783
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001784 writel_relaxed(0x0000FFFF, MSM_QGIC_DIST_BASE + GIC_DIST_ENABLE_SET);
1785 mb();
Stepan Moskovchenko50ede4e2010-12-13 18:12:19 -08001786
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08001787 /* FIXME: Not installing AVS_SVICINT and AVS_SVICINTSWDONE yet
1788 * as they are configured as level, which does not play nice with
1789 * handle_percpu_irq.
1790 */
1791 for (i = GIC_PPI_START; i < GIC_SPI_START; i++) {
1792 if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE)
Thomas Gleixner6845664a2011-03-24 13:25:22 +01001793 irq_set_handler(i, handle_percpu_irq);
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08001794 }
1795}
1796
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001797/* MSM8960 have 5 SDCC controllers */
1798enum sdcc_controllers {
1799 SDCC1,
1800 SDCC2,
1801 SDCC3,
1802 SDCC4,
1803 SDCC5,
1804 MAX_SDCC_CONTROLLER
1805};
1806
1807/* All SDCC controllers requires VDD/VCC voltage */
1808static struct msm_mmc_reg_data mmc_vdd_reg_data[MAX_SDCC_CONTROLLER] = {
1809 /* SDCC1 : eMMC card connected */
1810 [SDCC1] = {
1811 .name = "sdc_vdd",
1812 .set_voltage_sup = 1,
1813 .level = 2950000,
1814 .always_on = 1,
1815 .lpm_sup = 1,
1816 .lpm_uA = 9000,
1817 .hpm_uA = 200000, /* 200mA */
1818 },
1819 /* SDCC3 : External card slot connected */
1820 [SDCC3] = {
1821 .name = "sdc_vdd",
1822 .set_voltage_sup = 1,
1823 .level = 2950000,
1824 .hpm_uA = 600000, /* 600mA */
1825 }
1826};
1827
1828/* Only slots having eMMC card will require VCCQ voltage */
1829static struct msm_mmc_reg_data mmc_vccq_reg_data[1] = {
1830 /* SDCC1 : eMMC card connected */
1831 [SDCC1] = {
1832 .name = "sdc_vccq",
1833 .set_voltage_sup = 1,
1834 .always_on = 1,
1835 .level = 1800000,
1836 .hpm_uA = 200000, /* 200mA */
1837 }
1838};
1839
1840/* All SDCC controllers may require voting for VDD PAD voltage */
1841static struct msm_mmc_reg_data mmc_vddp_reg_data[MAX_SDCC_CONTROLLER] = {
1842 /* SDCC3 : External card slot connected */
1843 [SDCC3] = {
1844 .name = "sdc_vddp",
1845 .set_voltage_sup = 1,
1846 .level = 2950000,
1847 .always_on = 1,
1848 .lpm_sup = 1,
1849 /* Max. Active current required is 16 mA */
1850 .hpm_uA = 16000,
1851 /*
1852 * Sleep current required is ~300 uA. But min. vote can be
1853 * in terms of mA (min. 1 mA). So let's vote for 2 mA
1854 * during sleep.
1855 */
1856 .lpm_uA = 2000,
1857 }
1858};
1859
1860static struct msm_mmc_slot_reg_data mmc_slot_vreg_data[MAX_SDCC_CONTROLLER] = {
1861 /* SDCC1 : eMMC card connected */
1862 [SDCC1] = {
1863 .vdd_data = &mmc_vdd_reg_data[SDCC1],
1864 .vccq_data = &mmc_vccq_reg_data[SDCC1],
1865 },
1866 /* SDCC3 : External card slot connected */
1867 [SDCC3] = {
1868 .vdd_data = &mmc_vdd_reg_data[SDCC3],
1869 .vddp_data = &mmc_vddp_reg_data[SDCC3],
1870 }
1871};
1872
1873/* SDC1 pad data */
1874static struct msm_mmc_pad_drv sdc1_pad_drv_on_cfg[] = {
1875 {TLMM_HDRV_SDC1_CLK, GPIO_CFG_16MA},
1876 {TLMM_HDRV_SDC1_CMD, GPIO_CFG_10MA},
1877 {TLMM_HDRV_SDC1_DATA, GPIO_CFG_10MA}
1878};
1879
1880static struct msm_mmc_pad_drv sdc1_pad_drv_off_cfg[] = {
1881 {TLMM_HDRV_SDC1_CLK, GPIO_CFG_2MA},
1882 {TLMM_HDRV_SDC1_CMD, GPIO_CFG_2MA},
1883 {TLMM_HDRV_SDC1_DATA, GPIO_CFG_2MA}
1884};
1885
1886static struct msm_mmc_pad_pull sdc1_pad_pull_on_cfg[] = {
1887 {TLMM_PULL_SDC1_CMD, GPIO_CFG_PULL_UP},
1888 {TLMM_PULL_SDC1_DATA, GPIO_CFG_PULL_UP}
1889};
1890
1891static struct msm_mmc_pad_pull sdc1_pad_pull_off_cfg[] = {
1892 {TLMM_PULL_SDC1_CMD, GPIO_CFG_PULL_DOWN},
1893 {TLMM_PULL_SDC1_DATA, GPIO_CFG_PULL_DOWN}
1894};
1895
1896/* SDC3 pad data */
1897static struct msm_mmc_pad_drv sdc3_pad_drv_on_cfg[] = {
1898 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_8MA},
1899 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_8MA},
1900 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_8MA}
1901};
1902
1903static struct msm_mmc_pad_drv sdc3_pad_drv_off_cfg[] = {
1904 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_2MA},
1905 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_2MA},
1906 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_2MA}
1907};
1908
1909static struct msm_mmc_pad_pull sdc3_pad_pull_on_cfg[] = {
1910 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_UP},
1911 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_UP}
1912};
1913
1914static struct msm_mmc_pad_pull sdc3_pad_pull_off_cfg[] = {
1915 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_DOWN},
1916 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_DOWN}
1917};
1918
1919struct msm_mmc_pad_pull_data mmc_pad_pull_data[MAX_SDCC_CONTROLLER] = {
1920 [SDCC1] = {
1921 .on = sdc1_pad_pull_on_cfg,
1922 .off = sdc1_pad_pull_off_cfg,
1923 .size = ARRAY_SIZE(sdc1_pad_pull_on_cfg)
1924 },
1925 [SDCC3] = {
1926 .on = sdc3_pad_pull_on_cfg,
1927 .off = sdc3_pad_pull_off_cfg,
1928 .size = ARRAY_SIZE(sdc3_pad_pull_on_cfg)
1929 },
1930};
1931
1932struct msm_mmc_pad_drv_data mmc_pad_drv_data[MAX_SDCC_CONTROLLER] = {
1933 [SDCC1] = {
1934 .on = sdc1_pad_drv_on_cfg,
1935 .off = sdc1_pad_drv_off_cfg,
1936 .size = ARRAY_SIZE(sdc1_pad_drv_on_cfg)
1937 },
1938 [SDCC3] = {
1939 .on = sdc3_pad_drv_on_cfg,
1940 .off = sdc3_pad_drv_off_cfg,
1941 .size = ARRAY_SIZE(sdc3_pad_drv_on_cfg)
1942 },
1943};
1944
1945struct msm_mmc_pad_data mmc_pad_data[MAX_SDCC_CONTROLLER] = {
1946 [SDCC1] = {
1947 .pull = &mmc_pad_pull_data[SDCC1],
1948 .drv = &mmc_pad_drv_data[SDCC1]
1949 },
1950 [SDCC3] = {
1951 .pull = &mmc_pad_pull_data[SDCC3],
1952 .drv = &mmc_pad_drv_data[SDCC3]
1953 },
1954};
1955
1956struct msm_mmc_pin_data mmc_slot_pin_data[MAX_SDCC_CONTROLLER] = {
1957 [SDCC1] = {
1958 .pad_data = &mmc_pad_data[SDCC1],
1959 },
1960 [SDCC3] = {
1961 .pad_data = &mmc_pad_data[SDCC3],
1962 },
1963};
1964
1965static unsigned int sdc1_sup_clk_rates[] = {
1966 400000, 24000000, 48000000
1967};
1968
1969static unsigned int sdc3_sup_clk_rates[] = {
1970 400000, 24000000, 48000000, 96000000
1971};
1972
1973#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
1974static struct mmc_platform_data msm8960_sdc1_data = {
1975 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
1976#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT
1977 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
1978#else
1979 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1980#endif
1981 .sup_clk_table = sdc1_sup_clk_rates,
1982 .sup_clk_cnt = ARRAY_SIZE(sdc1_sup_clk_rates),
1983 .nonremovable = 1,
1984 .sdcc_v4_sup = true,
1985 .vreg_data = &mmc_slot_vreg_data[SDCC1],
1986 .pin_data = &mmc_slot_pin_data[SDCC1]
1987};
1988#endif
1989
1990#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
1991static struct mmc_platform_data msm8960_sdc3_data = {
1992 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
1993 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1994 .sup_clk_table = sdc3_sup_clk_rates,
1995 .sup_clk_cnt = ARRAY_SIZE(sdc3_sup_clk_rates),
1996 .wpswitch_gpio = PM8921_GPIO_PM_TO_SYS(16),
1997 .sdcc_v4_sup = true,
1998 .vreg_data = &mmc_slot_vreg_data[SDCC3],
1999 .pin_data = &mmc_slot_pin_data[SDCC3],
2000#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
2001 .status_gpio = PM8921_GPIO_PM_TO_SYS(26),
2002 .status_irq = PM8921_GPIO_IRQ(PM8921_IRQ_BASE, 26),
2003 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
2004#endif
2005 .xpc_cap = 1,
2006 .uhs_caps = (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 |
2007 MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_DDR50 |
2008 MMC_CAP_MAX_CURRENT_600)
2009};
2010#endif
2011
2012static void __init msm8960_init_mmc(void)
2013{
2014#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
2015 /* SDC1 : eMMC card connected */
2016 msm_add_sdcc(1, &msm8960_sdc1_data);
2017#endif
2018#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
2019 /* SDC3: External card slot */
2020 msm_add_sdcc(3, &msm8960_sdc3_data);
2021#endif
2022}
2023
2024static void __init msm8960_init_buses(void)
2025{
2026#ifdef CONFIG_MSM_BUS_SCALING
2027 msm_bus_apps_fabric_pdata.rpm_enabled = 1;
2028 msm_bus_sys_fabric_pdata.rpm_enabled = 1;
2029 msm_bus_mm_fabric_pdata.rpm_enabled = 1;
2030 msm_bus_sys_fpb_pdata.rpm_enabled = 1;
2031 msm_bus_cpss_fpb_pdata.rpm_enabled = 1;
2032 msm_bus_apps_fabric.dev.platform_data = &msm_bus_apps_fabric_pdata;
2033 msm_bus_sys_fabric.dev.platform_data = &msm_bus_sys_fabric_pdata;
2034 msm_bus_mm_fabric.dev.platform_data = &msm_bus_mm_fabric_pdata;
2035 msm_bus_sys_fpb.dev.platform_data = &msm_bus_sys_fpb_pdata;
2036 msm_bus_cpss_fpb.dev.platform_data = &msm_bus_cpss_fpb_pdata;
2037#endif
2038}
2039
2040static struct msm_spi_platform_data msm8960_qup_spi_gsbi1_pdata = {
2041 .max_clock_speed = 15060000,
2042};
2043
2044#ifdef CONFIG_USB_MSM_OTG_72K
2045static struct msm_otg_platform_data msm_otg_pdata;
2046#else
2047#define USB_5V_EN 42
2048static void msm_hsusb_vbus_power(bool on)
2049{
2050 int rc;
2051 static bool vbus_is_on;
2052 static struct regulator *mvs_otg_switch;
2053 struct pm_gpio param = {
2054 .direction = PM_GPIO_DIR_OUT,
2055 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
2056 .output_value = 1,
2057 .pull = PM_GPIO_PULL_NO,
2058 .vin_sel = PM_GPIO_VIN_S4,
2059 .out_strength = PM_GPIO_STRENGTH_MED,
2060 .function = PM_GPIO_FUNC_NORMAL,
2061 };
2062
2063 if (vbus_is_on == on)
2064 return;
2065
2066 if (on) {
2067 mvs_otg_switch = regulator_get(&msm_device_otg.dev, "vbus_otg");
2068 if (IS_ERR(mvs_otg_switch)) {
2069 pr_err("Unable to get mvs_otg_switch\n");
2070 return;
2071 }
2072
2073 rc = gpio_request(PM8921_GPIO_PM_TO_SYS(USB_5V_EN),
2074 "usb_5v_en");
2075 if (rc < 0) {
2076 pr_err("failed to request usb_5v_en gpio\n");
2077 goto put_mvs_otg;
2078 }
2079
2080 if (regulator_enable(mvs_otg_switch)) {
2081 pr_err("unable to enable mvs_otg_switch\n");
2082 goto free_usb_5v_en;
2083 }
2084
2085 rc = pm8xxx_gpio_config(PM8921_GPIO_PM_TO_SYS(USB_5V_EN),
2086 &param);
2087 if (rc < 0) {
2088 pr_err("failed to configure usb_5v_en gpio\n");
2089 goto disable_mvs_otg;
2090 }
2091 vbus_is_on = true;
2092 return;
2093 }
2094disable_mvs_otg:
2095 regulator_disable(mvs_otg_switch);
2096free_usb_5v_en:
2097 gpio_free(PM8921_GPIO_PM_TO_SYS(USB_5V_EN));
2098put_mvs_otg:
2099 regulator_put(mvs_otg_switch);
2100 vbus_is_on = false;
2101}
2102
2103static struct msm_otg_platform_data msm_otg_pdata = {
2104 .mode = USB_OTG,
2105 .otg_control = OTG_PMIC_CONTROL,
2106 .phy_type = SNPS_28NM_INTEGRATED_PHY,
2107 .pclk_src_name = "dfab_usb_hs_clk",
2108 .pmic_id_irq = PM8921_USB_ID_IN_IRQ(PM8921_IRQ_BASE),
2109 .vbus_power = msm_hsusb_vbus_power,
2110};
2111#endif
2112
2113#define PID_MAGIC_ID 0x71432909
2114#define SERIAL_NUM_MAGIC_ID 0x61945374
2115#define SERIAL_NUMBER_LENGTH 127
2116#define DLOAD_USB_BASE_ADD 0x2A03F0C8
2117
2118struct magic_num_struct {
2119 uint32_t pid;
2120 uint32_t serial_num;
2121};
2122
2123struct dload_struct {
2124 uint32_t reserved1;
2125 uint32_t reserved2;
2126 uint32_t reserved3;
2127 uint16_t reserved4;
2128 uint16_t pid;
2129 char serial_number[SERIAL_NUMBER_LENGTH];
2130 uint16_t reserved5;
2131 struct magic_num_struct magic_struct;
2132};
2133
2134static int usb_diag_update_pid_and_serial_num(uint32_t pid, const char *snum)
2135{
2136 struct dload_struct __iomem *dload = 0;
2137
2138 dload = ioremap(DLOAD_USB_BASE_ADD, sizeof(*dload));
2139 if (!dload) {
2140 pr_err("%s: cannot remap I/O memory region: %08x\n",
2141 __func__, DLOAD_USB_BASE_ADD);
2142 return -ENXIO;
2143 }
2144
2145 pr_debug("%s: dload:%p pid:%x serial_num:%s\n",
2146 __func__, dload, pid, snum);
2147 /* update pid */
2148 dload->magic_struct.pid = PID_MAGIC_ID;
2149 dload->pid = pid;
2150
2151 /* update serial number */
2152 dload->magic_struct.serial_num = 0;
2153 if (!snum) {
2154 memset(dload->serial_number, 0, SERIAL_NUMBER_LENGTH);
2155 goto out;
2156 }
2157
2158 dload->magic_struct.serial_num = SERIAL_NUM_MAGIC_ID;
2159 strncpy(dload->serial_number, snum, SERIAL_NUMBER_LENGTH);
2160 dload->serial_number[SERIAL_NUMBER_LENGTH - 1] = '\0';
2161out:
2162 iounmap(dload);
2163 return 0;
2164}
2165
2166static struct android_usb_platform_data android_usb_pdata = {
2167 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
2168};
2169
2170struct platform_device android_usb_device = {
2171 .name = "android_usb",
2172 .id = -1,
2173 .dev = {
2174 .platform_data = &android_usb_pdata,
2175 },
2176};
2177
2178static uint8_t spm_wfi_cmd_sequence[] __initdata = {
2179 0x03, 0x0f,
2180};
2181
2182static uint8_t spm_power_collapse_without_rpm[] __initdata = {
2183 0x00, 0x24, 0x54, 0x10,
2184 0x09, 0x03, 0x01,
2185 0x10, 0x54, 0x30, 0x0C,
2186 0x24, 0x30, 0x0f,
2187};
2188
2189static uint8_t spm_power_collapse_with_rpm[] __initdata = {
2190 0x00, 0x24, 0x54, 0x10,
2191 0x09, 0x07, 0x01, 0x0B,
2192 0x10, 0x54, 0x30, 0x0C,
2193 0x24, 0x30, 0x0f,
2194};
2195
2196static struct msm_spm_seq_entry msm_spm_seq_list[] __initdata = {
2197 [0] = {
2198 .mode = MSM_SPM_MODE_CLOCK_GATING,
2199 .notify_rpm = false,
2200 .cmd = spm_wfi_cmd_sequence,
2201 },
2202 [1] = {
2203 .mode = MSM_SPM_MODE_POWER_COLLAPSE,
2204 .notify_rpm = false,
2205 .cmd = spm_power_collapse_without_rpm,
2206 },
2207 [2] = {
2208 .mode = MSM_SPM_MODE_POWER_COLLAPSE,
2209 .notify_rpm = true,
2210 .cmd = spm_power_collapse_with_rpm,
2211 },
2212};
2213
2214static struct msm_spm_platform_data msm_spm_data[] __initdata = {
2215 [0] = {
2216 .reg_base_addr = MSM_SAW0_BASE,
2217 .reg_init_values[MSM_SPM_REG_SAW2_SECURE] = 0x00,
2218 .reg_init_values[MSM_SPM_REG_SAW2_CFG] = 0x1F,
2219 .reg_init_values[MSM_SPM_REG_SAW2_VCTL] = 0x9C,
2220#if defined(CONFIG_MSM_AVS_HW)
2221 .reg_init_values[MSM_SPM_REG_SAW2_AVS_CTL] = 0x00,
2222 .reg_init_values[MSM_SPM_REG_SAW2_AVS_HYSTERESIS] = 0x00,
2223#endif
2224 .reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x01,
2225 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020202,
2226 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x0060009C,
2227 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x0000001C,
2228 .vctl_timeout_us = 50,
2229 .num_modes = ARRAY_SIZE(msm_spm_seq_list),
2230 .modes = msm_spm_seq_list,
2231 },
2232 [1] = {
2233 .reg_base_addr = MSM_SAW1_BASE,
2234 .reg_init_values[MSM_SPM_REG_SAW2_SECURE] = 0x00,
2235 .reg_init_values[MSM_SPM_REG_SAW2_CFG] = 0x1F,
2236 .reg_init_values[MSM_SPM_REG_SAW2_VCTL] = 0x9C,
2237#if defined(CONFIG_MSM_AVS_HW)
2238 .reg_init_values[MSM_SPM_REG_SAW2_AVS_CTL] = 0x00,
2239 .reg_init_values[MSM_SPM_REG_SAW2_AVS_HYSTERESIS] = 0x00,
2240#endif
2241 .reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x01,
2242 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020202,
2243 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x0060009C,
2244 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x0000001C,
2245 .vctl_timeout_us = 50,
2246 .num_modes = ARRAY_SIZE(msm_spm_seq_list),
2247 .modes = msm_spm_seq_list,
2248 },
2249};
2250
2251static uint8_t l2_spm_wfi_cmd_sequence[] __initdata = {
2252 0x00, 0x20, 0x03, 0x20,
2253 0x00, 0x0f,
2254};
2255
2256static uint8_t l2_spm_gdhs_cmd_sequence[] __initdata = {
2257 0x00, 0x20, 0x34, 0x64,
2258 0x48, 0x07, 0x48, 0x20,
2259 0x50, 0x64, 0x04, 0x34,
2260 0x50, 0x0f,
2261};
2262static uint8_t l2_spm_power_off_cmd_sequence[] __initdata = {
2263 0x00, 0x10, 0x34, 0x64,
2264 0x48, 0x07, 0x48, 0x10,
2265 0x50, 0x64, 0x04, 0x34,
2266 0x50, 0x0F,
2267};
2268
2269static struct msm_spm_seq_entry msm_spm_l2_seq_list[] __initdata = {
2270 [0] = {
2271 .mode = MSM_SPM_L2_MODE_RETENTION,
2272 .notify_rpm = false,
2273 .cmd = l2_spm_wfi_cmd_sequence,
2274 },
2275 [1] = {
2276 .mode = MSM_SPM_L2_MODE_GDHS,
2277 .notify_rpm = true,
2278 .cmd = l2_spm_gdhs_cmd_sequence,
2279 },
2280 [2] = {
2281 .mode = MSM_SPM_L2_MODE_POWER_COLLAPSE,
2282 .notify_rpm = true,
2283 .cmd = l2_spm_power_off_cmd_sequence,
2284 },
2285};
2286
2287
2288static struct msm_spm_platform_data msm_spm_l2_data[] __initdata = {
2289 [0] = {
2290 .reg_base_addr = MSM_SAW_L2_BASE,
2291 .reg_init_values[MSM_SPM_REG_SAW2_SECURE] = 0x00,
2292 .reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x00,
2293 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020202,
2294 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x00A000AE,
2295 .reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x00A00020,
2296 .modes = msm_spm_l2_seq_list,
2297 .num_modes = ARRAY_SIZE(msm_spm_l2_seq_list),
2298 },
2299};
2300
2301#define CYTTSP_TS_GPIO_IRQ 11
2302#define CYTTSP_TS_SLEEP_GPIO 50
2303#define CYTTSP_TS_RESOUT_N_GPIO 52
2304
2305/*virtual key support */
2306static ssize_t tma340_vkeys_show(struct kobject *kobj,
2307 struct kobj_attribute *attr, char *buf)
2308{
2309 return snprintf(buf, 200,
2310 __stringify(EV_KEY) ":" __stringify(KEY_BACK) ":73:1120:97:97"
2311 ":" __stringify(EV_KEY) ":" __stringify(KEY_MENU) ":230:1120:97:97"
2312 ":" __stringify(EV_KEY) ":" __stringify(KEY_HOME) ":389:1120:97:97"
2313 ":" __stringify(EV_KEY) ":" __stringify(KEY_SEARCH) ":544:1120:97:97"
2314 "\n");
2315}
2316
2317static struct kobj_attribute tma340_vkeys_attr = {
2318 .attr = {
2319 .mode = S_IRUGO,
2320 },
2321 .show = &tma340_vkeys_show,
2322};
2323
2324static struct attribute *tma340_properties_attrs[] = {
2325 &tma340_vkeys_attr.attr,
2326 NULL
2327};
2328
2329static struct attribute_group tma340_properties_attr_group = {
2330 .attrs = tma340_properties_attrs,
2331};
2332
2333
2334static int cyttsp_platform_init(struct i2c_client *client)
2335{
2336 int rc = 0;
2337 static struct kobject *tma340_properties_kobj;
2338
2339 tma340_vkeys_attr.attr.name = "virtualkeys.cyttsp-i2c";
2340 tma340_properties_kobj = kobject_create_and_add("board_properties",
2341 NULL);
2342 if (tma340_properties_kobj)
2343 rc = sysfs_create_group(tma340_properties_kobj,
2344 &tma340_properties_attr_group);
2345 if (!tma340_properties_kobj || rc)
2346 pr_err("%s: failed to create board_properties\n",
2347 __func__);
2348
2349 return 0;
2350}
2351
2352static struct cyttsp_regulator regulator_data[] = {
2353 {
2354 .name = "vdd",
2355 .min_uV = CY_TMA300_VTG_MIN_UV,
2356 .max_uV = CY_TMA300_VTG_MAX_UV,
2357 .load_uA = CY_TMA300_CURR_24HZ_UA,
2358 },
2359 /* TODO: Remove after runtime PM is enabled in I2C driver */
2360 {
2361 .name = "vcc_i2c",
2362 .min_uV = CY_I2C_VTG_MIN_UV,
2363 .max_uV = CY_I2C_VTG_MAX_UV,
2364 .load_uA = CY_I2C_CURR_UA,
2365 },
2366};
2367
2368static struct cyttsp_platform_data cyttsp_pdata = {
2369 .panel_maxx = 634,
2370 .panel_maxy = 1166,
2371 .disp_maxx = 616,
2372 .disp_maxy = 1023,
2373 .disp_minx = 0,
2374 .disp_miny = 16,
2375 .flags = 0x01,
2376 .gen = CY_GEN3, /* or */
2377 .use_st = CY_USE_ST,
2378 .use_mt = CY_USE_MT,
2379 .use_hndshk = CY_SEND_HNDSHK,
2380 .use_trk_id = CY_USE_TRACKING_ID,
2381 .use_sleep = CY_USE_SLEEP,
2382 .use_gestures = CY_USE_GESTURES,
2383 .fw_fname = "cyttsp_8960_cdp.hex",
2384 /* activate up to 4 groups
2385 * and set active distance
2386 */
2387 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
2388 CY_GEST_GRP3 | CY_GEST_GRP4 |
2389 CY_ACT_DIST,
2390 /* change act_intrvl to customize the Active power state
2391 * scanning/processing refresh interval for Operating mode
2392 */
2393 .act_intrvl = CY_ACT_INTRVL_DFLT,
2394 /* change tch_tmout to customize the touch timeout for the
2395 * Active power state for Operating mode
2396 */
2397 .tch_tmout = CY_TCH_TMOUT_DFLT,
2398 /* change lp_intrvl to customize the Low Power power state
2399 * scanning/processing refresh interval for Operating mode
2400 */
2401 .lp_intrvl = CY_LP_INTRVL_DFLT,
2402 .sleep_gpio = CYTTSP_TS_SLEEP_GPIO,
2403 .resout_gpio = CYTTSP_TS_RESOUT_N_GPIO,
2404 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
2405 .regulator_info = regulator_data,
2406 .num_regulators = ARRAY_SIZE(regulator_data),
2407 .init = cyttsp_platform_init,
2408};
2409
2410static struct i2c_board_info cyttsp_info[] __initdata = {
2411 {
2412 I2C_BOARD_INFO(CY_I2C_NAME, 0x24),
2413 .platform_data = &cyttsp_pdata,
2414#ifndef CY_USE_TIMER
2415 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
2416#endif /* CY_USE_TIMER */
2417 },
2418};
2419
2420static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
2421{
2422}
2423
2424static struct msm_i2c_platform_data msm8960_i2c_qup_gsbi4_pdata = {
2425 .clk_freq = 100000,
2426 .src_clk_rate = 24000000,
2427 .clk = "gsbi_qup_clk",
2428 .pclk = "gsbi_pclk",
2429 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2430};
2431
2432static struct msm_i2c_platform_data msm8960_i2c_qup_gsbi3_pdata = {
2433 .clk_freq = 100000,
2434 .src_clk_rate = 24000000,
2435 .clk = "gsbi_qup_clk",
2436 .pclk = "gsbi_pclk",
2437 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2438};
2439
2440static struct msm_i2c_platform_data msm8960_i2c_qup_gsbi10_pdata = {
2441 .clk_freq = 100000,
2442 .src_clk_rate = 24000000,
2443 .clk = "gsbi_qup_clk",
2444 .pclk = "gsbi_pclk",
2445 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2446};
2447
2448static struct msm_i2c_platform_data msm8960_i2c_qup_gsbi12_pdata = {
2449 .clk_freq = 100000,
2450 .src_clk_rate = 24000000,
2451 .clk = "gsbi_qup_clk",
2452 .pclk = "gsbi_pclk",
2453 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2454};
2455
2456static struct msm_rpm_platform_data msm_rpm_data = {
2457 .reg_base_addrs = {
2458 [MSM_RPM_PAGE_STATUS] = MSM_RPM_BASE,
2459 [MSM_RPM_PAGE_CTRL] = MSM_RPM_BASE + 0x400,
2460 [MSM_RPM_PAGE_REQ] = MSM_RPM_BASE + 0x600,
2461 [MSM_RPM_PAGE_ACK] = MSM_RPM_BASE + 0xa00,
2462 },
2463
2464 .irq_ack = RPM_APCC_CPU0_GP_HIGH_IRQ,
2465 .irq_err = RPM_APCC_CPU0_GP_LOW_IRQ,
2466 .irq_vmpm = RPM_APCC_CPU0_GP_MEDIUM_IRQ,
2467 .msm_apps_ipc_rpm_reg = MSM_APCS_GCC_BASE + 0x008,
2468 .msm_apps_ipc_rpm_val = 4,
2469};
2470
2471static struct spi_board_info spi_board_info[] __initdata = {
2472 {
2473 .modalias = "ks8851",
2474 .irq = MSM_GPIO_TO_INT(KS8851_IRQ_GPIO),
2475 .max_speed_hz = 19200000,
2476 .bus_num = 0,
2477 .chip_select = 0,
2478 .mode = SPI_MODE_0,
2479 },
2480};
2481
2482static struct platform_device msm_device_saw_core0 = {
2483 .name = "saw-regulator",
2484 .id = 0,
2485 .dev = {
2486 .platform_data = &msm_saw_regulator_pdata_s5,
2487 },
2488};
2489
2490static struct platform_device msm_device_saw_core1 = {
2491 .name = "saw-regulator",
2492 .id = 1,
2493 .dev = {
2494 .platform_data = &msm_saw_regulator_pdata_s6,
2495 },
2496};
2497
2498#ifdef CONFIG_MSM_FAKE_BATTERY
2499static struct platform_device fish_battery_device = {
2500 .name = "fish_battery",
2501};
2502#endif
2503
2504struct platform_device msm8960_device_ext_5v_vreg __devinitdata = {
2505 .name = GPIO_REGULATOR_DEV_NAME,
2506 .id = PM8921_MPP_PM_TO_SYS(7),
2507 .dev = {
2508 .platform_data = &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V],
2509 },
2510};
2511
2512struct platform_device msm8960_device_ext_l2_vreg __devinitdata = {
2513 .name = GPIO_REGULATOR_DEV_NAME,
2514 .id = 91,
2515 .dev = {
2516 .platform_data = &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_L2],
2517 },
2518};
2519
2520static struct platform_device *common_devices[] __initdata = {
2521 &msm_device_dmov,
2522 &msm_device_smd,
2523 &msm8960_device_uart_gsbi5,
2524 &msm_device_saw_core0,
2525 &msm_device_saw_core1,
2526 &msm8960_device_ext_5v_vreg,
2527 &msm8960_device_ext_l2_vreg,
2528 &msm8960_device_ssbi_pm8921,
2529 &msm8960_device_qup_spi_gsbi1,
2530 &msm8960_device_qup_i2c_gsbi3,
2531 &msm8960_device_qup_i2c_gsbi4,
2532 &msm8960_device_qup_i2c_gsbi10,
2533#ifndef CONFIG_MSM_DSPS
2534 &msm8960_device_qup_i2c_gsbi12,
2535#endif
2536 &msm_slim_ctrl,
2537 &msm_device_wcnss_wlan,
2538#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
2539 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
2540 &qcrypto_device,
2541#endif
2542
2543#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
2544 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
2545 &qcedev_device,
2546#endif
2547#ifdef CONFIG_MSM_ROTATOR
2548 &msm_rotator_device,
2549#endif
2550 &msm_device_sps,
2551#ifdef CONFIG_MSM_FAKE_BATTERY
2552 &fish_battery_device,
2553#endif
2554#ifdef CONFIG_ANDROID_PMEM
2555 &android_pmem_device,
2556 &android_pmem_adsp_device,
2557 &android_pmem_audio_device,
2558#endif
2559 &msm_fb_device,
2560 &msm_device_vidc,
2561 &msm_device_bam_dmux,
2562 &msm_fm_platform_init,
2563};
2564
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08002565static struct platform_device *sim_devices[] __initdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002566 &msm_device_otg,
2567 &msm_device_gadget_peripheral,
2568 &msm_device_hsusb_host,
2569 &android_usb_device,
2570 &msm_device_vidc,
2571 &mipi_dsi_simulator_panel_device,
2572 &msm_bus_apps_fabric,
2573 &msm_bus_sys_fabric,
2574 &msm_bus_mm_fabric,
2575 &msm_bus_sys_fpb,
2576 &msm_bus_cpss_fpb,
2577 &msm_pcm,
2578 &msm_pcm_routing,
2579 &msm_cpudai0,
2580 &msm_cpudai1,
2581 &msm_cpudai_hdmi_rx,
2582 &msm_cpudai_bt_rx,
2583 &msm_cpudai_bt_tx,
2584 &msm_cpudai_fm_rx,
2585 &msm_cpudai_fm_tx,
2586 &msm_cpu_fe,
2587 &msm_stub_codec,
2588 &msm_voice,
2589 &msm_voip,
2590 &msm_lpa_pcm,
2591
2592#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
2593 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
2594 &qcrypto_device,
2595#endif
2596
2597#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
2598 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
2599 &qcedev_device,
2600#endif
2601
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08002602};
2603
2604static struct platform_device *rumi3_devices[] __initdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002605 &msm_kgsl_3d0,
2606 &msm_kgsl_2d0,
2607 &msm_kgsl_2d1,
2608 &mipi_dsi_renesas_panel_device,
2609#ifdef CONFIG_MSM_GEMINI
2610 &msm8960_gemini_device,
2611#endif
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08002612};
2613
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002614static struct platform_device *cdp_devices[] __initdata = {
2615 &msm_device_otg,
2616 &msm_device_gadget_peripheral,
2617 &msm_device_hsusb_host,
2618 &android_usb_device,
2619 &msm_pcm,
2620 &msm_pcm_routing,
2621 &msm_cpudai0,
2622 &msm_cpudai1,
2623 &msm_cpudai_hdmi_rx,
2624 &msm_cpudai_bt_rx,
2625 &msm_cpudai_bt_tx,
2626 &msm_cpudai_fm_rx,
2627 &msm_cpudai_fm_tx,
2628 &msm_cpu_fe,
2629 &msm_stub_codec,
2630 &msm_kgsl_3d0,
2631#ifdef CONFIG_MSM_KGSL_2D
2632 &msm_kgsl_2d0,
2633 &msm_kgsl_2d1,
2634#endif
2635 &mipi_dsi_toshiba_panel_device,
2636#ifdef CONFIG_MSM_GEMINI
2637 &msm8960_gemini_device,
2638#endif
2639 &msm_voice,
2640 &msm_voip,
2641 &msm_lpa_pcm,
2642#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
2643 &hdmi_msm_device,
2644#endif
2645 &msm_pcm_hostless,
2646 &msm_bus_apps_fabric,
2647 &msm_bus_sys_fabric,
2648 &msm_bus_mm_fabric,
2649 &msm_bus_sys_fpb,
2650 &msm_bus_cpss_fpb,
2651};
2652
2653static void __init msm8960_i2c_init(void)
2654{
2655 msm8960_device_qup_i2c_gsbi4.dev.platform_data =
2656 &msm8960_i2c_qup_gsbi4_pdata;
2657
2658 msm8960_device_qup_i2c_gsbi3.dev.platform_data =
2659 &msm8960_i2c_qup_gsbi3_pdata;
2660
2661 msm8960_device_qup_i2c_gsbi10.dev.platform_data =
2662 &msm8960_i2c_qup_gsbi10_pdata;
2663
2664 msm8960_device_qup_i2c_gsbi12.dev.platform_data =
2665 &msm8960_i2c_qup_gsbi12_pdata;
2666}
2667
2668static struct pm8xxx_irq_platform_data pm8xxx_irq_pdata __devinitdata = {
2669 .irq_base = PM8921_IRQ_BASE,
2670 .devirq = MSM_GPIO_TO_INT(104),
2671 .irq_trigger_flag = IRQF_TRIGGER_LOW,
2672};
2673
2674static struct pm8xxx_gpio_platform_data pm8xxx_gpio_pdata __devinitdata = {
2675 .gpio_base = PM8921_GPIO_PM_TO_SYS(1),
2676};
2677
2678static struct pm8xxx_mpp_platform_data pm8xxx_mpp_pdata __devinitdata = {
2679 .mpp_base = PM8921_MPP_PM_TO_SYS(1),
2680};
2681
2682static struct pm8xxx_rtc_platform_data pm8xxx_rtc_pdata __devinitdata = {
2683 .rtc_write_enable = false,
2684};
2685
2686static struct pm8xxx_pwrkey_platform_data pm8xxx_pwrkey_pdata = {
2687 .pull_up = 1,
2688 .kpd_trigger_delay_us = 970,
2689 .wakeup = 1,
2690};
2691
2692static const unsigned int keymap[] = {
2693 KEY(0, 0, KEY_VOLUMEUP),
2694 KEY(0, 1, KEY_VOLUMEDOWN),
2695 KEY(0, 2, KEY_CAMERA_SNAPSHOT),
2696 KEY(0, 3, KEY_CAMERA_FOCUS),
2697};
2698
2699static struct matrix_keymap_data keymap_data = {
2700 .keymap_size = ARRAY_SIZE(keymap),
2701 .keymap = keymap,
2702};
2703
2704static struct pm8xxx_keypad_platform_data keypad_data = {
2705 .input_name = "keypad_8960",
2706 .input_phys_device = "keypad_8960/input0",
2707 .num_rows = 1,
2708 .num_cols = 5,
2709 .rows_gpio_start = PM8921_GPIO_PM_TO_SYS(9),
2710 .cols_gpio_start = PM8921_GPIO_PM_TO_SYS(1),
2711 .debounce_ms = 15,
2712 .scan_delay_ms = 32,
2713 .row_hold_ns = 91500,
2714 .wakeup = 1,
2715 .keymap_data = &keymap_data,
2716};
2717
2718static const unsigned int keymap_sim[] = {
2719 KEY(0, 0, KEY_7),
2720 KEY(0, 1, KEY_DOWN),
2721 KEY(0, 2, KEY_UP),
2722 KEY(0, 3, KEY_RIGHT),
2723 KEY(0, 4, KEY_ENTER),
2724 KEY(0, 5, KEY_L),
2725 KEY(0, 6, KEY_BACK),
2726 KEY(0, 7, KEY_M),
2727
2728 KEY(1, 0, KEY_LEFT),
2729 KEY(1, 1, KEY_SEND),
2730 KEY(1, 2, KEY_1),
2731 KEY(1, 3, KEY_4),
2732 KEY(1, 4, KEY_CLEAR),
2733 KEY(1, 5, KEY_MSDOS),
2734 KEY(1, 6, KEY_SPACE),
2735 KEY(1, 7, KEY_COMMA),
2736
2737 KEY(2, 0, KEY_6),
2738 KEY(2, 1, KEY_5),
2739 KEY(2, 2, KEY_8),
2740 KEY(2, 3, KEY_3),
2741 KEY(2, 4, KEY_NUMERIC_STAR),
2742 KEY(2, 5, KEY_UP),
2743 KEY(2, 6, KEY_DOWN),
2744 KEY(2, 7, KEY_LEFTSHIFT),
2745
2746 KEY(3, 0, KEY_9),
2747 KEY(3, 1, KEY_NUMERIC_POUND),
2748 KEY(3, 2, KEY_0),
2749 KEY(3, 3, KEY_2),
2750 KEY(3, 4, KEY_SLEEP),
2751 KEY(3, 5, KEY_F1),
2752 KEY(3, 6, KEY_F2),
2753 KEY(3, 7, KEY_F3),
2754
2755 KEY(4, 0, KEY_BACK),
2756 KEY(4, 1, KEY_HOME),
2757 KEY(4, 2, KEY_MENU),
2758 KEY(4, 3, KEY_VOLUMEUP),
2759 KEY(4, 4, KEY_VOLUMEDOWN),
2760 KEY(4, 5, KEY_F4),
2761 KEY(4, 6, KEY_F5),
2762 KEY(4, 7, KEY_F6),
2763
2764 KEY(5, 0, KEY_R),
2765 KEY(5, 1, KEY_T),
2766 KEY(5, 2, KEY_Y),
2767 KEY(5, 3, KEY_LEFTALT),
2768 KEY(5, 4, KEY_KPENTER),
2769 KEY(5, 5, KEY_Q),
2770 KEY(5, 6, KEY_W),
2771 KEY(5, 7, KEY_E),
2772
2773 KEY(6, 0, KEY_F),
2774 KEY(6, 1, KEY_G),
2775 KEY(6, 2, KEY_H),
2776 KEY(6, 3, KEY_CAPSLOCK),
2777 KEY(6, 4, KEY_PAGEUP),
2778 KEY(6, 5, KEY_A),
2779 KEY(6, 6, KEY_S),
2780 KEY(6, 7, KEY_D),
2781
2782 KEY(7, 0, KEY_V),
2783 KEY(7, 1, KEY_B),
2784 KEY(7, 2, KEY_N),
2785 KEY(7, 3, KEY_MENU),
2786 KEY(7, 4, KEY_PAGEDOWN),
2787 KEY(7, 5, KEY_Z),
2788 KEY(7, 6, KEY_X),
2789 KEY(7, 7, KEY_C),
2790
2791 KEY(8, 0, KEY_P),
2792 KEY(8, 1, KEY_J),
2793 KEY(8, 2, KEY_K),
2794 KEY(8, 3, KEY_INSERT),
2795 KEY(8, 4, KEY_LINEFEED),
2796 KEY(8, 5, KEY_U),
2797 KEY(8, 6, KEY_I),
2798 KEY(8, 7, KEY_O),
2799
2800 KEY(9, 0, KEY_4),
2801 KEY(9, 1, KEY_5),
2802 KEY(9, 2, KEY_6),
2803 KEY(9, 3, KEY_7),
2804 KEY(9, 4, KEY_8),
2805 KEY(9, 5, KEY_1),
2806 KEY(9, 6, KEY_2),
2807 KEY(9, 7, KEY_3),
2808
2809 KEY(10, 0, KEY_F7),
2810 KEY(10, 1, KEY_F8),
2811 KEY(10, 2, KEY_F9),
2812 KEY(10, 3, KEY_F10),
2813 KEY(10, 4, KEY_FN),
2814 KEY(10, 5, KEY_9),
2815 KEY(10, 6, KEY_0),
2816 KEY(10, 7, KEY_DOT),
2817
2818 KEY(11, 0, KEY_LEFTCTRL),
2819 KEY(11, 1, KEY_F11),
2820 KEY(11, 2, KEY_ENTER),
2821 KEY(11, 3, KEY_SEARCH),
2822 KEY(11, 4, KEY_DELETE),
2823 KEY(11, 5, KEY_RIGHT),
2824 KEY(11, 6, KEY_LEFT),
2825 KEY(11, 7, KEY_RIGHTSHIFT),
2826 KEY(0, 0, KEY_VOLUMEUP),
2827 KEY(0, 1, KEY_VOLUMEDOWN),
2828 KEY(0, 2, KEY_CAMERA_SNAPSHOT),
2829 KEY(0, 3, KEY_CAMERA_FOCUS),
2830};
2831
2832static struct matrix_keymap_data keymap_data_sim = {
2833 .keymap_size = ARRAY_SIZE(keymap_sim),
2834 .keymap = keymap_sim,
2835};
2836
2837static struct pm8xxx_keypad_platform_data keypad_data_sim = {
2838 .input_name = "keypad_8960",
2839 .input_phys_device = "keypad_8960/input0",
2840 .num_rows = 12,
2841 .num_cols = 8,
2842 .rows_gpio_start = PM8921_GPIO_PM_TO_SYS(9),
2843 .cols_gpio_start = PM8921_GPIO_PM_TO_SYS(1),
2844 .debounce_ms = 15,
2845 .scan_delay_ms = 32,
2846 .row_hold_ns = 91500,
2847 .wakeup = 1,
2848 .keymap_data = &keymap_data_sim,
2849};
2850
2851static struct pm8921_charger_platform_data pm8921_chg_pdata __devinitdata = {
2852 .safety_time = 180,
2853 .update_time = 1,
2854 .max_voltage = 4200,
2855 .min_voltage = 3200,
2856 .resume_voltage = 4100,
2857 .term_current = 100,
2858};
2859
2860static struct pm8xxx_misc_platform_data pm8xxx_misc_pdata = {
2861 .priority = 0,
2862};
2863
2864static struct pm8921_bms_platform_data pm8921_bms_pdata __devinitdata = {
2865 .r_sense = 10,
2866 .i_test = 2500,
2867 .v_failure = 3000,
2868 .calib_delay_ms = 600000,
2869 .batt_data = &palladium_1500_data,
2870};
2871
2872static struct led_info pm8921_led_info[] = {
2873 [0] = {
2874 .name = "led:drv1",
2875 .flags = PM8XXX_ID_LED_1,
2876 },
2877};
2878
2879static struct led_platform_data pm8xxx_leds_pdata = {
2880 .num_leds = ARRAY_SIZE(pm8921_led_info),
2881 .leds = pm8921_led_info,
2882};
2883
2884static struct pm8921_platform_data pm8921_platform_data __devinitdata = {
2885 .irq_pdata = &pm8xxx_irq_pdata,
2886 .gpio_pdata = &pm8xxx_gpio_pdata,
2887 .mpp_pdata = &pm8xxx_mpp_pdata,
2888 .rtc_pdata = &pm8xxx_rtc_pdata,
2889 .pwrkey_pdata = &pm8xxx_pwrkey_pdata,
2890 .keypad_pdata = &keypad_data,
2891 .misc_pdata = &pm8xxx_misc_pdata,
2892 .regulator_pdatas = msm_pm8921_regulator_pdata,
2893 .charger_pdata = &pm8921_chg_pdata,
2894 .bms_pdata = &pm8921_bms_pdata,
2895 .adc_pdata = &pm8921_adc_pdata,
2896 .leds_pdata = &pm8xxx_leds_pdata,
2897};
2898
2899static struct msm_ssbi_platform_data msm8960_ssbi_pm8921_pdata __devinitdata = {
2900 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
2901 .slave = {
2902 .name = "pm8921-core",
2903 .platform_data = &pm8921_platform_data,
2904 },
2905};
2906
2907static void msm8960_wcnss_init(void)
2908{
2909 int i, ret, j;
2910
2911 for (i = 0; i < ARRAY_SIZE(wcnss_5wire_interface); i++) {
2912 ret = gpio_request(wcnss_5wire_interface[i].gpio,
2913 "wcnss_5_wire");
2914 if (ret) {
2915 pr_err("wcnss_5_wire gpio %d failed: %d\n",
2916 wcnss_5wire_interface[i].gpio, ret);
2917 goto fail;
2918 }
2919 }
2920
2921 pr_info("%s: Iris 5-wire gpios configured\n", __func__);
2922
2923 return;
2924
2925fail:
2926 for (j = 0; j < i; j++)
2927 gpio_free(wcnss_5wire_interface[j].gpio);
2928}
2929
2930static int ethernet_init(void)
2931{
2932 int ret;
2933 ret = gpio_request(KS8851_IRQ_GPIO, "ks8851_irq");
2934 if (ret) {
2935 pr_err("ks8851 gpio_request failed: %d\n", ret);
2936 goto fail;
2937 }
2938
2939 ret = gpio_request(KS8851_RST_GPIO, "ks8851_rst");
2940 if (ret) {
2941 pr_err("ks8851 gpio_request failed: %d\n", ret);
2942 goto fail_rst;
2943 }
2944
2945 ret = gpio_request(FPGA_CS_GPIO, "fpga_cs");
2946 if (ret) {
2947 pr_err("ks8851 gpio_request failed: %d\n", ret);
2948 goto fail_cs;
2949 }
2950
2951 gpio_direction_output(FPGA_CS_GPIO, 1);
2952 gpio_direction_output(KS8851_RST_GPIO, 1);
2953 return 0;
2954fail_cs:
2955 gpio_free(KS8851_RST_GPIO);
2956fail_rst:
2957 gpio_free(KS8851_IRQ_GPIO);
2958fail:
2959 return ret;
2960}
2961
2962static struct msm_cpuidle_state msm_cstates[] __initdata = {
2963 {0, 0, "C0", "WFI",
2964 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
2965
2966 {0, 1, "C1", "STANDALONE_POWER_COLLAPSE",
2967 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
2968
2969 {0, 2, "C2", "POWER_COLLAPSE",
2970 MSM_PM_SLEEP_MODE_POWER_COLLAPSE},
2971
2972 {1, 0, "C0", "WFI",
2973 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
2974
2975 {1, 1, "C1", "STANDALONE_POWER_COLLAPSE",
2976 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
2977};
2978
2979static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR * 2] = {
2980 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
2981 .idle_supported = 1,
2982 .suspend_supported = 1,
2983 .idle_enabled = 0,
2984 .suspend_enabled = 0,
2985 .latency = 4000,
2986 .residency = 13000,
2987 },
2988
2989 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
2990 .idle_supported = 1,
2991 .suspend_supported = 1,
2992 .idle_enabled = 0,
2993 .suspend_enabled = 0,
2994 .latency = 500,
2995 .residency = 6000,
2996 },
2997
2998 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
2999 .idle_supported = 1,
3000 .suspend_supported = 1,
3001 .idle_enabled = 1,
3002 .suspend_enabled = 1,
3003 .latency = 2,
3004 .residency = 0,
3005 },
3006
3007 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
3008 .idle_supported = 0,
3009 .suspend_supported = 1,
3010 .idle_enabled = 0,
3011 .suspend_enabled = 0,
3012 .latency = 600,
3013 .residency = 7200,
3014 },
3015
3016 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
3017 .idle_supported = 1,
3018 .suspend_supported = 1,
3019 .idle_enabled = 0,
3020 .suspend_enabled = 0,
3021 .latency = 500,
3022 .residency = 6000,
3023 },
3024
3025 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
3026 .idle_supported = 1,
3027 .suspend_supported = 0,
3028 .idle_enabled = 1,
3029 .suspend_enabled = 0,
3030 .latency = 2,
3031 .residency = 0,
3032 },
3033};
3034
3035static struct msm_rpmrs_level msm_rpmrs_levels[] __initdata = {
3036 {
3037 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT,
3038 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
3039 true,
3040 1, 8000, 100000, 1,
3041 },
3042
3043 {
3044 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE,
3045 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
3046 true,
3047 1500, 5000, 60100000, 3000,
3048 },
3049
3050 {
3051 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
3052 MSM_RPMRS_LIMITS(ON, GDHS, MAX, ACTIVE),
3053 false,
3054 1800, 5000, 60350000, 3500,
3055 },
3056
3057 {
3058 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
3059 MSM_RPMRS_LIMITS(ON, HSFS_OPEN, MAX, ACTIVE),
3060 false,
3061 2800, 2500, 65350000, 4800,
3062 },
3063
3064 {
3065 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
3066 MSM_RPMRS_LIMITS(OFF, GDHS, MAX, ACTIVE),
3067 false,
3068 3800, 4500, 67850000, 5500,
3069 },
3070
3071 {
3072 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
3073 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, MAX, ACTIVE),
3074 false,
3075 4800, 2000, 71850000, 6800,
3076 },
3077
3078 {
3079 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
3080 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, ACTIVE, RET_HIGH),
3081 false,
3082 6800, 500, 75850000, 8800,
3083 },
3084
3085 {
3086 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
3087 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, RET_HIGH, RET_LOW),
3088 false,
3089 7800, 0, 76350000, 9800,
3090 },
3091};
3092
3093#ifdef CONFIG_I2C
3094#define I2C_SURF 1
3095#define I2C_FFA (1 << 1)
3096#define I2C_RUMI (1 << 2)
3097#define I2C_SIM (1 << 3)
3098#define I2C_FLUID (1 << 4)
3099#define MSM_8960_GSBI4_QUP_I2C_BUS_ID 4
3100#define MSM_8960_GSBI3_QUP_I2C_BUS_ID 3
3101
3102struct i2c_registry {
3103 u8 machs;
3104 int bus;
3105 struct i2c_board_info *info;
3106 int len;
3107};
3108
3109#ifdef CONFIG_MSM_CAMERA
3110static struct i2c_board_info msm_camera_boardinfo[] __initdata = {
3111#ifdef CONFIG_IMX074
3112 {
3113 I2C_BOARD_INFO("imx074", 0x1A),
3114 },
3115#endif
3116#ifdef CONFIG_OV2720
3117 {
3118 I2C_BOARD_INFO("ov2720", 0x6C),
3119 },
3120#endif
3121};
3122#endif
3123
3124/* Sensors DSPS platform data */
3125#ifdef CONFIG_MSM_DSPS
3126#define DSPS_PIL_GENERIC_NAME "dsps"
3127#endif /* CONFIG_MSM_DSPS */
3128
3129static void __init msm8960_init_dsps(void)
3130{
3131#ifdef CONFIG_MSM_DSPS
3132 struct msm_dsps_platform_data *pdata =
3133 msm_dsps_device.dev.platform_data;
3134 pdata->pil_name = DSPS_PIL_GENERIC_NAME;
3135 pdata->gpios = NULL;
3136 pdata->gpios_num = 0;
3137
3138 platform_device_register(&msm_dsps_device);
3139#endif /* CONFIG_MSM_DSPS */
3140}
3141
3142static struct i2c_registry msm8960_i2c_devices[] __initdata = {
3143#ifdef CONFIG_MSM_CAMERA
3144 {
3145 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_RUMI,
3146 MSM_8960_GSBI4_QUP_I2C_BUS_ID,
3147 msm_camera_boardinfo,
3148 ARRAY_SIZE(msm_camera_boardinfo),
3149 },
3150#endif
3151 {
3152 I2C_SURF | I2C_FFA | I2C_FLUID,
3153 MSM_8960_GSBI3_QUP_I2C_BUS_ID,
3154 cyttsp_info,
3155 ARRAY_SIZE(cyttsp_info),
3156 }
3157};
3158#endif /* CONFIG_I2C */
3159
3160static void __init register_i2c_devices(void)
3161{
3162#ifdef CONFIG_I2C
3163 u8 mach_mask = 0;
3164 int i;
3165
3166 /* Build the matching 'supported_machs' bitmask */
3167 if (machine_is_msm8960_cdp())
3168 mach_mask = I2C_SURF;
3169 else if (machine_is_msm8960_rumi3())
3170 mach_mask = I2C_RUMI;
3171 else if (machine_is_msm8960_sim())
3172 mach_mask = I2C_SIM;
3173 else
3174 pr_err("unmatched machine ID in register_i2c_devices\n");
3175
3176 /* Run the array and install devices as appropriate */
3177 for (i = 0; i < ARRAY_SIZE(msm8960_i2c_devices); ++i) {
3178 if (msm8960_i2c_devices[i].machs & mach_mask)
3179 i2c_register_board_info(msm8960_i2c_devices[i].bus,
3180 msm8960_i2c_devices[i].info,
3181 msm8960_i2c_devices[i].len);
3182 }
3183#endif
3184}
3185
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08003186static void __init msm8960_sim_init(void)
3187{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003188 if (socinfo_init() < 0)
3189 pr_err("socinfo_init() failed!\n");
3190
3191 BUG_ON(msm_rpm_init(&msm_rpm_data));
3192 BUG_ON(msm_rpmrs_levels_init(msm_rpmrs_levels,
3193 ARRAY_SIZE(msm_rpmrs_levels)));
3194 regulator_suppress_info_printing();
3195 msm8960_clock_init();
3196 msm8960_device_ssbi_pm8921.dev.platform_data =
3197 &msm8960_ssbi_pm8921_pdata;
3198 pm8921_platform_data.num_regulators = msm_pm8921_regulator_pdata_len;
3199 msm8960_device_qup_spi_gsbi1.dev.platform_data =
3200 &msm8960_qup_spi_gsbi1_pdata;
3201
3202 /* Simulator supports a QWERTY keypad */
3203 pm8921_platform_data.keypad_pdata = &keypad_data_sim;
3204
3205 msm_device_otg.dev.platform_data = &msm_otg_pdata;
3206 msm_device_gadget_peripheral.dev.parent = &msm_device_otg.dev;
3207 msm_device_hsusb_host.dev.parent = &msm_device_otg.dev;
3208 gpiomux_init();
3209 ethernet_init();
3210 msm8960_i2c_init();
3211 msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
3212 msm_spm_l2_init(msm_spm_l2_data);
3213 msm8960_init_buses();
3214 platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
3215 pm8921_gpio_mpp_init();
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08003216 platform_add_devices(sim_devices, ARRAY_SIZE(sim_devices));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003217 msm_acpu_clock_init(&msm8960_acpu_clock_data);
3218
3219 msm8960_device_qup_spi_gsbi1.dev.platform_data =
3220 &msm8960_qup_spi_gsbi1_pdata;
3221 spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
3222
3223 msm8960_init_mmc();
3224 msm_fb_add_devices();
3225 slim_register_board_info(msm_slim_devices,
3226 ARRAY_SIZE(msm_slim_devices));
3227 msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
3228 msm_pm_set_rpm_wakeup_irq(RPM_APCC_CPU0_WAKE_UP_IRQ);
3229 msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
3230 msm_pm_data);
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08003231}
3232
3233static void __init msm8960_rumi3_init(void)
3234{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003235 if (socinfo_init() < 0)
3236 pr_err("socinfo_init() failed!\n");
3237
3238 BUG_ON(msm_rpm_init(&msm_rpm_data));
3239 BUG_ON(msm_rpmrs_levels_init(msm_rpmrs_levels,
3240 ARRAY_SIZE(msm_rpmrs_levels)));
3241 regulator_suppress_info_printing();
3242 msm8960_clock_init_dummy();
3243 gpiomux_init();
3244 ethernet_init();
3245 msm8960_device_ssbi_pm8921.dev.platform_data =
3246 &msm8960_ssbi_pm8921_pdata;
3247 pm8921_platform_data.num_regulators = msm_pm8921_regulator_pdata_len;
3248 msm8960_device_qup_spi_gsbi1.dev.platform_data =
3249 &msm8960_qup_spi_gsbi1_pdata;
3250 spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
3251 msm8960_i2c_init();
3252 msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
3253 msm_spm_l2_init(msm_spm_l2_data);
3254 platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
3255 pm8921_gpio_mpp_init();
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08003256 platform_add_devices(rumi3_devices, ARRAY_SIZE(rumi3_devices));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003257 msm8960_init_mmc();
3258
3259 register_i2c_devices();
3260 msm_fb_add_devices();
3261 slim_register_board_info(msm_slim_devices,
3262 ARRAY_SIZE(msm_slim_devices));
3263 msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
3264 msm_pm_set_rpm_wakeup_irq(RPM_APCC_CPU0_WAKE_UP_IRQ);
3265 msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
3266 msm_pm_data);
3267}
3268
3269static void __init msm8960_cdp_init(void)
3270{
3271 if (socinfo_init() < 0)
3272 pr_err("socinfo_init() failed!\n");
3273
3274 BUG_ON(msm_rpm_init(&msm_rpm_data));
3275 BUG_ON(msm_rpmrs_levels_init(msm_rpmrs_levels,
3276 ARRAY_SIZE(msm_rpmrs_levels)));
3277 regulator_suppress_info_printing();
3278 if (msm_xo_init())
3279 pr_err("Failed to initialize XO votes\n");
3280 msm8960_clock_init();
3281 msm_device_otg.dev.platform_data = &msm_otg_pdata;
3282 msm_device_gadget_peripheral.dev.parent = &msm_device_otg.dev;
3283 msm_device_hsusb_host.dev.parent = &msm_device_otg.dev;
3284 gpiomux_init();
3285 ethernet_init();
3286 msm8960_device_qup_spi_gsbi1.dev.platform_data =
3287 &msm8960_qup_spi_gsbi1_pdata;
3288 spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
3289 msm8960_device_ssbi_pm8921.dev.platform_data =
3290 &msm8960_ssbi_pm8921_pdata;
3291 pm8921_platform_data.num_regulators = msm_pm8921_regulator_pdata_len;
3292 msm8960_i2c_init();
3293 msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
3294 msm_spm_l2_init(msm_spm_l2_data);
3295 msm8960_init_buses();
3296 platform_add_devices(msm_footswitch_devices,
3297 msm_num_footswitch_devices);
3298 platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
3299 pm8921_gpio_mpp_init();
3300 platform_add_devices(cdp_devices, ARRAY_SIZE(cdp_devices));
3301 msm8960_init_cam();
3302 msm8960_init_mmc();
3303 msm_acpu_clock_init(&msm8960_acpu_clock_data);
3304 register_i2c_devices();
3305 msm8960_wcnss_init();
3306 msm_fb_add_devices();
3307 slim_register_board_info(msm_slim_devices,
3308 ARRAY_SIZE(msm_slim_devices));
3309 msm8960_init_dsps();
3310 msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
3311 msm_pm_set_rpm_wakeup_irq(RPM_APCC_CPU0_WAKE_UP_IRQ);
3312 msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
3313 msm_pm_data);
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08003314}
3315
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08003316MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR")
3317 .map_io = msm8960_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003318 .reserve = msm8960_reserve,
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08003319 .init_irq = msm8960_init_irq,
3320 .timer = &msm_timer,
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08003321 .init_machine = msm8960_sim_init,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003322 .init_early = msm8960_allocate_memory_regions,
Stepan Moskovchenkof441ca22010-12-01 19:31:16 -08003323MACHINE_END
Stepan Moskovchenko50ede4e2010-12-13 18:12:19 -08003324
3325MACHINE_START(MSM8960_RUMI3, "QCT MSM8960 RUMI3")
3326 .map_io = msm8960_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003327 .reserve = msm8960_reserve,
Stepan Moskovchenko50ede4e2010-12-13 18:12:19 -08003328 .init_irq = msm8960_init_irq,
3329 .timer = &msm_timer,
Stepan Moskovchenkod056fca2011-01-27 12:12:07 -08003330 .init_machine = msm8960_rumi3_init,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003331 .init_early = msm8960_allocate_memory_regions,
Stepan Moskovchenko50ede4e2010-12-13 18:12:19 -08003332MACHINE_END
3333
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003334MACHINE_START(MSM8960_CDP, "QCT MSM8960 CDP")
3335 .map_io = msm8960_map_io,
3336 .reserve = msm8960_reserve,
3337 .init_irq = msm8960_init_irq,
3338 .timer = &msm_timer,
3339 .init_machine = msm8960_cdp_init,
3340 .init_early = msm8960_allocate_memory_regions,
3341MACHINE_END
3342
3343MACHINE_START(MSM8960_MTP, "QCT MSM8960 MTP")
3344 .map_io = msm8960_map_io,
3345 .reserve = msm8960_reserve,
3346 .init_irq = msm8960_init_irq,
3347 .timer = &msm_timer,
3348 .init_machine = msm8960_cdp_init,
3349 .init_early = msm8960_allocate_memory_regions,
3350MACHINE_END
3351
3352MACHINE_START(MSM8960_FLUID, "QCT MSM8960 FLUID")
3353 .map_io = msm8960_map_io,
3354 .reserve = msm8960_reserve,
3355 .init_irq = msm8960_init_irq,
3356 .timer = &msm_timer,
3357 .init_machine = msm8960_cdp_init,
3358 .init_early = msm8960_allocate_memory_regions,
3359MACHINE_END