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Brian Swetland8a0f6f12008-09-10 14:58:25 -07001/* linux/include/asm-arm/arch-msm/dma.h
Russell Kinga09e64f2008-08-05 16:14:15 +01002 *
3 * Copyright (C) 2007 Google, Inc.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004 * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
Russell Kinga09e64f2008-08-05 16:14:15 +01005 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#ifndef __ASM_ARCH_MSM_DMA_H
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070018#define __ASM_ARCH_MSM_DMA_H
Russell Kinga09e64f2008-08-05 16:14:15 +010019
20#include <linux/list.h>
21#include <mach/msm_iomap.h>
22
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070023#if defined(CONFIG_ARCH_FSM9XXX)
24#include <mach/dma-fsm9xxx.h>
25#endif
26
Brian Swetland8a0f6f12008-09-10 14:58:25 -070027struct msm_dmov_errdata {
28 uint32_t flush[6];
29};
30
Russell Kinga09e64f2008-08-05 16:14:15 +010031struct msm_dmov_cmd {
32 struct list_head list;
33 unsigned int cmdptr;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070034 unsigned int crci_mask;
Brian Swetland8a0f6f12008-09-10 14:58:25 -070035 void (*complete_func)(struct msm_dmov_cmd *cmd,
36 unsigned int result,
37 struct msm_dmov_errdata *err);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070038 void (*exec_func)(struct msm_dmov_cmd *cmd);
39 void *user; /* Pointer for caller's reference */
Russell Kinga09e64f2008-08-05 16:14:15 +010040};
41
42void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070043void msm_dmov_enqueue_cmd_ext(unsigned id, struct msm_dmov_cmd *cmd);
Brian Swetland8a0f6f12008-09-10 14:58:25 -070044void msm_dmov_stop_cmd(unsigned id, struct msm_dmov_cmd *cmd, int graceful);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070045void msm_dmov_flush(unsigned int id);
46int msm_dmov_exec_cmd(unsigned id, unsigned int crci_mask, unsigned int cmdptr);
47unsigned int msm_dmov_build_crci_mask(int n, ...);
Russell Kinga09e64f2008-08-05 16:14:15 +010048
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070049#define DMOV_CRCIS_PER_CONF 10
Russell Kinga09e64f2008-08-05 16:14:15 +010050
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070051#define DMOV_ADDR(off, ch, sd) ((DMOV_SD_SIZE*(sd)) + (off) + ((ch) << 2))
52#define DMOV_SD0(off, ch) DMOV_ADDR(off, ch, 0)
53#define DMOV_SD1(off, ch) DMOV_ADDR(off, ch, 1)
54#define DMOV_SD2(off, ch) DMOV_ADDR(off, ch, 2)
55#define DMOV_SD3(off, ch) DMOV_ADDR(off, ch, 3)
Russell Kinga09e64f2008-08-05 16:14:15 +010056
Daniel Walker2f2a74e2010-05-04 11:29:54 -070057#if defined(CONFIG_ARCH_MSM7X30)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070058#define DMOV_SD_SIZE 0x400
59#define DMOV_SD_AARM 2
60#elif defined(CONFIG_ARCH_MSM8960)
61#define DMOV_SD_SIZE 0x800
62#define DMOV_SD_AARM 1
63#elif defined(CONFIG_MSM_ADM3)
64#define DMOV_SD_SIZE 0x800
65#define DMOV_SD_MASTER 1
66#define DMOV_SD_AARM 1
67#define DMOV_SD_MASTER_ADDR(off, ch) DMOV_ADDR(off, ch, DMOV_SD_MASTER)
68#elif defined(CONFIG_ARCH_FSM9XXX)
69/* defined in dma-fsm9xxx.h */
Daniel Walker2f2a74e2010-05-04 11:29:54 -070070#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070071#define DMOV_SD_SIZE 0x400
72#define DMOV_SD_AARM 3
Daniel Walker2f2a74e2010-05-04 11:29:54 -070073#endif
Russell Kinga09e64f2008-08-05 16:14:15 +010074
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070075#define DMOV_SD_AARM_ADDR(off, ch) DMOV_ADDR(off, ch, DMOV_SD_AARM)
76
77#define DMOV_CMD_PTR(ch) DMOV_SD_AARM_ADDR(0x000, ch)
Russell Kinga09e64f2008-08-05 16:14:15 +010078#define DMOV_CMD_LIST (0 << 29) /* does not work */
79#define DMOV_CMD_PTR_LIST (1 << 29) /* works */
80#define DMOV_CMD_INPUT_CFG (2 << 29) /* untested */
81#define DMOV_CMD_OUTPUT_CFG (3 << 29) /* untested */
82#define DMOV_CMD_ADDR(addr) ((addr) >> 3)
83
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070084#define DMOV_RSLT(ch) DMOV_SD_AARM_ADDR(0x040, ch)
Russell Kinga09e64f2008-08-05 16:14:15 +010085#define DMOV_RSLT_VALID (1 << 31) /* 0 == host has empties result fifo */
86#define DMOV_RSLT_ERROR (1 << 3)
87#define DMOV_RSLT_FLUSH (1 << 2)
88#define DMOV_RSLT_DONE (1 << 1) /* top pointer done */
89#define DMOV_RSLT_USER (1 << 0) /* command with FR force result */
90
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070091#define DMOV_FLUSH0(ch) DMOV_SD_AARM_ADDR(0x080, ch)
92#define DMOV_FLUSH1(ch) DMOV_SD_AARM_ADDR(0x0C0, ch)
93#define DMOV_FLUSH2(ch) DMOV_SD_AARM_ADDR(0x100, ch)
94#define DMOV_FLUSH3(ch) DMOV_SD_AARM_ADDR(0x140, ch)
95#define DMOV_FLUSH4(ch) DMOV_SD_AARM_ADDR(0x180, ch)
96#define DMOV_FLUSH5(ch) DMOV_SD_AARM_ADDR(0x1C0, ch)
97#define DMOV_FLUSH_TYPE (1 << 31)
Russell Kinga09e64f2008-08-05 16:14:15 +010098
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070099#define DMOV_STATUS(ch) DMOV_SD_AARM_ADDR(0x200, ch)
Russell Kinga09e64f2008-08-05 16:14:15 +0100100#define DMOV_STATUS_RSLT_COUNT(n) (((n) >> 29))
101#define DMOV_STATUS_CMD_COUNT(n) (((n) >> 27) & 3)
102#define DMOV_STATUS_RSLT_VALID (1 << 1)
103#define DMOV_STATUS_CMD_PTR_RDY (1 << 0)
104
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700105#define DMOV_CONF(ch) DMOV_SD_MASTER_ADDR(0x240, ch)
106#define DMOV_CONF_SD(sd) (((sd & 4) << 11) | ((sd & 3) << 4))
107#define DMOV_CONF_IRQ_EN (1 << 6)
108#define DMOV_CONF_FORCE_RSLT_EN (1 << 7)
109#define DMOV_CONF_SHADOW_EN (1 << 12)
110#define DMOV_CONF_MPU_DISABLE (1 << 11)
111#define DMOV_CONF_PRIORITY(n) (n << 0)
112
113#define DMOV_DBG_ERR(ci) DMOV_SD_MASTER_ADDR(0x280, ci)
114
115#define DMOV_RSLT_CONF(ch) DMOV_SD_AARM_ADDR(0x300, ch)
116#define DMOV_RSLT_CONF_FORCE_TOP_PTR_RSLT (1 << 2)
117#define DMOV_RSLT_CONF_FORCE_FLUSH_RSLT (1 << 1)
118#define DMOV_RSLT_CONF_IRQ_EN (1 << 0)
119
120#define DMOV_ISR DMOV_SD_AARM_ADDR(0x380, 0)
121
122#define DMOV_CI_CONF(ci) DMOV_SD_MASTER_ADDR(0x390, ci)
123#define DMOV_CI_CONF_RANGE_END(n) ((n) << 24)
124#define DMOV_CI_CONF_RANGE_START(n) ((n) << 16)
125#define DMOV_CI_CONF_MAX_BURST(n) ((n) << 0)
126
127#define DMOV_CI_DBG_ERR(ci) DMOV_SD_MASTER_ADDR(0x3B0, ci)
128
129#define DMOV_CRCI_CONF0 DMOV_SD_MASTER_ADDR(0x3D0, 0)
130#define DMOV_CRCI_CONF1 DMOV_SD_MASTER_ADDR(0x3D4, 0)
131#define DMOV_CRCI_CONF0_SD(crci, sd) (sd << (crci*3))
132#define DMOV_CRCI_CONF1_SD(crci, sd) (sd << ((crci-DMOV_CRCIS_PER_CONF)*3))
133
134#define DMOV_CRCI_CTL(crci) DMOV_SD_AARM_ADDR(0x400, crci)
135#define DMOV_CRCI_CTL_BLK_SZ(n) ((n) << 0)
136#define DMOV_CRCI_CTL_RST (1 << 17)
137#define DMOV_CRCI_MUX (1 << 18)
Russell Kinga09e64f2008-08-05 16:14:15 +0100138
139/* channel assignments */
140
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700141/*
142 * Format of CRCI numbers: crci number + (muxsel << 4)
143 */
144
145#if defined(CONFIG_ARCH_MSM8X60)
146#define DMOV_GP_CHAN 15
147
148#define DMOV_NAND_CHAN 17
149#define DMOV_NAND_CHAN_MODEM 26
150#define DMOV_NAND_CHAN_Q6 27
151#define DMOV_NAND_CRCI_CMD 15
152#define DMOV_NAND_CRCI_DATA 3
153
154#define DMOV_CE_IN_CHAN 2
155#define DMOV_CE_IN_CRCI 4
156
157#define DMOV_CE_OUT_CHAN 3
158#define DMOV_CE_OUT_CRCI 5
159
160#define DMOV_CE_HASH_CRCI 15
161
162#define DMOV_SDC1_CHAN 18
163#define DMOV_SDC1_CRCI 1
164
165#define DMOV_SDC2_CHAN 19
166#define DMOV_SDC2_CRCI 4
167
168#define DMOV_SDC3_CHAN 20
169#define DMOV_SDC3_CRCI 2
170
171#define DMOV_SDC4_CHAN 21
172#define DMOV_SDC4_CRCI 5
173
174#define DMOV_SDC5_CHAN 21
175#define DMOV_SDC5_CRCI 14
176
177#define DMOV_TSIF_CHAN 4
178#define DMOV_TSIF_CRCI 6
179
180#define DMOV_HSUART1_TX_CHAN 22
181#define DMOV_HSUART1_TX_CRCI 8
182
183#define DMOV_HSUART1_RX_CHAN 23
184#define DMOV_HSUART1_RX_CRCI 9
185
186#define DMOV_HSUART2_TX_CHAN 8
187#define DMOV_HSUART2_TX_CRCI 13
188
189#define DMOV_HSUART2_RX_CHAN 8
190#define DMOV_HSUART2_RX_CRCI 14
191
192#elif defined(CONFIG_ARCH_MSM8960)
193#define DMOV_GP_CHAN 13
194
195#define DMOV_CE_IN_CHAN 0
196#define DMOV_CE_IN_CRCI 2
197
198#define DMOV_CE_OUT_CHAN 1
199#define DMOV_CE_OUT_CRCI 3
200
201/* SDC doesn't use ADM on 8960. Need these to compile */
202#define DMOV_SDC1_CHAN 13
203#define DMOV_SDC1_CRCI 0
204
205#define DMOV_SDC2_CHAN 13
206#define DMOV_SDC2_CRCI 0
207
208#define DMOV_SDC3_CHAN 13
209#define DMOV_SDC3_CRCI 0
210
211#define DMOV_SDC4_CHAN 13
212#define DMOV_SDC4_CRCI 0
213
214#define DMOV_SDC5_CHAN 13
215#define DMOV_SDC5_CRCI 0
216
217#elif defined(CONFIG_ARCH_FSM9XXX)
218/* defined in dma-fsm9xxx.h */
219
220#else
221#define DMOV_GP_CHAN 4
222
223#define DMOV_CE_IN_CHAN 5
224#define DMOV_CE_IN_CRCI 1
225
226#define DMOV_CE_OUT_CHAN 6
227#define DMOV_CE_OUT_CRCI 2
228
229#define DMOV_CE_HASH_CRCI 3
230
Russell Kinga09e64f2008-08-05 16:14:15 +0100231#define DMOV_NAND_CHAN 7
232#define DMOV_NAND_CRCI_CMD 5
233#define DMOV_NAND_CRCI_DATA 4
234
235#define DMOV_SDC1_CHAN 8
236#define DMOV_SDC1_CRCI 6
237
238#define DMOV_SDC2_CHAN 8
239#define DMOV_SDC2_CRCI 7
240
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700241#define DMOV_SDC3_CHAN 8
242#define DMOV_SDC3_CRCI 12
243
244#define DMOV_SDC4_CHAN 8
245#define DMOV_SDC4_CRCI 13
246
Russell Kinga09e64f2008-08-05 16:14:15 +0100247#define DMOV_TSIF_CHAN 10
248#define DMOV_TSIF_CRCI 10
249
250#define DMOV_USB_CHAN 11
251
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700252#define DMOV_HSUART1_TX_CHAN 4
253#define DMOV_HSUART1_TX_CRCI 8
254
255#define DMOV_HSUART1_RX_CHAN 9
256#define DMOV_HSUART1_RX_CRCI 9
257
258#define DMOV_HSUART2_TX_CHAN 4
259#define DMOV_HSUART2_TX_CRCI 14
260
261#define DMOV_HSUART2_RX_CHAN 11
262#define DMOV_HSUART2_RX_CRCI 15
263#endif
264
265
Russell Kinga09e64f2008-08-05 16:14:15 +0100266/* no client rate control ifc (eg, ram) */
267#define DMOV_NONE_CRCI 0
268
269
270/* If the CMD_PTR register has CMD_PTR_LIST selected, the data mover
271 * is going to walk a list of 32bit pointers as described below. Each
272 * pointer points to a *array* of dmov_s, etc structs. The last pointer
273 * in the list is marked with CMD_PTR_LP. The last struct in each array
274 * is marked with CMD_LC (see below).
275 */
276#define CMD_PTR_ADDR(addr) ((addr) >> 3)
277#define CMD_PTR_LP (1 << 31) /* last pointer */
278#define CMD_PTR_PT (3 << 29) /* ? */
279
280/* Single Item Mode */
281typedef struct {
282 unsigned cmd;
283 unsigned src;
284 unsigned dst;
285 unsigned len;
286} dmov_s;
287
288/* Scatter/Gather Mode */
289typedef struct {
290 unsigned cmd;
291 unsigned src_dscr;
292 unsigned dst_dscr;
293 unsigned _reserved;
294} dmov_sg;
295
Brian Swetland8a0f6f12008-09-10 14:58:25 -0700296/* Box mode */
297typedef struct {
298 uint32_t cmd;
299 uint32_t src_row_addr;
300 uint32_t dst_row_addr;
301 uint32_t src_dst_len;
302 uint32_t num_rows;
303 uint32_t row_offset;
304} dmov_box;
305
Russell Kinga09e64f2008-08-05 16:14:15 +0100306/* bits for the cmd field of the above structures */
307
308#define CMD_LC (1 << 31) /* last command */
309#define CMD_FR (1 << 22) /* force result -- does not work? */
310#define CMD_OCU (1 << 21) /* other channel unblock */
311#define CMD_OCB (1 << 20) /* other channel block */
312#define CMD_TCB (1 << 19) /* ? */
313#define CMD_DAH (1 << 18) /* destination address hold -- does not work?*/
314#define CMD_SAH (1 << 17) /* source address hold -- does not work? */
315
316#define CMD_MODE_SINGLE (0 << 0) /* dmov_s structure used */
317#define CMD_MODE_SG (1 << 0) /* untested */
318#define CMD_MODE_IND_SG (2 << 0) /* untested */
319#define CMD_MODE_BOX (3 << 0) /* untested */
320
321#define CMD_DST_SWAP_BYTES (1 << 14) /* exchange each byte n with byte n+1 */
322#define CMD_DST_SWAP_SHORTS (1 << 15) /* exchange each short n with short n+1 */
323#define CMD_DST_SWAP_WORDS (1 << 16) /* exchange each word n with word n+1 */
324
325#define CMD_SRC_SWAP_BYTES (1 << 11) /* exchange each byte n with byte n+1 */
326#define CMD_SRC_SWAP_SHORTS (1 << 12) /* exchange each short n with short n+1 */
327#define CMD_SRC_SWAP_WORDS (1 << 13) /* exchange each word n with word n+1 */
328
329#define CMD_DST_CRCI(n) (((n) & 15) << 7)
330#define CMD_SRC_CRCI(n) (((n) & 15) << 3)
331
332#endif