Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1 | /* Copyright (c) 2009, Code Aurora Forum. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | * |
| 12 | */ |
| 13 | |
| 14 | #ifndef __ARCH_ARM_MACH_PMIC_H |
| 15 | #define __ARCH_ARM_MACH_PMIC_H |
| 16 | |
| 17 | #include "proc_comm.h" |
| 18 | |
| 19 | enum spkr_left_right { |
| 20 | LEFT_SPKR, |
| 21 | RIGHT_SPKR, |
| 22 | }; |
| 23 | |
| 24 | enum spkr_gain { |
| 25 | SPKR_GAIN_MINUS16DB, /* -16 db */ |
| 26 | SPKR_GAIN_MINUS12DB, /* -12 db */ |
| 27 | SPKR_GAIN_MINUS08DB, /* -08 db */ |
| 28 | SPKR_GAIN_MINUS04DB, /* -04 db */ |
| 29 | SPKR_GAIN_00DB, /* 00 db */ |
| 30 | SPKR_GAIN_PLUS04DB, /* +04 db */ |
| 31 | SPKR_GAIN_PLUS08DB, /* +08 db */ |
| 32 | SPKR_GAIN_PLUS12DB, /* +12 db */ |
| 33 | }; |
| 34 | |
| 35 | enum spkr_dly { |
| 36 | SPKR_DLY_10MS, /* ~10 ms delay */ |
| 37 | SPKR_DLY_100MS, /* ~100 ms delay */ |
| 38 | }; |
| 39 | |
| 40 | enum spkr_hpf_corner_freq { |
| 41 | SPKR_FREQ_1_39KHZ, /* 1.39 kHz */ |
| 42 | SPKR_FREQ_0_64KHZ, /* 0.64 kHz */ |
| 43 | SPKR_FREQ_0_86KHZ, /* 0.86 kHz */ |
| 44 | SPKR_FREQ_0_51KHZ, /* 0.51 kHz */ |
| 45 | SPKR_FREQ_1_06KHZ, /* 1.06 kHz */ |
| 46 | SPKR_FREQ_0_57KHZ, /* 0.57 kHz */ |
| 47 | SPKR_FREQ_0_73KHZ, /* 0.73 kHz */ |
| 48 | SPKR_FREQ_0_47KHZ, /* 0.47 kHz */ |
| 49 | SPKR_FREQ_1_20KHZ, /* 1.20 kHz */ |
| 50 | SPKR_FREQ_0_60KHZ, /* 0.60 kHz */ |
| 51 | SPKR_FREQ_0_76KHZ, /* 0.76 kHz */ |
| 52 | SPKR_FREQ_0_49KHZ, /* 0.49 kHz */ |
| 53 | SPKR_FREQ_0_95KHZ, /* 0.95 kHz */ |
| 54 | SPKR_FREQ_0_54KHZ, /* 0.54 kHz */ |
| 55 | SPKR_FREQ_0_68KHZ, /* 0.68 kHz */ |
| 56 | SPKR_FREQ_0_45KHZ, /* 0.45 kHz */ |
| 57 | }; |
| 58 | |
| 59 | /* Turn the speaker on or off and enables or disables mute.*/ |
| 60 | enum spkr_cmd { |
| 61 | SPKR_DISABLE, /* Enable Speaker */ |
| 62 | SPKR_ENABLE, /* Disable Speaker */ |
| 63 | SPKR_MUTE_OFF, /* turn speaker mute off, SOUND ON */ |
| 64 | SPKR_MUTE_ON, /* turn speaker mute on, SOUND OFF */ |
| 65 | SPKR_OFF, /* turn speaker OFF (speaker disable and mute on) */ |
| 66 | SPKR_ON, /* turn speaker ON (speaker enable and mute off) */ |
| 67 | SPKR_SET_FREQ_CMD, /* set speaker frequency */ |
| 68 | SPKR_GET_FREQ_CMD, /* get speaker frequency */ |
| 69 | SPKR_SET_GAIN_CMD, /* set speaker gain */ |
| 70 | SPKR_GET_GAIN_CMD, /* get speaker gain */ |
| 71 | SPKR_SET_DELAY_CMD, /* set speaker delay */ |
| 72 | SPKR_GET_DELAY_CMD, /* get speaker delay */ |
| 73 | SPKR_SET_PDM_MODE, |
| 74 | SPKR_SET_PWM_MODE, |
| 75 | }; |
| 76 | |
| 77 | struct spkr_config_mode { |
| 78 | uint32_t is_right_chan_en; |
| 79 | uint32_t is_left_chan_en; |
| 80 | uint32_t is_right_left_chan_added; |
| 81 | uint32_t is_stereo_en; |
| 82 | uint32_t is_usb_with_hpf_20hz; |
| 83 | uint32_t is_mux_bypassed; |
| 84 | uint32_t is_hpf_en; |
| 85 | uint32_t is_sink_curr_from_ref_volt_cir_en; |
| 86 | }; |
| 87 | |
| 88 | enum mic_volt { |
| 89 | MIC_VOLT_2_00V, /* 2.00 V */ |
| 90 | MIC_VOLT_1_93V, /* 1.93 V */ |
| 91 | MIC_VOLT_1_80V, /* 1.80 V */ |
| 92 | MIC_VOLT_1_73V, /* 1.73 V */ |
| 93 | }; |
| 94 | |
| 95 | enum ledtype { |
| 96 | LED_LCD, |
| 97 | LED_KEYPAD, |
| 98 | }; |
| 99 | |
| 100 | enum flash_led_mode { |
| 101 | FLASH_LED_MODE__MANUAL, |
| 102 | FLASH_LED_MODE__DBUS1, |
| 103 | FLASH_LED_MODE__DBUS2, |
| 104 | FLASH_LED_MODE__DBUS3, |
| 105 | }; |
| 106 | |
| 107 | enum flash_led_pol { |
| 108 | FLASH_LED_POL__ACTIVE_HIGH, |
| 109 | FLASH_LED_POL__ACTIVE_LOW, |
| 110 | }; |
| 111 | |
| 112 | enum switch_cmd { |
| 113 | OFF_CMD, |
| 114 | ON_CMD |
| 115 | }; |
| 116 | |
| 117 | enum vreg_lp_id { |
| 118 | PM_VREG_LP_MSMA_ID, |
| 119 | PM_VREG_LP_MSMP_ID, |
| 120 | PM_VREG_LP_MSME1_ID, |
| 121 | PM_VREG_LP_GP3_ID, |
| 122 | PM_VREG_LP_MSMC_ID, |
| 123 | PM_VREG_LP_MSME2_ID, |
| 124 | PM_VREG_LP_GP4_ID, |
| 125 | PM_VREG_LP_GP1_ID, |
| 126 | PM_VREG_LP_RFTX_ID, |
| 127 | PM_VREG_LP_RFRX1_ID, |
| 128 | PM_VREG_LP_RFRX2_ID, |
| 129 | PM_VREG_LP_WLAN_ID, |
| 130 | PM_VREG_LP_MMC_ID, |
| 131 | PM_VREG_LP_RUIM_ID, |
| 132 | PM_VREG_LP_MSMC0_ID, |
| 133 | PM_VREG_LP_GP2_ID, |
| 134 | PM_VREG_LP_GP5_ID, |
| 135 | PM_VREG_LP_GP6_ID, |
| 136 | PM_VREG_LP_MPLL_ID, |
| 137 | PM_VREG_LP_RFUBM_ID, |
| 138 | PM_VREG_LP_RFA_ID, |
| 139 | PM_VREG_LP_CDC2_ID, |
| 140 | PM_VREG_LP_RFTX2_ID, |
| 141 | PM_VREG_LP_USIM_ID, |
| 142 | PM_VREG_LP_USB2P6_ID, |
| 143 | PM_VREG_LP_TCXO_ID, |
| 144 | PM_VREG_LP_USB3P3_ID, |
| 145 | |
| 146 | PM_VREG_LP_MSME_ID = PM_VREG_LP_MSME1_ID, |
| 147 | /* backward compatible enums only */ |
| 148 | PM_VREG_LP_CAM_ID = PM_VREG_LP_GP1_ID, |
| 149 | PM_VREG_LP_MDDI_ID = PM_VREG_LP_GP2_ID, |
| 150 | PM_VREG_LP_RUIM2_ID = PM_VREG_LP_GP3_ID, |
| 151 | PM_VREG_LP_AUX_ID = PM_VREG_LP_GP4_ID, |
| 152 | PM_VREG_LP_AUX2_ID = PM_VREG_LP_GP5_ID, |
| 153 | PM_VREG_LP_BT_ID = PM_VREG_LP_GP6_ID, |
| 154 | PM_VREG_LP_MSMC_LDO_ID = PM_VREG_LP_MSMC_ID, |
| 155 | PM_VREG_LP_MSME1_LDO_ID = PM_VREG_LP_MSME1_ID, |
| 156 | PM_VREG_LP_MSME2_LDO_ID = PM_VREG_LP_MSME2_ID, |
| 157 | PM_VREG_LP_RFA1_ID = PM_VREG_LP_RFRX2_ID, |
| 158 | PM_VREG_LP_RFA2_ID = PM_VREG_LP_RFTX2_ID, |
| 159 | PM_VREG_LP_XO_ID = PM_VREG_LP_TCXO_ID |
| 160 | }; |
| 161 | |
| 162 | enum mpp_which { |
| 163 | PM_MPP_1, |
| 164 | PM_MPP_2, |
| 165 | PM_MPP_3, |
| 166 | PM_MPP_4, |
| 167 | PM_MPP_5, |
| 168 | PM_MPP_6, |
| 169 | PM_MPP_7, |
| 170 | PM_MPP_8, |
| 171 | PM_MPP_9, |
| 172 | PM_MPP_10, |
| 173 | PM_MPP_11, |
| 174 | PM_MPP_12, |
| 175 | PM_MPP_13, |
| 176 | PM_MPP_14, |
| 177 | PM_MPP_15, |
| 178 | PM_MPP_16, |
| 179 | PM_MPP_17, |
| 180 | PM_MPP_18, |
| 181 | PM_MPP_19, |
| 182 | PM_MPP_20, |
| 183 | PM_MPP_21, |
| 184 | PM_MPP_22, |
| 185 | |
| 186 | PM_NUM_MPP_HAN = PM_MPP_4 + 1, |
| 187 | PM_NUM_MPP_KIP = PM_MPP_4 + 1, |
| 188 | PM_NUM_MPP_EPIC = PM_MPP_4 + 1, |
| 189 | PM_NUM_MPP_PM7500 = PM_MPP_22 + 1, |
| 190 | PM_NUM_MPP_PM6650 = PM_MPP_12 + 1, |
| 191 | PM_NUM_MPP_PM6658 = PM_MPP_12 + 1, |
| 192 | PM_NUM_MPP_PANORAMIX = PM_MPP_2 + 1, |
| 193 | PM_NUM_MPP_PM6640 = PM_NUM_MPP_PANORAMIX, |
| 194 | PM_NUM_MPP_PM6620 = PM_NUM_MPP_PANORAMIX |
| 195 | }; |
| 196 | |
| 197 | enum mpp_dlogic_level { |
| 198 | PM_MPP__DLOGIC__LVL_MSME, |
| 199 | PM_MPP__DLOGIC__LVL_MSMP, |
| 200 | PM_MPP__DLOGIC__LVL_RUIM, |
| 201 | PM_MPP__DLOGIC__LVL_MMC, |
| 202 | PM_MPP__DLOGIC__LVL_VDD, |
| 203 | }; |
| 204 | |
| 205 | enum mpp_dlogic_in_dbus { |
| 206 | PM_MPP__DLOGIC_IN__DBUS_NONE, |
| 207 | PM_MPP__DLOGIC_IN__DBUS1, |
| 208 | PM_MPP__DLOGIC_IN__DBUS2, |
| 209 | PM_MPP__DLOGIC_IN__DBUS3, |
| 210 | }; |
| 211 | |
| 212 | enum mpp_dlogic_out_ctrl { |
| 213 | PM_MPP__DLOGIC_OUT__CTRL_LOW, |
| 214 | PM_MPP__DLOGIC_OUT__CTRL_HIGH, |
| 215 | PM_MPP__DLOGIC_OUT__CTRL_MPP, |
| 216 | PM_MPP__DLOGIC_OUT__CTRL_NOT_MPP, |
| 217 | }; |
| 218 | |
| 219 | enum mpp_i_sink_level { |
| 220 | PM_MPP__I_SINK__LEVEL_5mA, |
| 221 | PM_MPP__I_SINK__LEVEL_10mA, |
| 222 | PM_MPP__I_SINK__LEVEL_15mA, |
| 223 | PM_MPP__I_SINK__LEVEL_20mA, |
| 224 | PM_MPP__I_SINK__LEVEL_25mA, |
| 225 | PM_MPP__I_SINK__LEVEL_30mA, |
| 226 | PM_MPP__I_SINK__LEVEL_35mA, |
| 227 | PM_MPP__I_SINK__LEVEL_40mA, |
| 228 | }; |
| 229 | |
| 230 | enum mpp_i_sink_switch { |
| 231 | PM_MPP__I_SINK__SWITCH_DIS, |
| 232 | PM_MPP__I_SINK__SWITCH_ENA, |
| 233 | PM_MPP__I_SINK__SWITCH_ENA_IF_MPP_HIGH, |
| 234 | PM_MPP__I_SINK__SWITCH_ENA_IF_MPP_LOW, |
| 235 | }; |
| 236 | |
| 237 | enum pm_vib_mot_mode { |
| 238 | PM_VIB_MOT_MODE__MANUAL, |
| 239 | PM_VIB_MOT_MODE__DBUS1, |
| 240 | PM_VIB_MOT_MODE__DBUS2, |
| 241 | PM_VIB_MOT_MODE__DBUS3, |
| 242 | }; |
| 243 | |
| 244 | enum pm_vib_mot_pol { |
| 245 | PM_VIB_MOT_POL__ACTIVE_HIGH, |
| 246 | PM_VIB_MOT_POL__ACTIVE_LOW, |
| 247 | }; |
| 248 | |
| 249 | struct rtc_time { |
| 250 | uint sec; |
| 251 | }; |
| 252 | |
| 253 | enum rtc_alarm { |
| 254 | PM_RTC_ALARM_1, |
| 255 | }; |
| 256 | |
| 257 | |
| 258 | int pmic_lp_mode_control(enum switch_cmd cmd, enum vreg_lp_id id); |
| 259 | int pmic_secure_mpp_control_digital_output(enum mpp_which which, |
| 260 | enum mpp_dlogic_level level, enum mpp_dlogic_out_ctrl out); |
| 261 | int pmic_secure_mpp_config_i_sink(enum mpp_which which, |
| 262 | enum mpp_i_sink_level level, enum mpp_i_sink_switch onoff); |
| 263 | int pmic_secure_mpp_config_digital_input(enum mpp_which which, |
| 264 | enum mpp_dlogic_level level, enum mpp_dlogic_in_dbus dbus); |
| 265 | int pmic_speaker_cmd(const enum spkr_cmd cmd); |
| 266 | int pmic_set_spkr_configuration(struct spkr_config_mode *cfg); |
| 267 | int pmic_spkr_en_right_chan(uint enable); |
| 268 | int pmic_spkr_en_left_chan(uint enable); |
| 269 | int pmic_spkr_en(enum spkr_left_right left_right, uint enabled); |
| 270 | int pmic_spkr_set_gain(enum spkr_left_right left_right, enum spkr_gain gain); |
| 271 | int pmic_set_speaker_gain(enum spkr_gain gain); |
| 272 | int pmic_set_speaker_delay(enum spkr_dly delay); |
| 273 | int pmic_speaker_1k6_zin_enable(uint enable); |
| 274 | int pmic_spkr_set_mux_hpf_corner_freq(enum spkr_hpf_corner_freq freq); |
| 275 | int pmic_spkr_select_usb_with_hpf_20hz(uint enable); |
| 276 | int pmic_spkr_bypass_mux(uint enable); |
| 277 | int pmic_spkr_en_hpf(uint enable); |
| 278 | int pmic_spkr_en_sink_curr_from_ref_volt_cir(uint enable); |
| 279 | int pmic_spkr_set_delay(enum spkr_left_right left_right, enum spkr_dly delay); |
| 280 | int pmic_spkr_en_mute(enum spkr_left_right left_right, uint enabled); |
| 281 | int pmic_mic_en(uint enable); |
| 282 | int pmic_mic_set_volt(enum mic_volt vol); |
| 283 | int pmic_set_led_intensity(enum ledtype type, int level); |
| 284 | int pmic_flash_led_set_current(uint16_t milliamps); |
| 285 | int pmic_flash_led_set_mode(enum flash_led_mode mode); |
| 286 | int pmic_flash_led_set_polarity(enum flash_led_pol pol); |
| 287 | int pmic_spkr_add_right_left_chan(uint enable); |
| 288 | int pmic_spkr_en_stereo(uint enable); |
| 289 | int pmic_vib_mot_set_volt(uint vol); |
| 290 | int pmic_vib_mot_set_mode(enum pm_vib_mot_mode mode); |
| 291 | int pmic_vib_mot_set_polarity(enum pm_vib_mot_pol pol); |
| 292 | int pmic_vid_en(uint enable); |
| 293 | int pmic_vid_load_detect_en(uint enable); |
| 294 | |
| 295 | #endif |