Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame^] | 1 | /* |
| 2 | * Platform information definitions for the |
| 3 | * universal Freescale Ethernet driver. |
| 4 | * |
| 5 | * Copyright (c) 2003 Intracom S.A. |
| 6 | * by Pantelis Antoniou <panto@intracom.gr> |
| 7 | * |
| 8 | * 2005 (c) MontaVista Software, Inc. |
| 9 | * Vitaly Bordug <vbordug@ru.mvista.com> |
| 10 | * |
| 11 | * This file is licensed under the terms of the GNU General Public License |
| 12 | * version 2. This program is licensed "as is" without any warranty of any |
| 13 | * kind, whether express or implied. |
| 14 | */ |
| 15 | |
| 16 | #ifndef FS_ENET_PD_H |
| 17 | #define FS_ENET_PD_H |
| 18 | |
| 19 | #include <linux/version.h> |
| 20 | #include <asm/types.h> |
| 21 | |
| 22 | #define FS_ENET_NAME "fs_enet" |
| 23 | |
| 24 | enum fs_id { |
| 25 | fsid_fec1, |
| 26 | fsid_fec2, |
| 27 | fsid_fcc1, |
| 28 | fsid_fcc2, |
| 29 | fsid_fcc3, |
| 30 | fsid_scc1, |
| 31 | fsid_scc2, |
| 32 | fsid_scc3, |
| 33 | fsid_scc4, |
| 34 | }; |
| 35 | |
| 36 | #define FS_MAX_INDEX 9 |
| 37 | |
| 38 | static inline int fs_get_fec_index(enum fs_id id) |
| 39 | { |
| 40 | if (id >= fsid_fec1 && id <= fsid_fec2) |
| 41 | return id - fsid_fec1; |
| 42 | return -1; |
| 43 | } |
| 44 | |
| 45 | static inline int fs_get_fcc_index(enum fs_id id) |
| 46 | { |
| 47 | if (id >= fsid_fcc1 && id <= fsid_fcc3) |
| 48 | return id - fsid_fcc1; |
| 49 | return -1; |
| 50 | } |
| 51 | |
| 52 | static inline int fs_get_scc_index(enum fs_id id) |
| 53 | { |
| 54 | if (id >= fsid_scc1 && id <= fsid_scc4) |
| 55 | return id - fsid_scc1; |
| 56 | return -1; |
| 57 | } |
| 58 | |
| 59 | enum fs_mii_method { |
| 60 | fsmii_fixed, |
| 61 | fsmii_fec, |
| 62 | fsmii_bitbang, |
| 63 | }; |
| 64 | |
| 65 | enum fs_ioport { |
| 66 | fsiop_porta, |
| 67 | fsiop_portb, |
| 68 | fsiop_portc, |
| 69 | fsiop_portd, |
| 70 | fsiop_porte, |
| 71 | }; |
| 72 | |
| 73 | struct fs_mii_bus_info { |
| 74 | int method; /* mii method */ |
| 75 | int id; /* the id of the mii_bus */ |
| 76 | int disable_aneg; /* if the controller needs to negothiate speed & duplex */ |
| 77 | int lpa; /* the default board-specific vallues will be applied otherwise */ |
| 78 | |
| 79 | union { |
| 80 | struct { |
| 81 | int duplex; |
| 82 | int speed; |
| 83 | } fixed; |
| 84 | |
| 85 | struct { |
| 86 | /* nothing */ |
| 87 | } fec; |
| 88 | |
| 89 | struct { |
| 90 | /* nothing */ |
| 91 | } scc; |
| 92 | |
| 93 | struct { |
| 94 | int mdio_port; /* port & bit for MDIO */ |
| 95 | int mdio_bit; |
| 96 | int mdc_port; /* port & bit for MDC */ |
| 97 | int mdc_bit; |
| 98 | int delay; /* delay in us */ |
| 99 | } bitbang; |
| 100 | } i; |
| 101 | }; |
| 102 | |
| 103 | struct fs_platform_info { |
| 104 | |
| 105 | void(*init_ioports)(void); |
| 106 | /* device specific information */ |
| 107 | int fs_no; /* controller index */ |
| 108 | |
| 109 | u32 cp_page; /* CPM page */ |
| 110 | u32 cp_block; /* CPM sblock */ |
| 111 | |
| 112 | u32 clk_trx; /* some stuff for pins & mux configuration*/ |
| 113 | u32 clk_route; |
| 114 | u32 clk_mask; |
| 115 | |
| 116 | u32 mem_offset; |
| 117 | u32 dpram_offset; |
| 118 | u32 fcc_regs_c; |
| 119 | |
| 120 | u32 device_flags; |
| 121 | |
| 122 | int phy_addr; /* the phy address (-1 no phy) */ |
| 123 | int phy_irq; /* the phy irq (if it exists) */ |
| 124 | |
| 125 | const struct fs_mii_bus_info *bus_info; |
| 126 | |
| 127 | int rx_ring, tx_ring; /* number of buffers on rx */ |
| 128 | __u8 macaddr[6]; /* mac address */ |
| 129 | int rx_copybreak; /* limit we copy small frames */ |
| 130 | int use_napi; /* use NAPI */ |
| 131 | int napi_weight; /* NAPI weight */ |
| 132 | |
| 133 | int use_rmii; /* use RMII mode */ |
| 134 | }; |
| 135 | |
| 136 | #endif |