| Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1 | /* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | * |
| 12 | */ |
| 13 | #include <linux/kernel.h> |
| 14 | #include <linux/init.h> |
| 15 | #include <linux/io.h> |
| 16 | #include <mach/board.h> |
| 17 | |
| 18 | #include "acpuclock.h" |
| 19 | |
| 20 | /* Registers */ |
| 21 | #define PLL1_CTL_ADDR (MSM_CLK_CTL_BASE + 0x604) |
| 22 | |
| 23 | unsigned long acpuclk_get_rate(int cpu) |
| 24 | { |
| 25 | unsigned int pll1_ctl; |
| 26 | unsigned int pll1_l, pll1_div2; |
| 27 | unsigned int pll1_khz; |
| 28 | |
| 29 | pll1_ctl = readl_relaxed(PLL1_CTL_ADDR); |
| 30 | pll1_l = ((pll1_ctl >> 3) & 0x3f) * 2; |
| 31 | pll1_div2 = pll1_ctl & 0x20000; |
| 32 | pll1_khz = 19200 * pll1_l; |
| 33 | if (pll1_div2) |
| 34 | pll1_khz >>= 1; |
| 35 | |
| 36 | return pll1_khz; |
| 37 | } |
| 38 | |
| 39 | void __init msm_acpu_clock_init(struct msm_acpu_clock_platform_data *clkdata) |
| 40 | { |
| 41 | pr_info("ACPU running at %lu KHz\n", acpuclk_get_rate(0)); |
| 42 | } |