Jean Delvare | 5db3d3d | 2006-01-09 23:32:57 +0100 | [diff] [blame] | 1 | Kernel driver f71805f |
| 2 | ===================== |
| 3 | |
| 4 | Supported chips: |
| 5 | * Fintek F71805F/FG |
| 6 | Prefix: 'f71805f' |
| 7 | Addresses scanned: none, address read from Super I/O config space |
| 8 | Datasheet: Provided by Fintek on request |
Jean Delvare | 51c997d | 2006-12-12 18:18:29 +0100 | [diff] [blame^] | 9 | * Fintek F71872F/FG |
| 10 | Prefix: 'f71872f' |
| 11 | Addresses scanned: none, address read from Super I/O config space |
| 12 | Datasheet: Provided by Fintek on request |
Jean Delvare | 5db3d3d | 2006-01-09 23:32:57 +0100 | [diff] [blame] | 13 | |
| 14 | Author: Jean Delvare <khali@linux-fr.org> |
| 15 | |
| 16 | Thanks to Denis Kieft from Barracuda Networks for the donation of a |
| 17 | test system (custom Jetway K8M8MS motherboard, with CPU and RAM) and |
| 18 | for providing initial documentation. |
| 19 | |
Jean Delvare | e9cea64 | 2006-12-12 18:18:27 +0100 | [diff] [blame] | 20 | Thanks to Kris Chen and Aaron Huang from Fintek for answering technical |
| 21 | questions and providing additional documentation. |
Jean Delvare | 5db3d3d | 2006-01-09 23:32:57 +0100 | [diff] [blame] | 22 | |
| 23 | Thanks to Chris Lin from Jetway for providing wiring schematics and |
Jean Delvare | 15fe25c | 2006-10-08 21:59:54 +0200 | [diff] [blame] | 24 | answering technical questions. |
Jean Delvare | 5db3d3d | 2006-01-09 23:32:57 +0100 | [diff] [blame] | 25 | |
| 26 | |
| 27 | Description |
| 28 | ----------- |
| 29 | |
| 30 | The Fintek F71805F/FG Super I/O chip includes complete hardware monitoring |
| 31 | capabilities. It can monitor up to 9 voltages (counting its own power |
| 32 | source), 3 fans and 3 temperature sensors. |
| 33 | |
| 34 | This chip also has fan controlling features, using either DC or PWM, in |
Jean Delvare | e9cea64 | 2006-12-12 18:18:27 +0100 | [diff] [blame] | 35 | three different modes (one manual, two automatic). |
Jean Delvare | 5db3d3d | 2006-01-09 23:32:57 +0100 | [diff] [blame] | 36 | |
Jean Delvare | 51c997d | 2006-12-12 18:18:29 +0100 | [diff] [blame^] | 37 | The Fintek F71872F/FG Super I/O chip is almost the same, with two |
| 38 | additional internal voltages monitored (VSB and battery). It also features |
| 39 | 6 VID inputs. The VID inputs are not yet supported by this driver. |
| 40 | |
Jean Delvare | 5db3d3d | 2006-01-09 23:32:57 +0100 | [diff] [blame] | 41 | The driver assumes that no more than one chip is present, which seems |
| 42 | reasonable. |
| 43 | |
| 44 | |
| 45 | Voltage Monitoring |
| 46 | ------------------ |
| 47 | |
| 48 | Voltages are sampled by an 8-bit ADC with a LSB of 8 mV. The supported |
| 49 | range is thus from 0 to 2.040 V. Voltage values outside of this range |
| 50 | need external resistors. An exception is in0, which is used to monitor |
| 51 | the chip's own power source (+3.3V), and is divided internally by a |
Jean Delvare | 51c997d | 2006-12-12 18:18:29 +0100 | [diff] [blame^] | 52 | factor 2. For the F71872F/FG, in9 (VSB) and in10 (battery) are also |
| 53 | divided internally by a factor 2. |
Jean Delvare | 5db3d3d | 2006-01-09 23:32:57 +0100 | [diff] [blame] | 54 | |
| 55 | The two LSB of the voltage limit registers are not used (always 0), so |
| 56 | you can only set the limits in steps of 32 mV (before scaling). |
| 57 | |
| 58 | The wirings and resistor values suggested by Fintek are as follow: |
| 59 | |
| 60 | pin expected |
| 61 | name use R1 R2 divider raw val. |
| 62 | |
| 63 | in0 VCC VCC3.3V int. int. 2.00 1.65 V |
| 64 | in1 VIN1 VTT1.2V 10K - 1.00 1.20 V |
| 65 | in2 VIN2 VRAM 100K 100K 2.00 ~1.25 V (1) |
| 66 | in3 VIN3 VCHIPSET 47K 100K 1.47 2.24 V (2) |
| 67 | in4 VIN4 VCC5V 200K 47K 5.25 0.95 V |
| 68 | in5 VIN5 +12V 200K 20K 11.00 1.05 V |
| 69 | in6 VIN6 VCC1.5V 10K - 1.00 1.50 V |
| 70 | in7 VIN7 VCORE 10K - 1.00 ~1.40 V (1) |
| 71 | in8 VIN8 VSB5V 200K 47K 1.00 0.95 V |
Jean Delvare | 51c997d | 2006-12-12 18:18:29 +0100 | [diff] [blame^] | 72 | in10 VSB VSB3.3V int. int. 2.00 1.65 V (3) |
| 73 | in9 VBAT VBATTERY int. int. 2.00 1.50 V (3) |
Jean Delvare | 5db3d3d | 2006-01-09 23:32:57 +0100 | [diff] [blame] | 74 | |
| 75 | (1) Depends on your hardware setup. |
| 76 | (2) Obviously not correct, swapping R1 and R2 would make more sense. |
Jean Delvare | 51c997d | 2006-12-12 18:18:29 +0100 | [diff] [blame^] | 77 | (3) F71872F/FG only. |
Jean Delvare | 5db3d3d | 2006-01-09 23:32:57 +0100 | [diff] [blame] | 78 | |
| 79 | These values can be used as hints at best, as motherboard manufacturers |
| 80 | are free to use a completely different setup. As a matter of fact, the |
| 81 | Jetway K8M8MS uses a significantly different setup. You will have to |
| 82 | find out documentation about your own motherboard, and edit sensors.conf |
| 83 | accordingly. |
| 84 | |
| 85 | Each voltage measured has associated low and high limits, each of which |
| 86 | triggers an alarm when crossed. |
| 87 | |
| 88 | |
| 89 | Fan Monitoring |
| 90 | -------------- |
| 91 | |
| 92 | Fan rotation speeds are reported as 12-bit values from a gated clock |
| 93 | signal. Speeds down to 366 RPM can be measured. There is no theoretical |
| 94 | high limit, but values over 6000 RPM seem to cause problem. The effective |
| 95 | resolution is much lower than you would expect, the step between different |
| 96 | register values being 10 rather than 1. |
| 97 | |
| 98 | The chip assumes 2 pulse-per-revolution fans. |
| 99 | |
| 100 | An alarm is triggered if the rotation speed drops below a programmable |
| 101 | limit or is too low to be measured. |
| 102 | |
| 103 | |
| 104 | Temperature Monitoring |
| 105 | ---------------------- |
| 106 | |
| 107 | Temperatures are reported in degrees Celsius. Each temperature measured |
| 108 | has a high limit, those crossing triggers an alarm. There is an associated |
| 109 | hysteresis value, below which the temperature has to drop before the |
| 110 | alarm is cleared. |
| 111 | |
| 112 | All temperature channels are external, there is no embedded temperature |
| 113 | sensor. Each channel can be used for connecting either a thermal diode |
| 114 | or a thermistor. The driver reports the currently selected mode, but |
| 115 | doesn't allow changing it. In theory, the BIOS should have configured |
| 116 | everything properly. |
Jean Delvare | e9cea64 | 2006-12-12 18:18:27 +0100 | [diff] [blame] | 117 | |
| 118 | |
| 119 | Fan Control |
| 120 | ----------- |
| 121 | |
| 122 | Both PWM (pulse-width modulation) and DC fan speed control methods are |
| 123 | supported. The right one to use depends on external circuitry on the |
| 124 | motherboard, so the driver assumes that the BIOS set the method |
| 125 | properly. The driver will report the method, but won't let you change |
| 126 | it. |
| 127 | |
| 128 | When the PWM method is used, you can select the operating frequency, |
| 129 | from 187.5 kHz (default) to 31 Hz. The best frequency depends on the |
| 130 | fan model. As a rule of thumb, lower frequencies seem to give better |
| 131 | control, but may generate annoying high-pitch noise. Fintek recommends |
| 132 | not going below 1 kHz, as the fan tachometers get confused by lower |
| 133 | frequencies as well. |
| 134 | |
| 135 | When the DC method is used, Fintek recommends not going below 5 V, which |
| 136 | corresponds to a pwm value of 106 for the driver. The driver doesn't |
| 137 | enforce this limit though. |
| 138 | |
| 139 | Three different fan control modes are supported: |
| 140 | |
| 141 | * Manual mode |
| 142 | You ask for a specific PWM duty cycle or DC voltage. |
| 143 | |
| 144 | * Fan speed mode |
| 145 | You ask for a specific fan speed. This mode assumes that pwm1 |
| 146 | corresponds to fan1, pwm2 to fan2 and pwm3 to fan3. |
| 147 | |
| 148 | * Temperature mode |
| 149 | You define 3 temperature/fan speed trip points, and the fan speed is |
| 150 | adjusted depending on the measured temperature, using interpolation. |
| 151 | This mode is not yet supported by the driver. |