Masami Hiramatsu | eb13296 | 2009-08-13 16:34:13 -0400 | [diff] [blame] | 1 | /* |
| 2 | * x86 instruction analysis |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License as published by |
| 6 | * the Free Software Foundation; either version 2 of the License, or |
| 7 | * (at your option) any later version. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License |
| 15 | * along with this program; if not, write to the Free Software |
| 16 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
| 17 | * |
| 18 | * Copyright (C) IBM Corporation, 2002, 2004, 2009 |
| 19 | */ |
| 20 | |
| 21 | #include <linux/string.h> |
| 22 | #include <asm/inat.h> |
| 23 | #include <asm/insn.h> |
| 24 | |
Masami Hiramatsu | 53a019a | 2011-10-07 22:31:55 +0900 | [diff] [blame] | 25 | /* Verify next sizeof(t) bytes can be on the same instruction */ |
| 26 | #define validate_next(t, insn, n) \ |
| 27 | ((insn)->next_byte + sizeof(t) + n - (insn)->kaddr <= MAX_INSN_SIZE) |
Masami Hiramatsu | eb13296 | 2009-08-13 16:34:13 -0400 | [diff] [blame] | 28 | |
Masami Hiramatsu | 53a019a | 2011-10-07 22:31:55 +0900 | [diff] [blame] | 29 | #define __get_next(t, insn) \ |
| 30 | ({ t r = *(t*)insn->next_byte; insn->next_byte += sizeof(t); r; }) |
| 31 | |
| 32 | #define __peek_nbyte_next(t, insn, n) \ |
| 33 | ({ t r = *(t*)((insn)->next_byte + n); r; }) |
| 34 | |
| 35 | #define get_next(t, insn) \ |
| 36 | ({ if (unlikely(!validate_next(t, insn, 0))) goto err_out; __get_next(t, insn); }) |
Masami Hiramatsu | eb13296 | 2009-08-13 16:34:13 -0400 | [diff] [blame] | 37 | |
Masami Hiramatsu | e0e492e | 2009-10-27 16:42:27 -0400 | [diff] [blame] | 38 | #define peek_nbyte_next(t, insn, n) \ |
Masami Hiramatsu | 53a019a | 2011-10-07 22:31:55 +0900 | [diff] [blame] | 39 | ({ if (unlikely(!validate_next(t, insn, n))) goto err_out; __peek_nbyte_next(t, insn, n); }) |
| 40 | |
| 41 | #define peek_next(t, insn) peek_nbyte_next(t, insn, 0) |
Masami Hiramatsu | e0e492e | 2009-10-27 16:42:27 -0400 | [diff] [blame] | 42 | |
Masami Hiramatsu | eb13296 | 2009-08-13 16:34:13 -0400 | [diff] [blame] | 43 | /** |
| 44 | * insn_init() - initialize struct insn |
| 45 | * @insn: &struct insn to be initialized |
| 46 | * @kaddr: address (in kernel memory) of instruction (or copy thereof) |
| 47 | * @x86_64: !0 for 64-bit kernel or 64-bit app |
| 48 | */ |
| 49 | void insn_init(struct insn *insn, const void *kaddr, int x86_64) |
| 50 | { |
| 51 | memset(insn, 0, sizeof(*insn)); |
| 52 | insn->kaddr = kaddr; |
| 53 | insn->next_byte = kaddr; |
| 54 | insn->x86_64 = x86_64 ? 1 : 0; |
| 55 | insn->opnd_bytes = 4; |
| 56 | if (x86_64) |
| 57 | insn->addr_bytes = 8; |
| 58 | else |
| 59 | insn->addr_bytes = 4; |
| 60 | } |
| 61 | |
| 62 | /** |
| 63 | * insn_get_prefixes - scan x86 instruction prefix bytes |
| 64 | * @insn: &struct insn containing instruction |
| 65 | * |
| 66 | * Populates the @insn->prefixes bitmap, and updates @insn->next_byte |
| 67 | * to point to the (first) opcode. No effect if @insn->prefixes.got |
| 68 | * is already set. |
| 69 | */ |
| 70 | void insn_get_prefixes(struct insn *insn) |
| 71 | { |
| 72 | struct insn_field *prefixes = &insn->prefixes; |
| 73 | insn_attr_t attr; |
| 74 | insn_byte_t b, lb; |
| 75 | int i, nb; |
| 76 | |
| 77 | if (prefixes->got) |
| 78 | return; |
| 79 | |
| 80 | nb = 0; |
| 81 | lb = 0; |
| 82 | b = peek_next(insn_byte_t, insn); |
| 83 | attr = inat_get_opcode_attribute(b); |
Masami Hiramatsu | 04d46c1 | 2009-10-27 16:42:11 -0400 | [diff] [blame] | 84 | while (inat_is_legacy_prefix(attr)) { |
Masami Hiramatsu | eb13296 | 2009-08-13 16:34:13 -0400 | [diff] [blame] | 85 | /* Skip if same prefix */ |
| 86 | for (i = 0; i < nb; i++) |
| 87 | if (prefixes->bytes[i] == b) |
| 88 | goto found; |
| 89 | if (nb == 4) |
| 90 | /* Invalid instruction */ |
| 91 | break; |
| 92 | prefixes->bytes[nb++] = b; |
| 93 | if (inat_is_address_size_prefix(attr)) { |
| 94 | /* address size switches 2/4 or 4/8 */ |
| 95 | if (insn->x86_64) |
| 96 | insn->addr_bytes ^= 12; |
| 97 | else |
| 98 | insn->addr_bytes ^= 6; |
| 99 | } else if (inat_is_operand_size_prefix(attr)) { |
| 100 | /* oprand size switches 2/4 */ |
| 101 | insn->opnd_bytes ^= 6; |
| 102 | } |
| 103 | found: |
| 104 | prefixes->nbytes++; |
| 105 | insn->next_byte++; |
| 106 | lb = b; |
| 107 | b = peek_next(insn_byte_t, insn); |
| 108 | attr = inat_get_opcode_attribute(b); |
| 109 | } |
| 110 | /* Set the last prefix */ |
| 111 | if (lb && lb != insn->prefixes.bytes[3]) { |
| 112 | if (unlikely(insn->prefixes.bytes[3])) { |
| 113 | /* Swap the last prefix */ |
| 114 | b = insn->prefixes.bytes[3]; |
| 115 | for (i = 0; i < nb; i++) |
| 116 | if (prefixes->bytes[i] == lb) |
| 117 | prefixes->bytes[i] = b; |
| 118 | } |
| 119 | insn->prefixes.bytes[3] = lb; |
| 120 | } |
| 121 | |
Masami Hiramatsu | e0e492e | 2009-10-27 16:42:27 -0400 | [diff] [blame] | 122 | /* Decode REX prefix */ |
Masami Hiramatsu | eb13296 | 2009-08-13 16:34:13 -0400 | [diff] [blame] | 123 | if (insn->x86_64) { |
| 124 | b = peek_next(insn_byte_t, insn); |
| 125 | attr = inat_get_opcode_attribute(b); |
| 126 | if (inat_is_rex_prefix(attr)) { |
| 127 | insn->rex_prefix.value = b; |
| 128 | insn->rex_prefix.nbytes = 1; |
| 129 | insn->next_byte++; |
| 130 | if (X86_REX_W(b)) |
| 131 | /* REX.W overrides opnd_size */ |
| 132 | insn->opnd_bytes = 8; |
| 133 | } |
| 134 | } |
| 135 | insn->rex_prefix.got = 1; |
Masami Hiramatsu | e0e492e | 2009-10-27 16:42:27 -0400 | [diff] [blame] | 136 | |
| 137 | /* Decode VEX prefix */ |
| 138 | b = peek_next(insn_byte_t, insn); |
| 139 | attr = inat_get_opcode_attribute(b); |
| 140 | if (inat_is_vex_prefix(attr)) { |
| 141 | insn_byte_t b2 = peek_nbyte_next(insn_byte_t, insn, 1); |
| 142 | if (!insn->x86_64) { |
| 143 | /* |
| 144 | * In 32-bits mode, if the [7:6] bits (mod bits of |
| 145 | * ModRM) on the second byte are not 11b, it is |
| 146 | * LDS or LES. |
| 147 | */ |
| 148 | if (X86_MODRM_MOD(b2) != 3) |
| 149 | goto vex_end; |
| 150 | } |
| 151 | insn->vex_prefix.bytes[0] = b; |
| 152 | insn->vex_prefix.bytes[1] = b2; |
| 153 | if (inat_is_vex3_prefix(attr)) { |
| 154 | b2 = peek_nbyte_next(insn_byte_t, insn, 2); |
| 155 | insn->vex_prefix.bytes[2] = b2; |
| 156 | insn->vex_prefix.nbytes = 3; |
| 157 | insn->next_byte += 3; |
| 158 | if (insn->x86_64 && X86_VEX_W(b2)) |
| 159 | /* VEX.W overrides opnd_size */ |
| 160 | insn->opnd_bytes = 8; |
| 161 | } else { |
| 162 | insn->vex_prefix.nbytes = 2; |
| 163 | insn->next_byte += 2; |
| 164 | } |
| 165 | } |
| 166 | vex_end: |
| 167 | insn->vex_prefix.got = 1; |
| 168 | |
Masami Hiramatsu | eb13296 | 2009-08-13 16:34:13 -0400 | [diff] [blame] | 169 | prefixes->got = 1; |
Masami Hiramatsu | 53a019a | 2011-10-07 22:31:55 +0900 | [diff] [blame] | 170 | |
| 171 | err_out: |
Masami Hiramatsu | eb13296 | 2009-08-13 16:34:13 -0400 | [diff] [blame] | 172 | return; |
| 173 | } |
| 174 | |
| 175 | /** |
| 176 | * insn_get_opcode - collect opcode(s) |
| 177 | * @insn: &struct insn containing instruction |
| 178 | * |
| 179 | * Populates @insn->opcode, updates @insn->next_byte to point past the |
| 180 | * opcode byte(s), and set @insn->attr (except for groups). |
| 181 | * If necessary, first collects any preceding (prefix) bytes. |
| 182 | * Sets @insn->opcode.value = opcode1. No effect if @insn->opcode.got |
| 183 | * is already 1. |
| 184 | */ |
| 185 | void insn_get_opcode(struct insn *insn) |
| 186 | { |
| 187 | struct insn_field *opcode = &insn->opcode; |
Masami Hiramatsu | f8d98f1 | 2012-02-10 14:33:40 +0900 | [diff] [blame] | 188 | insn_byte_t op; |
| 189 | int pfx_id; |
Masami Hiramatsu | eb13296 | 2009-08-13 16:34:13 -0400 | [diff] [blame] | 190 | if (opcode->got) |
| 191 | return; |
| 192 | if (!insn->prefixes.got) |
| 193 | insn_get_prefixes(insn); |
| 194 | |
| 195 | /* Get first opcode */ |
| 196 | op = get_next(insn_byte_t, insn); |
| 197 | opcode->bytes[0] = op; |
| 198 | opcode->nbytes = 1; |
Masami Hiramatsu | e0e492e | 2009-10-27 16:42:27 -0400 | [diff] [blame] | 199 | |
| 200 | /* Check if there is VEX prefix or not */ |
| 201 | if (insn_is_avx(insn)) { |
| 202 | insn_byte_t m, p; |
| 203 | m = insn_vex_m_bits(insn); |
| 204 | p = insn_vex_p_bits(insn); |
| 205 | insn->attr = inat_get_avx_attribute(op, m, p); |
Masami Hiramatsu | 130b78b | 2011-12-05 21:05:39 +0900 | [diff] [blame] | 206 | if (!inat_accept_vex(insn->attr) && !inat_is_group(insn->attr)) |
Masami Hiramatsu | e0e492e | 2009-10-27 16:42:27 -0400 | [diff] [blame] | 207 | insn->attr = 0; /* This instruction is bad */ |
| 208 | goto end; /* VEX has only 1 byte for opcode */ |
| 209 | } |
| 210 | |
Masami Hiramatsu | eb13296 | 2009-08-13 16:34:13 -0400 | [diff] [blame] | 211 | insn->attr = inat_get_opcode_attribute(op); |
| 212 | while (inat_is_escape(insn->attr)) { |
| 213 | /* Get escaped opcode */ |
| 214 | op = get_next(insn_byte_t, insn); |
| 215 | opcode->bytes[opcode->nbytes++] = op; |
Masami Hiramatsu | f8d98f1 | 2012-02-10 14:33:40 +0900 | [diff] [blame] | 216 | pfx_id = insn_last_prefix_id(insn); |
| 217 | insn->attr = inat_get_escape_attribute(op, pfx_id, insn->attr); |
Masami Hiramatsu | eb13296 | 2009-08-13 16:34:13 -0400 | [diff] [blame] | 218 | } |
Masami Hiramatsu | e0e492e | 2009-10-27 16:42:27 -0400 | [diff] [blame] | 219 | if (inat_must_vex(insn->attr)) |
| 220 | insn->attr = 0; /* This instruction is bad */ |
| 221 | end: |
Masami Hiramatsu | eb13296 | 2009-08-13 16:34:13 -0400 | [diff] [blame] | 222 | opcode->got = 1; |
Masami Hiramatsu | 53a019a | 2011-10-07 22:31:55 +0900 | [diff] [blame] | 223 | |
| 224 | err_out: |
| 225 | return; |
Masami Hiramatsu | eb13296 | 2009-08-13 16:34:13 -0400 | [diff] [blame] | 226 | } |
| 227 | |
| 228 | /** |
| 229 | * insn_get_modrm - collect ModRM byte, if any |
| 230 | * @insn: &struct insn containing instruction |
| 231 | * |
| 232 | * Populates @insn->modrm and updates @insn->next_byte to point past the |
| 233 | * ModRM byte, if any. If necessary, first collects the preceding bytes |
| 234 | * (prefixes and opcode(s)). No effect if @insn->modrm.got is already 1. |
| 235 | */ |
| 236 | void insn_get_modrm(struct insn *insn) |
| 237 | { |
| 238 | struct insn_field *modrm = &insn->modrm; |
Masami Hiramatsu | f8d98f1 | 2012-02-10 14:33:40 +0900 | [diff] [blame] | 239 | insn_byte_t pfx_id, mod; |
Masami Hiramatsu | eb13296 | 2009-08-13 16:34:13 -0400 | [diff] [blame] | 240 | if (modrm->got) |
| 241 | return; |
| 242 | if (!insn->opcode.got) |
| 243 | insn_get_opcode(insn); |
| 244 | |
| 245 | if (inat_has_modrm(insn->attr)) { |
| 246 | mod = get_next(insn_byte_t, insn); |
| 247 | modrm->value = mod; |
| 248 | modrm->nbytes = 1; |
| 249 | if (inat_is_group(insn->attr)) { |
Masami Hiramatsu | f8d98f1 | 2012-02-10 14:33:40 +0900 | [diff] [blame] | 250 | pfx_id = insn_last_prefix_id(insn); |
| 251 | insn->attr = inat_get_group_attribute(mod, pfx_id, |
Masami Hiramatsu | eb13296 | 2009-08-13 16:34:13 -0400 | [diff] [blame] | 252 | insn->attr); |
Masami Hiramatsu | 130b78b | 2011-12-05 21:05:39 +0900 | [diff] [blame] | 253 | if (insn_is_avx(insn) && !inat_accept_vex(insn->attr)) |
| 254 | insn->attr = 0; /* This is bad */ |
Masami Hiramatsu | eb13296 | 2009-08-13 16:34:13 -0400 | [diff] [blame] | 255 | } |
| 256 | } |
| 257 | |
| 258 | if (insn->x86_64 && inat_is_force64(insn->attr)) |
| 259 | insn->opnd_bytes = 8; |
| 260 | modrm->got = 1; |
Masami Hiramatsu | 53a019a | 2011-10-07 22:31:55 +0900 | [diff] [blame] | 261 | |
| 262 | err_out: |
| 263 | return; |
Masami Hiramatsu | eb13296 | 2009-08-13 16:34:13 -0400 | [diff] [blame] | 264 | } |
| 265 | |
| 266 | |
| 267 | /** |
| 268 | * insn_rip_relative() - Does instruction use RIP-relative addressing mode? |
| 269 | * @insn: &struct insn containing instruction |
| 270 | * |
| 271 | * If necessary, first collects the instruction up to and including the |
| 272 | * ModRM byte. No effect if @insn->x86_64 is 0. |
| 273 | */ |
| 274 | int insn_rip_relative(struct insn *insn) |
| 275 | { |
| 276 | struct insn_field *modrm = &insn->modrm; |
| 277 | |
| 278 | if (!insn->x86_64) |
| 279 | return 0; |
| 280 | if (!modrm->got) |
| 281 | insn_get_modrm(insn); |
| 282 | /* |
| 283 | * For rip-relative instructions, the mod field (top 2 bits) |
| 284 | * is zero and the r/m field (bottom 3 bits) is 0x5. |
| 285 | */ |
| 286 | return (modrm->nbytes && (modrm->value & 0xc7) == 0x5); |
| 287 | } |
| 288 | |
| 289 | /** |
| 290 | * insn_get_sib() - Get the SIB byte of instruction |
| 291 | * @insn: &struct insn containing instruction |
| 292 | * |
| 293 | * If necessary, first collects the instruction up to and including the |
| 294 | * ModRM byte. |
| 295 | */ |
| 296 | void insn_get_sib(struct insn *insn) |
| 297 | { |
| 298 | insn_byte_t modrm; |
| 299 | |
| 300 | if (insn->sib.got) |
| 301 | return; |
| 302 | if (!insn->modrm.got) |
| 303 | insn_get_modrm(insn); |
| 304 | if (insn->modrm.nbytes) { |
| 305 | modrm = (insn_byte_t)insn->modrm.value; |
| 306 | if (insn->addr_bytes != 2 && |
| 307 | X86_MODRM_MOD(modrm) != 3 && X86_MODRM_RM(modrm) == 4) { |
| 308 | insn->sib.value = get_next(insn_byte_t, insn); |
| 309 | insn->sib.nbytes = 1; |
| 310 | } |
| 311 | } |
| 312 | insn->sib.got = 1; |
Masami Hiramatsu | 53a019a | 2011-10-07 22:31:55 +0900 | [diff] [blame] | 313 | |
| 314 | err_out: |
| 315 | return; |
Masami Hiramatsu | eb13296 | 2009-08-13 16:34:13 -0400 | [diff] [blame] | 316 | } |
| 317 | |
| 318 | |
| 319 | /** |
| 320 | * insn_get_displacement() - Get the displacement of instruction |
| 321 | * @insn: &struct insn containing instruction |
| 322 | * |
| 323 | * If necessary, first collects the instruction up to and including the |
| 324 | * SIB byte. |
| 325 | * Displacement value is sign-expanded. |
| 326 | */ |
| 327 | void insn_get_displacement(struct insn *insn) |
| 328 | { |
| 329 | insn_byte_t mod, rm, base; |
| 330 | |
| 331 | if (insn->displacement.got) |
| 332 | return; |
| 333 | if (!insn->sib.got) |
| 334 | insn_get_sib(insn); |
| 335 | if (insn->modrm.nbytes) { |
| 336 | /* |
| 337 | * Interpreting the modrm byte: |
| 338 | * mod = 00 - no displacement fields (exceptions below) |
| 339 | * mod = 01 - 1-byte displacement field |
| 340 | * mod = 10 - displacement field is 4 bytes, or 2 bytes if |
| 341 | * address size = 2 (0x67 prefix in 32-bit mode) |
| 342 | * mod = 11 - no memory operand |
| 343 | * |
| 344 | * If address size = 2... |
| 345 | * mod = 00, r/m = 110 - displacement field is 2 bytes |
| 346 | * |
| 347 | * If address size != 2... |
| 348 | * mod != 11, r/m = 100 - SIB byte exists |
| 349 | * mod = 00, SIB base = 101 - displacement field is 4 bytes |
| 350 | * mod = 00, r/m = 101 - rip-relative addressing, displacement |
| 351 | * field is 4 bytes |
| 352 | */ |
| 353 | mod = X86_MODRM_MOD(insn->modrm.value); |
| 354 | rm = X86_MODRM_RM(insn->modrm.value); |
| 355 | base = X86_SIB_BASE(insn->sib.value); |
| 356 | if (mod == 3) |
| 357 | goto out; |
| 358 | if (mod == 1) { |
| 359 | insn->displacement.value = get_next(char, insn); |
| 360 | insn->displacement.nbytes = 1; |
| 361 | } else if (insn->addr_bytes == 2) { |
| 362 | if ((mod == 0 && rm == 6) || mod == 2) { |
| 363 | insn->displacement.value = |
| 364 | get_next(short, insn); |
| 365 | insn->displacement.nbytes = 2; |
| 366 | } |
| 367 | } else { |
| 368 | if ((mod == 0 && rm == 5) || mod == 2 || |
| 369 | (mod == 0 && base == 5)) { |
| 370 | insn->displacement.value = get_next(int, insn); |
| 371 | insn->displacement.nbytes = 4; |
| 372 | } |
| 373 | } |
| 374 | } |
| 375 | out: |
| 376 | insn->displacement.got = 1; |
Masami Hiramatsu | 53a019a | 2011-10-07 22:31:55 +0900 | [diff] [blame] | 377 | |
| 378 | err_out: |
| 379 | return; |
Masami Hiramatsu | eb13296 | 2009-08-13 16:34:13 -0400 | [diff] [blame] | 380 | } |
| 381 | |
| 382 | /* Decode moffset16/32/64 */ |
| 383 | static void __get_moffset(struct insn *insn) |
| 384 | { |
| 385 | switch (insn->addr_bytes) { |
| 386 | case 2: |
| 387 | insn->moffset1.value = get_next(short, insn); |
| 388 | insn->moffset1.nbytes = 2; |
| 389 | break; |
| 390 | case 4: |
| 391 | insn->moffset1.value = get_next(int, insn); |
| 392 | insn->moffset1.nbytes = 4; |
| 393 | break; |
| 394 | case 8: |
| 395 | insn->moffset1.value = get_next(int, insn); |
| 396 | insn->moffset1.nbytes = 4; |
| 397 | insn->moffset2.value = get_next(int, insn); |
| 398 | insn->moffset2.nbytes = 4; |
| 399 | break; |
| 400 | } |
| 401 | insn->moffset1.got = insn->moffset2.got = 1; |
Masami Hiramatsu | 53a019a | 2011-10-07 22:31:55 +0900 | [diff] [blame] | 402 | |
| 403 | err_out: |
| 404 | return; |
Masami Hiramatsu | eb13296 | 2009-08-13 16:34:13 -0400 | [diff] [blame] | 405 | } |
| 406 | |
| 407 | /* Decode imm v32(Iz) */ |
| 408 | static void __get_immv32(struct insn *insn) |
| 409 | { |
| 410 | switch (insn->opnd_bytes) { |
| 411 | case 2: |
| 412 | insn->immediate.value = get_next(short, insn); |
| 413 | insn->immediate.nbytes = 2; |
| 414 | break; |
| 415 | case 4: |
| 416 | case 8: |
| 417 | insn->immediate.value = get_next(int, insn); |
| 418 | insn->immediate.nbytes = 4; |
| 419 | break; |
| 420 | } |
Masami Hiramatsu | 53a019a | 2011-10-07 22:31:55 +0900 | [diff] [blame] | 421 | |
| 422 | err_out: |
| 423 | return; |
Masami Hiramatsu | eb13296 | 2009-08-13 16:34:13 -0400 | [diff] [blame] | 424 | } |
| 425 | |
| 426 | /* Decode imm v64(Iv/Ov) */ |
| 427 | static void __get_immv(struct insn *insn) |
| 428 | { |
| 429 | switch (insn->opnd_bytes) { |
| 430 | case 2: |
| 431 | insn->immediate1.value = get_next(short, insn); |
| 432 | insn->immediate1.nbytes = 2; |
| 433 | break; |
| 434 | case 4: |
| 435 | insn->immediate1.value = get_next(int, insn); |
| 436 | insn->immediate1.nbytes = 4; |
| 437 | break; |
| 438 | case 8: |
| 439 | insn->immediate1.value = get_next(int, insn); |
| 440 | insn->immediate1.nbytes = 4; |
| 441 | insn->immediate2.value = get_next(int, insn); |
| 442 | insn->immediate2.nbytes = 4; |
| 443 | break; |
| 444 | } |
| 445 | insn->immediate1.got = insn->immediate2.got = 1; |
Masami Hiramatsu | 53a019a | 2011-10-07 22:31:55 +0900 | [diff] [blame] | 446 | |
| 447 | err_out: |
| 448 | return; |
Masami Hiramatsu | eb13296 | 2009-08-13 16:34:13 -0400 | [diff] [blame] | 449 | } |
| 450 | |
| 451 | /* Decode ptr16:16/32(Ap) */ |
| 452 | static void __get_immptr(struct insn *insn) |
| 453 | { |
| 454 | switch (insn->opnd_bytes) { |
| 455 | case 2: |
| 456 | insn->immediate1.value = get_next(short, insn); |
| 457 | insn->immediate1.nbytes = 2; |
| 458 | break; |
| 459 | case 4: |
| 460 | insn->immediate1.value = get_next(int, insn); |
| 461 | insn->immediate1.nbytes = 4; |
| 462 | break; |
| 463 | case 8: |
| 464 | /* ptr16:64 is not exist (no segment) */ |
| 465 | return; |
| 466 | } |
| 467 | insn->immediate2.value = get_next(unsigned short, insn); |
| 468 | insn->immediate2.nbytes = 2; |
| 469 | insn->immediate1.got = insn->immediate2.got = 1; |
Masami Hiramatsu | 53a019a | 2011-10-07 22:31:55 +0900 | [diff] [blame] | 470 | |
| 471 | err_out: |
| 472 | return; |
Masami Hiramatsu | eb13296 | 2009-08-13 16:34:13 -0400 | [diff] [blame] | 473 | } |
| 474 | |
| 475 | /** |
| 476 | * insn_get_immediate() - Get the immediates of instruction |
| 477 | * @insn: &struct insn containing instruction |
| 478 | * |
| 479 | * If necessary, first collects the instruction up to and including the |
| 480 | * displacement bytes. |
| 481 | * Basically, most of immediates are sign-expanded. Unsigned-value can be |
| 482 | * get by bit masking with ((1 << (nbytes * 8)) - 1) |
| 483 | */ |
| 484 | void insn_get_immediate(struct insn *insn) |
| 485 | { |
| 486 | if (insn->immediate.got) |
| 487 | return; |
| 488 | if (!insn->displacement.got) |
| 489 | insn_get_displacement(insn); |
| 490 | |
| 491 | if (inat_has_moffset(insn->attr)) { |
| 492 | __get_moffset(insn); |
| 493 | goto done; |
| 494 | } |
| 495 | |
| 496 | if (!inat_has_immediate(insn->attr)) |
| 497 | /* no immediates */ |
| 498 | goto done; |
| 499 | |
| 500 | switch (inat_immediate_size(insn->attr)) { |
| 501 | case INAT_IMM_BYTE: |
| 502 | insn->immediate.value = get_next(char, insn); |
| 503 | insn->immediate.nbytes = 1; |
| 504 | break; |
| 505 | case INAT_IMM_WORD: |
| 506 | insn->immediate.value = get_next(short, insn); |
| 507 | insn->immediate.nbytes = 2; |
| 508 | break; |
| 509 | case INAT_IMM_DWORD: |
| 510 | insn->immediate.value = get_next(int, insn); |
| 511 | insn->immediate.nbytes = 4; |
| 512 | break; |
| 513 | case INAT_IMM_QWORD: |
| 514 | insn->immediate1.value = get_next(int, insn); |
| 515 | insn->immediate1.nbytes = 4; |
| 516 | insn->immediate2.value = get_next(int, insn); |
| 517 | insn->immediate2.nbytes = 4; |
| 518 | break; |
| 519 | case INAT_IMM_PTR: |
| 520 | __get_immptr(insn); |
| 521 | break; |
| 522 | case INAT_IMM_VWORD32: |
| 523 | __get_immv32(insn); |
| 524 | break; |
| 525 | case INAT_IMM_VWORD: |
| 526 | __get_immv(insn); |
| 527 | break; |
| 528 | default: |
| 529 | break; |
| 530 | } |
| 531 | if (inat_has_second_immediate(insn->attr)) { |
| 532 | insn->immediate2.value = get_next(char, insn); |
| 533 | insn->immediate2.nbytes = 1; |
| 534 | } |
| 535 | done: |
| 536 | insn->immediate.got = 1; |
Masami Hiramatsu | 53a019a | 2011-10-07 22:31:55 +0900 | [diff] [blame] | 537 | |
| 538 | err_out: |
| 539 | return; |
Masami Hiramatsu | eb13296 | 2009-08-13 16:34:13 -0400 | [diff] [blame] | 540 | } |
| 541 | |
| 542 | /** |
| 543 | * insn_get_length() - Get the length of instruction |
| 544 | * @insn: &struct insn containing instruction |
| 545 | * |
| 546 | * If necessary, first collects the instruction up to and including the |
| 547 | * immediates bytes. |
| 548 | */ |
| 549 | void insn_get_length(struct insn *insn) |
| 550 | { |
| 551 | if (insn->length) |
| 552 | return; |
| 553 | if (!insn->immediate.got) |
| 554 | insn_get_immediate(insn); |
| 555 | insn->length = (unsigned char)((unsigned long)insn->next_byte |
| 556 | - (unsigned long)insn->kaddr); |
| 557 | } |