blob: 08ea88deba6f0d8b7ec428d1cf02dd3c8e733848 [file] [log] [blame]
Wu, Fengguang91504872008-11-05 11:16:56 +08001/*
2 *
3 * patch_intelhdmi.c - Patch for Intel HDMI codecs
4 *
5 * Copyright(c) 2008 Intel Corporation. All rights reserved.
6 *
7 * Authors:
8 * Jiang Zhe <zhe.jiang@intel.com>
9 * Wu Fengguang <wfg@linux.intel.com>
10 *
11 * Maintained by:
12 * Wu Fengguang <wfg@linux.intel.com>
13 *
14 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License as published by the Free
16 * Software Foundation; either version 2 of the License, or (at your option)
17 * any later version.
18 *
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
21 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
22 * for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software Foundation,
26 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
27 */
28
29#include <linux/init.h>
30#include <linux/delay.h>
31#include <linux/slab.h>
32#include <sound/core.h>
Wu, Fengguang91504872008-11-05 11:16:56 +080033#include "hda_codec.h"
34#include "hda_local.h"
Wu, Fengguang91504872008-11-05 11:16:56 +080035
Wu Fengguang54a25f82009-10-30 11:44:26 +010036/*
37 * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
38 * could support two independent pipes, each of them can be connected to one or
39 * more ports (DVI, HDMI or DisplayPort).
40 *
41 * The HDA correspondence of pipes/ports are converter/pin nodes.
42 */
43#define INTEL_HDMI_CVTS 2
44#define INTEL_HDMI_PINS 3
Wu, Fengguang91504872008-11-05 11:16:56 +080045
Wu Fengguang54a25f82009-10-30 11:44:26 +010046static char *intel_hdmi_pcm_names[INTEL_HDMI_CVTS] = {
47 "INTEL HDMI 0",
48 "INTEL HDMI 1",
49};
Wu, Fengguang91504872008-11-05 11:16:56 +080050
Wu, Fengguang91504872008-11-05 11:16:56 +080051struct intel_hdmi_spec {
Wu Fengguang54a25f82009-10-30 11:44:26 +010052 int num_cvts;
53 int num_pins;
54 hda_nid_t cvt[INTEL_HDMI_CVTS+1]; /* audio sources */
55 hda_nid_t pin[INTEL_HDMI_PINS+1]; /* audio sinks */
56
57 /*
58 * source connection for each pin
59 */
60 hda_nid_t pin_cvt[INTEL_HDMI_PINS+1];
61
62 /*
63 * HDMI sink attached to each pin
64 */
65 bool sink_present[INTEL_HDMI_PINS];
66 bool sink_eldv[INTEL_HDMI_PINS];
67 struct hdmi_eld sink_eld[INTEL_HDMI_PINS];
68
69 /*
70 * export one pcm per pipe
71 */
72 struct hda_pcm pcm_rec[INTEL_HDMI_CVTS];
Wu, Fengguang91504872008-11-05 11:16:56 +080073};
74
Wu, Fengguang91504872008-11-05 11:16:56 +080075struct hdmi_audio_infoframe {
76 u8 type; /* 0x84 */
77 u8 ver; /* 0x01 */
78 u8 len; /* 0x0a */
79
80 u8 checksum; /* PB0 */
81 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
82 u8 SS01_SF24;
83 u8 CXT04;
84 u8 CA;
85 u8 LFEPBL01_LSV36_DM_INH7;
Wu Fengguang4e19c582008-11-19 15:13:59 +080086 u8 reserved[5]; /* PB6 - PB10 */
Wu, Fengguang91504872008-11-05 11:16:56 +080087};
88
89/*
Wu Fengguang698544d2008-11-19 08:56:17 +080090 * CEA speaker placement:
91 *
92 * FLH FCH FRH
93 * FLW FL FLC FC FRC FR FRW
94 *
95 * LFE
96 * TC
97 *
98 * RL RLC RC RRC RR
99 *
100 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
101 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
102 */
103enum cea_speaker_placement {
104 FL = (1 << 0), /* Front Left */
105 FC = (1 << 1), /* Front Center */
106 FR = (1 << 2), /* Front Right */
107 FLC = (1 << 3), /* Front Left Center */
108 FRC = (1 << 4), /* Front Right Center */
109 RL = (1 << 5), /* Rear Left */
110 RC = (1 << 6), /* Rear Center */
111 RR = (1 << 7), /* Rear Right */
112 RLC = (1 << 8), /* Rear Left Center */
113 RRC = (1 << 9), /* Rear Right Center */
114 LFE = (1 << 10), /* Low Frequency Effect */
115 FLW = (1 << 11), /* Front Left Wide */
116 FRW = (1 << 12), /* Front Right Wide */
117 FLH = (1 << 13), /* Front Left High */
118 FCH = (1 << 14), /* Front Center High */
119 FRH = (1 << 15), /* Front Right High */
120 TC = (1 << 16), /* Top Center */
121};
122
123/*
124 * ELD SA bits in the CEA Speaker Allocation data block
125 */
126static int eld_speaker_allocation_bits[] = {
127 [0] = FL | FR,
128 [1] = LFE,
129 [2] = FC,
130 [3] = RL | RR,
131 [4] = RC,
132 [5] = FLC | FRC,
133 [6] = RLC | RRC,
134 /* the following are not defined in ELD yet */
135 [7] = FLW | FRW,
136 [8] = FLH | FRH,
137 [9] = TC,
138 [10] = FCH,
139};
140
141struct cea_channel_speaker_allocation {
142 int ca_index;
143 int speakers[8];
144
145 /* derived values, just for convenience */
146 int channels;
147 int spk_mask;
148};
149
150/*
151 * This is an ordered list!
152 *
153 * The preceding ones have better chances to be selected by
154 * hdmi_setup_channel_allocation().
155 */
156static struct cea_channel_speaker_allocation channel_allocations[] = {
157/* channel: 8 7 6 5 4 3 2 1 */
158{ .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
159 /* 2.1 */
160{ .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
Wu Fengguang4e19c582008-11-19 15:13:59 +0800161 /* Dolby Surround */
Wu Fengguang698544d2008-11-19 08:56:17 +0800162{ .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
163{ .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
164{ .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
165{ .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
166{ .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
167{ .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
168{ .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
169{ .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
170{ .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
171 /* 5.1 */
172{ .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
173{ .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
174{ .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
175{ .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
176 /* 6.1 */
177{ .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
178{ .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
179{ .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
180{ .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
181 /* 7.1 */
182{ .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
183{ .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
184{ .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
185{ .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
186{ .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
187{ .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
188{ .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
189{ .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
190{ .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
191{ .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
192{ .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
193{ .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
194{ .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
195{ .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
196{ .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
197{ .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
198{ .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
199{ .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
200{ .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
201{ .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
202{ .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
203{ .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
204{ .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
205{ .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
206{ .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
207{ .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
208{ .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
209{ .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
210{ .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
211{ .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
212{ .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
213};
214
Wu Fengguang54a25f82009-10-30 11:44:26 +0100215
216static int hda_node_index(hda_nid_t *nids, hda_nid_t nid)
217{
218 int i;
219
220 for (i = 0; nids[i]; i++)
221 if (nids[i] == nid)
222 return i;
223
224 snd_printk(KERN_WARNING "HDMI: nid %d not registered\n", nid);
225 return -EINVAL;
226}
227
Wu Fengguang698544d2008-11-19 08:56:17 +0800228/*
Wu, Fengguang91504872008-11-05 11:16:56 +0800229 * HDMI routines
230 */
231
Takashi Iwaibeb0b9c2008-11-05 07:58:25 +0100232#ifdef BE_PARANOID
Wu Fengguang6797cf22009-10-30 11:40:40 +0100233static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
Wu, Fengguang91504872008-11-05 11:16:56 +0800234 int *packet_index, int *byte_index)
235{
236 int val;
237
Wu Fengguang6797cf22009-10-30 11:40:40 +0100238 val = snd_hda_codec_read(codec, pin_nid, 0,
239 AC_VERB_GET_HDMI_DIP_INDEX, 0);
Wu, Fengguang91504872008-11-05 11:16:56 +0800240
241 *packet_index = val >> 5;
242 *byte_index = val & 0x1f;
243}
Takashi Iwaibeb0b9c2008-11-05 07:58:25 +0100244#endif
Wu, Fengguang91504872008-11-05 11:16:56 +0800245
Wu Fengguang6797cf22009-10-30 11:40:40 +0100246static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
Wu, Fengguang91504872008-11-05 11:16:56 +0800247 int packet_index, int byte_index)
248{
249 int val;
250
251 val = (packet_index << 5) | (byte_index & 0x1f);
252
Wu Fengguang6797cf22009-10-30 11:40:40 +0100253 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
Wu, Fengguang91504872008-11-05 11:16:56 +0800254}
255
Wu Fengguang6797cf22009-10-30 11:40:40 +0100256static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
Wu, Fengguang91504872008-11-05 11:16:56 +0800257 unsigned char val)
258{
Wu Fengguang6797cf22009-10-30 11:40:40 +0100259 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
Wu, Fengguang91504872008-11-05 11:16:56 +0800260}
261
Wu Fengguang6797cf22009-10-30 11:40:40 +0100262static void hdmi_enable_output(struct hda_codec *codec, hda_nid_t pin_nid)
Wu, Fengguang91504872008-11-05 11:16:56 +0800263{
Wu Fengguang796359d2008-11-17 16:57:33 +0800264 /* Unmute */
Wu Fengguang559059b2009-08-02 16:48:55 +0800265 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
266 snd_hda_codec_write(codec, pin_nid, 0,
Wu Fengguang796359d2008-11-17 16:57:33 +0800267 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
268 /* Enable pin out */
Wu Fengguang559059b2009-08-02 16:48:55 +0800269 snd_hda_codec_write(codec, pin_nid, 0,
270 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
Wu, Fengguang91504872008-11-05 11:16:56 +0800271}
272
Wu Fengguang606c0ce2009-02-11 15:22:29 +0800273/*
274 * Enable Audio InfoFrame Transmission
275 */
Wu Fengguang6797cf22009-10-30 11:40:40 +0100276static void hdmi_start_infoframe_trans(struct hda_codec *codec,
277 hda_nid_t pin_nid)
Wu, Fengguang91504872008-11-05 11:16:56 +0800278{
Wu Fengguang559059b2009-08-02 16:48:55 +0800279 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
280 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
Wu Fengguang606c0ce2009-02-11 15:22:29 +0800281 AC_DIPXMIT_BEST);
282}
Wu, Fengguang91504872008-11-05 11:16:56 +0800283
Wu Fengguang606c0ce2009-02-11 15:22:29 +0800284/*
285 * Disable Audio InfoFrame Transmission
286 */
Wu Fengguang6797cf22009-10-30 11:40:40 +0100287static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
288 hda_nid_t pin_nid)
Wu Fengguang606c0ce2009-02-11 15:22:29 +0800289{
Wu Fengguang559059b2009-08-02 16:48:55 +0800290 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
291 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
Wu Fengguang606c0ce2009-02-11 15:22:29 +0800292 AC_DIPXMIT_DISABLE);
Wu, Fengguang91504872008-11-05 11:16:56 +0800293}
294
Wu Fengguang6797cf22009-10-30 11:40:40 +0100295static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t nid)
Wu, Fengguang91504872008-11-05 11:16:56 +0800296{
Wu Fengguang6797cf22009-10-30 11:40:40 +0100297 return 1 + snd_hda_codec_read(codec, nid, 0,
Wu, Fengguang91504872008-11-05 11:16:56 +0800298 AC_VERB_GET_CVT_CHAN_COUNT, 0);
299}
300
Wu Fengguang6797cf22009-10-30 11:40:40 +0100301static void hdmi_set_channel_count(struct hda_codec *codec,
302 hda_nid_t nid, int chs)
Wu, Fengguang91504872008-11-05 11:16:56 +0800303{
Wu Fengguang6797cf22009-10-30 11:40:40 +0100304 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
Wu, Fengguang91504872008-11-05 11:16:56 +0800305
Wu Fengguang6797cf22009-10-30 11:40:40 +0100306#ifdef CONFIG_SND_DEBUG_VERBOSE
307 if (chs != hdmi_get_channel_count(codec, nid))
Wu Fengguang03284c82008-11-22 09:40:53 +0800308 snd_printd(KERN_INFO "HDMI channel count: expect %d, get %d\n",
Wu Fengguang6797cf22009-10-30 11:40:40 +0100309 chs, hdmi_get_channel_count(codec, nid));
310#endif
Wu, Fengguang91504872008-11-05 11:16:56 +0800311}
312
Wu Fengguang6797cf22009-10-30 11:40:40 +0100313static void hdmi_debug_channel_mapping(struct hda_codec *codec, hda_nid_t nid)
Wu, Fengguang91504872008-11-05 11:16:56 +0800314{
315#ifdef CONFIG_SND_DEBUG_VERBOSE
316 int i;
317 int slot;
318
319 for (i = 0; i < 8; i++) {
Wu Fengguang6797cf22009-10-30 11:40:40 +0100320 slot = snd_hda_codec_read(codec, nid, 0,
Wu, Fengguang91504872008-11-05 11:16:56 +0800321 AC_VERB_GET_HDMI_CHAN_SLOT, i);
Wu Fengguang03284c82008-11-22 09:40:53 +0800322 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
Wu Fengguang4e19c582008-11-19 15:13:59 +0800323 slot >> 4, slot & 0x7);
Wu, Fengguang91504872008-11-05 11:16:56 +0800324 }
325#endif
326}
327
Wu Fengguang54a25f82009-10-30 11:44:26 +0100328static void hdmi_parse_eld(struct hda_codec *codec, int index)
Wu, Fengguang91504872008-11-05 11:16:56 +0800329{
Wu Fengguang7f4a9f42008-11-18 11:47:52 +0800330 struct intel_hdmi_spec *spec = codec->spec;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100331 struct hdmi_eld *eld = &spec->sink_eld[index];
Wu, Fengguang91504872008-11-05 11:16:56 +0800332
Wu Fengguang54a25f82009-10-30 11:44:26 +0100333 if (!snd_hdmi_get_eld(eld, codec, spec->pin[index]))
Wu Fengguang7f4a9f42008-11-18 11:47:52 +0800334 snd_hdmi_show_eld(eld);
Wu, Fengguang91504872008-11-05 11:16:56 +0800335}
336
337
338/*
Wu Fengguang4e19c582008-11-19 15:13:59 +0800339 * Audio InfoFrame routines
Wu, Fengguang91504872008-11-05 11:16:56 +0800340 */
341
Wu Fengguang6797cf22009-10-30 11:40:40 +0100342static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
Wu, Fengguang91504872008-11-05 11:16:56 +0800343{
344#ifdef CONFIG_SND_DEBUG_VERBOSE
345 int i;
346 int size;
347
Wu Fengguang559059b2009-08-02 16:48:55 +0800348 size = snd_hdmi_get_eld_size(codec, pin_nid);
Wu Fengguang03284c82008-11-22 09:40:53 +0800349 printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
Wu, Fengguang91504872008-11-05 11:16:56 +0800350
351 for (i = 0; i < 8; i++) {
Wu Fengguang559059b2009-08-02 16:48:55 +0800352 size = snd_hda_codec_read(codec, pin_nid, 0,
Wu, Fengguang91504872008-11-05 11:16:56 +0800353 AC_VERB_GET_HDMI_DIP_SIZE, i);
Wu Fengguang03284c82008-11-22 09:40:53 +0800354 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
Wu, Fengguang91504872008-11-05 11:16:56 +0800355 }
356#endif
357}
358
Wu Fengguang6797cf22009-10-30 11:40:40 +0100359static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
Wu, Fengguang91504872008-11-05 11:16:56 +0800360{
361#ifdef BE_PARANOID
362 int i, j;
363 int size;
364 int pi, bi;
365 for (i = 0; i < 8; i++) {
Wu Fengguang559059b2009-08-02 16:48:55 +0800366 size = snd_hda_codec_read(codec, pin_nid, 0,
Wu, Fengguang91504872008-11-05 11:16:56 +0800367 AC_VERB_GET_HDMI_DIP_SIZE, i);
368 if (size == 0)
369 continue;
370
Wu Fengguang559059b2009-08-02 16:48:55 +0800371 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
Wu, Fengguang91504872008-11-05 11:16:56 +0800372 for (j = 1; j < 1000; j++) {
Wu Fengguang559059b2009-08-02 16:48:55 +0800373 hdmi_write_dip_byte(codec, pin_nid, 0x0);
374 hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
Wu, Fengguang91504872008-11-05 11:16:56 +0800375 if (pi != i)
376 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
377 bi, pi, i);
378 if (bi == 0) /* byte index wrapped around */
379 break;
380 }
381 snd_printd(KERN_INFO
Wu Fengguang03284c82008-11-22 09:40:53 +0800382 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
383 i, size, j);
Wu, Fengguang91504872008-11-05 11:16:56 +0800384 }
385#endif
386}
387
Wu Fengguang5457a982008-11-19 08:56:15 +0800388static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
Wu Fengguang6797cf22009-10-30 11:40:40 +0100389 hda_nid_t pin_nid,
390 struct hdmi_audio_infoframe *ai)
Wu, Fengguang91504872008-11-05 11:16:56 +0800391{
Wu Fengguang5457a982008-11-19 08:56:15 +0800392 u8 *params = (u8 *)ai;
Wu Fengguang9a957a22009-02-11 15:22:30 +0800393 u8 sum = 0;
Wu, Fengguang91504872008-11-05 11:16:56 +0800394 int i;
395
Wu Fengguang6797cf22009-10-30 11:40:40 +0100396 hdmi_debug_dip_size(codec, pin_nid);
397 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
Wu, Fengguang91504872008-11-05 11:16:56 +0800398
Wu Fengguang9a957a22009-02-11 15:22:30 +0800399 for (i = 0; i < sizeof(ai); i++)
400 sum += params[i];
401 ai->checksum = - sum;
402
Wu Fengguang559059b2009-08-02 16:48:55 +0800403 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
Wu Fengguang5457a982008-11-19 08:56:15 +0800404 for (i = 0; i < sizeof(ai); i++)
Wu Fengguang559059b2009-08-02 16:48:55 +0800405 hdmi_write_dip_byte(codec, pin_nid, params[i]);
Wu, Fengguang91504872008-11-05 11:16:56 +0800406}
407
Wu Fengguang698544d2008-11-19 08:56:17 +0800408/*
409 * Compute derived values in channel_allocations[].
410 */
411static void init_channel_allocations(void)
412{
413 int i, j;
414 struct cea_channel_speaker_allocation *p;
415
416 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
417 p = channel_allocations + i;
418 p->channels = 0;
419 p->spk_mask = 0;
420 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
421 if (p->speakers[j]) {
422 p->channels++;
423 p->spk_mask |= p->speakers[j];
424 }
425 }
426}
427
428/*
429 * The transformation takes two steps:
430 *
431 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
432 * spk_mask => (channel_allocations[]) => ai->CA
433 *
434 * TODO: it could select the wrong CA from multiple candidates.
435*/
Wu Fengguang6797cf22009-10-30 11:40:40 +0100436static int hdmi_setup_channel_allocation(struct hda_codec *codec, hda_nid_t nid,
Wu Fengguang698544d2008-11-19 08:56:17 +0800437 struct hdmi_audio_infoframe *ai)
438{
439 struct intel_hdmi_spec *spec = codec->spec;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100440 struct hdmi_eld *eld;
Wu Fengguang698544d2008-11-19 08:56:17 +0800441 int i;
442 int spk_mask = 0;
443 int channels = 1 + (ai->CC02_CT47 & 0x7);
444 char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
445
446 /*
447 * CA defaults to 0 for basic stereo audio
448 */
Wu Fengguang698544d2008-11-19 08:56:17 +0800449 if (channels <= 2)
450 return 0;
451
Wu Fengguang54a25f82009-10-30 11:44:26 +0100452 i = hda_node_index(spec->pin_cvt, nid);
453 if (i < 0)
454 return 0;
455 eld = &spec->sink_eld[i];
456
Wu Fengguang698544d2008-11-19 08:56:17 +0800457 /*
Wu Fengguanga1667e42009-02-11 15:22:28 +0800458 * HDMI sink's ELD info cannot always be retrieved for now, e.g.
459 * in console or for audio devices. Assume the highest speakers
460 * configuration, to _not_ prohibit multi-channel audio playback.
461 */
462 if (!eld->spk_alloc)
463 eld->spk_alloc = 0xffff;
464
465 /*
Wu Fengguang698544d2008-11-19 08:56:17 +0800466 * expand ELD's speaker allocation mask
467 *
468 * ELD tells the speaker mask in a compact(paired) form,
Wu Fengguangb83923a2008-11-22 09:40:51 +0800469 * expand ELD's notions to match the ones used by Audio InfoFrame.
Wu Fengguang698544d2008-11-19 08:56:17 +0800470 */
471 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
472 if (eld->spk_alloc & (1 << i))
473 spk_mask |= eld_speaker_allocation_bits[i];
474 }
475
476 /* search for the first working match in the CA table */
477 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
478 if (channels == channel_allocations[i].channels &&
479 (spk_mask & channel_allocations[i].spk_mask) ==
480 channel_allocations[i].spk_mask) {
481 ai->CA = channel_allocations[i].ca_index;
Wu Fengguangcc02b832008-11-22 09:40:52 +0800482 break;
Wu Fengguang698544d2008-11-19 08:56:17 +0800483 }
484 }
485
486 snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
Wu Fengguangcc02b832008-11-22 09:40:52 +0800487 snd_printdd(KERN_INFO
488 "HDMI: select CA 0x%x for %d-channel allocation: %s\n",
489 ai->CA, channels, buf);
490
491 return ai->CA;
Wu Fengguang698544d2008-11-19 08:56:17 +0800492}
493
Wu Fengguang6797cf22009-10-30 11:40:40 +0100494static void hdmi_setup_channel_mapping(struct hda_codec *codec, hda_nid_t nid,
495 struct hdmi_audio_infoframe *ai)
Wu Fengguang9c8641e2008-11-19 08:56:18 +0800496{
Wu Fengguang559059b2009-08-02 16:48:55 +0800497 int i;
498
Wu Fengguang9c8641e2008-11-19 08:56:18 +0800499 if (!ai->CA)
500 return;
501
502 /*
503 * TODO: adjust channel mapping if necessary
504 * ALSA sequence is front/surr/clfe/side?
505 */
506
Wu Fengguang559059b2009-08-02 16:48:55 +0800507 for (i = 0; i < 8; i++)
Wu Fengguang6797cf22009-10-30 11:40:40 +0100508 snd_hda_codec_write(codec, nid, 0,
Wu Fengguang559059b2009-08-02 16:48:55 +0800509 AC_VERB_SET_HDMI_CHAN_SLOT,
510 (i << 4) | i);
511
Wu Fengguang6797cf22009-10-30 11:40:40 +0100512 hdmi_debug_channel_mapping(codec, nid);
Wu Fengguang9c8641e2008-11-19 08:56:18 +0800513}
514
515
Wu Fengguang6797cf22009-10-30 11:40:40 +0100516static void hdmi_setup_audio_infoframe(struct hda_codec *codec, hda_nid_t nid,
Wu Fengguang5457a982008-11-19 08:56:15 +0800517 struct snd_pcm_substream *substream)
518{
Wu Fengguang54a25f82009-10-30 11:44:26 +0100519 struct intel_hdmi_spec *spec = codec->spec;
520 hda_nid_t pin_nid;
521 int i;
Wu Fengguang5457a982008-11-19 08:56:15 +0800522 struct hdmi_audio_infoframe ai = {
523 .type = 0x84,
524 .ver = 0x01,
525 .len = 0x0a,
526 .CC02_CT47 = substream->runtime->channels - 1,
527 };
528
Wu Fengguang6797cf22009-10-30 11:40:40 +0100529 hdmi_setup_channel_allocation(codec, nid, &ai);
530 hdmi_setup_channel_mapping(codec, nid, &ai);
Wu Fengguang698544d2008-11-19 08:56:17 +0800531
Wu Fengguang54a25f82009-10-30 11:44:26 +0100532 for (i = 0; i < spec->num_pins; i++) {
533 if (spec->pin_cvt[i] != nid)
534 continue;
535 if (spec->sink_present[i] != true)
536 continue;
537
538 pin_nid = spec->pin[i];
539 hdmi_fill_audio_infoframe(codec, pin_nid, &ai);
540 hdmi_start_infoframe_trans(codec, pin_nid);
541 }
Wu Fengguang5457a982008-11-19 08:56:15 +0800542}
543
Wu, Fengguang91504872008-11-05 11:16:56 +0800544
545/*
546 * Unsolicited events
547 */
548
549static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
550{
Wu Fengguang54a25f82009-10-30 11:44:26 +0100551 struct intel_hdmi_spec *spec = codec->spec;
552 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
Wu, Fengguang91504872008-11-05 11:16:56 +0800553 int pind = !!(res & AC_UNSOL_RES_PD);
554 int eldv = !!(res & AC_UNSOL_RES_ELDV);
Wu Fengguang54a25f82009-10-30 11:44:26 +0100555 int index;
Wu, Fengguang91504872008-11-05 11:16:56 +0800556
Wu Fengguang03284c82008-11-22 09:40:53 +0800557 printk(KERN_INFO
Wu Fengguang54a25f82009-10-30 11:44:26 +0100558 "HDMI hot plug event: Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
559 tag, pind, eldv);
560
561 index = hda_node_index(spec->pin, tag);
562 if (index < 0)
563 return;
564
565 spec->sink_present[index] = pind;
566 spec->sink_eldv[index] = eldv;
Wu, Fengguang91504872008-11-05 11:16:56 +0800567
568 if (pind && eldv) {
Wu Fengguang54a25f82009-10-30 11:44:26 +0100569 hdmi_parse_eld(codec, index);
Wu, Fengguang91504872008-11-05 11:16:56 +0800570 /* TODO: do real things about ELD */
571 }
572}
573
574static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
575{
Wu Fengguang54a25f82009-10-30 11:44:26 +0100576 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
Wu, Fengguang91504872008-11-05 11:16:56 +0800577 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
578 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
579 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
580
Wu Fengguang03284c82008-11-22 09:40:53 +0800581 printk(KERN_INFO
Wu Fengguang54a25f82009-10-30 11:44:26 +0100582 "HDMI CP event: PIN=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
583 tag,
Wu Fengguang03284c82008-11-22 09:40:53 +0800584 subtag,
585 cp_state,
586 cp_ready);
Wu, Fengguang91504872008-11-05 11:16:56 +0800587
Wu Fengguang03284c82008-11-22 09:40:53 +0800588 /* TODO */
Wu, Fengguang91504872008-11-05 11:16:56 +0800589 if (cp_state)
590 ;
591 if (cp_ready)
592 ;
593}
594
595
596static void intel_hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
597{
Wu Fengguang54a25f82009-10-30 11:44:26 +0100598 struct intel_hdmi_spec *spec = codec->spec;
Wu, Fengguang91504872008-11-05 11:16:56 +0800599 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
600 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
601
Wu Fengguang54a25f82009-10-30 11:44:26 +0100602 if (hda_node_index(spec->pin, tag) < 0) {
Wu Fengguang03284c82008-11-22 09:40:53 +0800603 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
Wu, Fengguang91504872008-11-05 11:16:56 +0800604 return;
605 }
606
607 if (subtag == 0)
608 hdmi_intrinsic_event(codec, res);
609 else
610 hdmi_non_intrinsic_event(codec, res);
611}
612
613/*
614 * Callbacks
615 */
616
Wu, Fengguang91504872008-11-05 11:16:56 +0800617static int intel_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
618 struct hda_codec *codec,
619 unsigned int stream_tag,
620 unsigned int format,
621 struct snd_pcm_substream *substream)
622{
Wu Fengguang54a25f82009-10-30 11:44:26 +0100623 hdmi_set_channel_count(codec, hinfo->nid,
Wu Fengguang7bedb012009-10-30 11:41:44 +0100624 substream->runtime->channels);
Wu, Fengguang91504872008-11-05 11:16:56 +0800625
Wu Fengguang54a25f82009-10-30 11:44:26 +0100626 hdmi_setup_audio_infoframe(codec, hinfo->nid, substream);
Wu, Fengguang91504872008-11-05 11:16:56 +0800627
Wu Fengguang7bedb012009-10-30 11:41:44 +0100628 snd_hda_codec_setup_stream(codec, hinfo->nid, stream_tag, 0, format);
Wu, Fengguang91504872008-11-05 11:16:56 +0800629 return 0;
630}
631
Wu Fengguangddb81522009-10-30 11:43:03 +0100632static int intel_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
633 struct hda_codec *codec,
634 struct snd_pcm_substream *substream)
635{
636 struct intel_hdmi_spec *spec = codec->spec;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100637 int i;
Wu Fengguangddb81522009-10-30 11:43:03 +0100638
Wu Fengguang54a25f82009-10-30 11:44:26 +0100639 for (i = 0; i < spec->num_pins; i++) {
640 if (spec->pin_cvt[i] != hinfo->nid)
641 continue;
642
643 hdmi_stop_infoframe_trans(codec, spec->pin[i]);
644 }
Wu Fengguangddb81522009-10-30 11:43:03 +0100645
646 snd_hda_codec_cleanup_stream(codec, hinfo->nid);
647 return 0;
648}
649
Wu, Fengguang91504872008-11-05 11:16:56 +0800650static struct hda_pcm_stream intel_hdmi_pcm_playback = {
651 .substreams = 1,
652 .channels_min = 2,
653 .channels_max = 8,
Wu, Fengguang91504872008-11-05 11:16:56 +0800654 .ops = {
Wu Fengguang70ca35f2009-10-30 11:42:18 +0100655 .prepare = intel_hdmi_playback_pcm_prepare,
656 .cleanup = intel_hdmi_playback_pcm_cleanup,
Wu, Fengguang91504872008-11-05 11:16:56 +0800657 },
658};
659
660static int intel_hdmi_build_pcms(struct hda_codec *codec)
661{
662 struct intel_hdmi_spec *spec = codec->spec;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100663 struct hda_pcm *info = spec->pcm_rec;
664 int i;
Wu, Fengguang91504872008-11-05 11:16:56 +0800665
Wu Fengguang54a25f82009-10-30 11:44:26 +0100666 codec->num_pcms = spec->num_cvts;
Wu, Fengguang91504872008-11-05 11:16:56 +0800667 codec->pcm_info = info;
668
Wu Fengguang54a25f82009-10-30 11:44:26 +0100669 for (i = 0; i < codec->num_pcms; i++, info++) {
670 info->name = intel_hdmi_pcm_names[i];
671 info->pcm_type = HDA_PCM_TYPE_HDMI;
672 info->stream[SNDRV_PCM_STREAM_PLAYBACK] =
673 intel_hdmi_pcm_playback;
674 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->cvt[i];
675 }
Wu, Fengguang91504872008-11-05 11:16:56 +0800676
677 return 0;
678}
679
680static int intel_hdmi_build_controls(struct hda_codec *codec)
681{
682 struct intel_hdmi_spec *spec = codec->spec;
683 int err;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100684 int i;
Wu, Fengguang91504872008-11-05 11:16:56 +0800685
Wu Fengguang54a25f82009-10-30 11:44:26 +0100686 for (i = 0; i < codec->num_pcms; i++) {
687 err = snd_hda_create_spdif_out_ctls(codec, spec->cvt[i]);
688 if (err < 0)
689 return err;
690 }
Wu, Fengguang91504872008-11-05 11:16:56 +0800691
692 return 0;
693}
694
695static int intel_hdmi_init(struct hda_codec *codec)
696{
Wu Fengguang54a25f82009-10-30 11:44:26 +0100697 struct intel_hdmi_spec *spec = codec->spec;
698 int i;
Wu, Fengguang91504872008-11-05 11:16:56 +0800699
Wu Fengguang54a25f82009-10-30 11:44:26 +0100700 for (i = 0; spec->pin[i]; i++) {
701 hdmi_enable_output(codec, spec->pin[i]);
702 snd_hda_codec_write(codec, spec->pin[i], 0,
703 AC_VERB_SET_UNSOLICITED_ENABLE,
704 AC_USRSP_EN | spec->pin[i]);
705 }
Wu, Fengguang91504872008-11-05 11:16:56 +0800706 return 0;
707}
708
709static void intel_hdmi_free(struct hda_codec *codec)
710{
Takashi Iwaif208dba2008-11-21 09:11:50 +0100711 struct intel_hdmi_spec *spec = codec->spec;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100712 int i;
Takashi Iwaif208dba2008-11-21 09:11:50 +0100713
Wu Fengguang54a25f82009-10-30 11:44:26 +0100714 for (i = 0; i < spec->num_pins; i++)
715 snd_hda_eld_proc_free(codec, &spec->sink_eld[i]);
716
Takashi Iwaif208dba2008-11-21 09:11:50 +0100717 kfree(spec);
Wu, Fengguang91504872008-11-05 11:16:56 +0800718}
719
720static struct hda_codec_ops intel_hdmi_patch_ops = {
721 .init = intel_hdmi_init,
722 .free = intel_hdmi_free,
723 .build_pcms = intel_hdmi_build_pcms,
724 .build_controls = intel_hdmi_build_controls,
725 .unsol_event = intel_hdmi_unsol_event,
726};
727
Wu Fengguang54a25f82009-10-30 11:44:26 +0100728static struct intel_hdmi_spec static_specs[] = {
729 {
730 .num_cvts = 1,
731 .num_pins = 1,
732 .cvt = { 0x2 },
733 .pin = { 0x3 },
734 .pin_cvt = { 0x2 },
735 },
736 {
737 .num_cvts = 2,
738 .num_pins = 3,
739 .cvt = { 0x2, 0x3 },
740 .pin = { 0x4, 0x5, 0x6 },
741 .pin_cvt = { 0x2, 0x2, 0x2 },
742 },
743};
744
745static int do_patch_intel_hdmi(struct hda_codec *codec, int spec_id)
Wu, Fengguang91504872008-11-05 11:16:56 +0800746{
747 struct intel_hdmi_spec *spec;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100748 int i;
Wu, Fengguang91504872008-11-05 11:16:56 +0800749
750 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
751 if (spec == NULL)
752 return -ENOMEM;
753
Wu Fengguang54a25f82009-10-30 11:44:26 +0100754 *spec = static_specs[spec_id];
Wu, Fengguang91504872008-11-05 11:16:56 +0800755 codec->spec = spec;
756 codec->patch_ops = intel_hdmi_patch_ops;
757
Wu Fengguang54a25f82009-10-30 11:44:26 +0100758 for (i = 0; i < spec->num_pins; i++)
759 snd_hda_eld_proc_new(codec, &spec->sink_eld[i], i);
Wu Fengguang5f1e71b2008-11-18 11:47:53 +0800760
Wu Fengguang698544d2008-11-19 08:56:17 +0800761 init_channel_allocations();
762
Wu, Fengguang91504872008-11-05 11:16:56 +0800763 return 0;
764}
765
Wu Fengguang559059b2009-08-02 16:48:55 +0800766static int patch_intel_hdmi(struct hda_codec *codec)
767{
Wu Fengguang54a25f82009-10-30 11:44:26 +0100768 return do_patch_intel_hdmi(codec, 0);
Wu Fengguang559059b2009-08-02 16:48:55 +0800769}
770
771static int patch_intel_hdmi_ibexpeak(struct hda_codec *codec)
772{
Wu Fengguang54a25f82009-10-30 11:44:26 +0100773 return do_patch_intel_hdmi(codec, 1);
Wu Fengguang559059b2009-08-02 16:48:55 +0800774}
775
Takashi Iwai1289e9e2008-11-27 15:47:11 +0100776static struct hda_codec_preset snd_hda_preset_intelhdmi[] = {
Takashi Iwai74c61132008-12-18 09:11:33 +0100777 { .id = 0x808629fb, .name = "G45 DEVCL", .patch = patch_intel_hdmi },
778 { .id = 0x80862801, .name = "G45 DEVBLC", .patch = patch_intel_hdmi },
779 { .id = 0x80862802, .name = "G45 DEVCTG", .patch = patch_intel_hdmi },
780 { .id = 0x80862803, .name = "G45 DEVELK", .patch = patch_intel_hdmi },
Wu Fengguang739b47f2009-10-30 11:34:19 +0100781 { .id = 0x80862804, .name = "G45 DEVIBX", .patch = patch_intel_hdmi_ibexpeak },
Wu Fengguang559059b2009-08-02 16:48:55 +0800782 { .id = 0x80860054, .name = "Q57 DEVIBX", .patch = patch_intel_hdmi_ibexpeak },
Wu Fengguang3a95cb92008-11-13 10:19:38 +0800783 { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_intel_hdmi },
Wu, Fengguang91504872008-11-05 11:16:56 +0800784 {} /* terminator */
785};
Takashi Iwai1289e9e2008-11-27 15:47:11 +0100786
787MODULE_ALIAS("snd-hda-codec-id:808629fb");
788MODULE_ALIAS("snd-hda-codec-id:80862801");
789MODULE_ALIAS("snd-hda-codec-id:80862802");
790MODULE_ALIAS("snd-hda-codec-id:80862803");
Wu Fengguanga57c0eb2009-02-11 15:22:31 +0800791MODULE_ALIAS("snd-hda-codec-id:80862804");
Jaroslav Kysela87a8c372009-07-23 10:58:29 +0200792MODULE_ALIAS("snd-hda-codec-id:80860054");
Takashi Iwai1289e9e2008-11-27 15:47:11 +0100793MODULE_ALIAS("snd-hda-codec-id:10951392");
794
795MODULE_LICENSE("GPL");
796MODULE_DESCRIPTION("Intel HDMI HD-audio codec");
797
798static struct hda_codec_preset_list intel_list = {
799 .preset = snd_hda_preset_intelhdmi,
800 .owner = THIS_MODULE,
801};
802
803static int __init patch_intelhdmi_init(void)
804{
805 return snd_hda_add_codec_preset(&intel_list);
806}
807
808static void __exit patch_intelhdmi_exit(void)
809{
810 snd_hda_delete_codec_preset(&intel_list);
811}
812
813module_init(patch_intelhdmi_init)
814module_exit(patch_intelhdmi_exit)