Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 1 | /* |
| 2 | * wm9081.c -- WM9081 ALSA SoC Audio driver |
| 3 | * |
| 4 | * Author: Mark Brown |
| 5 | * |
| 6 | * Copyright 2009 Wolfson Microelectronics plc |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | * |
| 12 | */ |
| 13 | |
| 14 | #include <linux/module.h> |
| 15 | #include <linux/moduleparam.h> |
| 16 | #include <linux/init.h> |
| 17 | #include <linux/delay.h> |
| 18 | #include <linux/pm.h> |
| 19 | #include <linux/i2c.h> |
| 20 | #include <linux/platform_device.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame^] | 21 | #include <linux/slab.h> |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 22 | #include <sound/core.h> |
| 23 | #include <sound/pcm.h> |
| 24 | #include <sound/pcm_params.h> |
| 25 | #include <sound/soc.h> |
| 26 | #include <sound/soc-dapm.h> |
| 27 | #include <sound/initval.h> |
| 28 | #include <sound/tlv.h> |
| 29 | |
| 30 | #include <sound/wm9081.h> |
| 31 | #include "wm9081.h" |
| 32 | |
| 33 | static u16 wm9081_reg_defaults[] = { |
| 34 | 0x0000, /* R0 - Software Reset */ |
| 35 | 0x0000, /* R1 */ |
| 36 | 0x00B9, /* R2 - Analogue Lineout */ |
| 37 | 0x00B9, /* R3 - Analogue Speaker PGA */ |
| 38 | 0x0001, /* R4 - VMID Control */ |
| 39 | 0x0068, /* R5 - Bias Control 1 */ |
| 40 | 0x0000, /* R6 */ |
| 41 | 0x0000, /* R7 - Analogue Mixer */ |
| 42 | 0x0000, /* R8 - Anti Pop Control */ |
| 43 | 0x01DB, /* R9 - Analogue Speaker 1 */ |
| 44 | 0x0018, /* R10 - Analogue Speaker 2 */ |
| 45 | 0x0180, /* R11 - Power Management */ |
| 46 | 0x0000, /* R12 - Clock Control 1 */ |
| 47 | 0x0038, /* R13 - Clock Control 2 */ |
| 48 | 0x4000, /* R14 - Clock Control 3 */ |
| 49 | 0x0000, /* R15 */ |
| 50 | 0x0000, /* R16 - FLL Control 1 */ |
| 51 | 0x0200, /* R17 - FLL Control 2 */ |
| 52 | 0x0000, /* R18 - FLL Control 3 */ |
| 53 | 0x0204, /* R19 - FLL Control 4 */ |
| 54 | 0x0000, /* R20 - FLL Control 5 */ |
| 55 | 0x0000, /* R21 */ |
| 56 | 0x0000, /* R22 - Audio Interface 1 */ |
| 57 | 0x0002, /* R23 - Audio Interface 2 */ |
| 58 | 0x0008, /* R24 - Audio Interface 3 */ |
| 59 | 0x0022, /* R25 - Audio Interface 4 */ |
| 60 | 0x0000, /* R26 - Interrupt Status */ |
| 61 | 0x0006, /* R27 - Interrupt Status Mask */ |
| 62 | 0x0000, /* R28 - Interrupt Polarity */ |
| 63 | 0x0000, /* R29 - Interrupt Control */ |
| 64 | 0x00C0, /* R30 - DAC Digital 1 */ |
| 65 | 0x0008, /* R31 - DAC Digital 2 */ |
| 66 | 0x09AF, /* R32 - DRC 1 */ |
| 67 | 0x4201, /* R33 - DRC 2 */ |
| 68 | 0x0000, /* R34 - DRC 3 */ |
| 69 | 0x0000, /* R35 - DRC 4 */ |
| 70 | 0x0000, /* R36 */ |
| 71 | 0x0000, /* R37 */ |
| 72 | 0x0000, /* R38 - Write Sequencer 1 */ |
| 73 | 0x0000, /* R39 - Write Sequencer 2 */ |
| 74 | 0x0002, /* R40 - MW Slave 1 */ |
| 75 | 0x0000, /* R41 */ |
| 76 | 0x0000, /* R42 - EQ 1 */ |
| 77 | 0x0000, /* R43 - EQ 2 */ |
| 78 | 0x0FCA, /* R44 - EQ 3 */ |
| 79 | 0x0400, /* R45 - EQ 4 */ |
| 80 | 0x00B8, /* R46 - EQ 5 */ |
| 81 | 0x1EB5, /* R47 - EQ 6 */ |
| 82 | 0xF145, /* R48 - EQ 7 */ |
| 83 | 0x0B75, /* R49 - EQ 8 */ |
| 84 | 0x01C5, /* R50 - EQ 9 */ |
| 85 | 0x169E, /* R51 - EQ 10 */ |
| 86 | 0xF829, /* R52 - EQ 11 */ |
| 87 | 0x07AD, /* R53 - EQ 12 */ |
| 88 | 0x1103, /* R54 - EQ 13 */ |
| 89 | 0x1C58, /* R55 - EQ 14 */ |
| 90 | 0xF373, /* R56 - EQ 15 */ |
| 91 | 0x0A54, /* R57 - EQ 16 */ |
| 92 | 0x0558, /* R58 - EQ 17 */ |
| 93 | 0x0564, /* R59 - EQ 18 */ |
| 94 | 0x0559, /* R60 - EQ 19 */ |
| 95 | 0x4000, /* R61 - EQ 20 */ |
| 96 | }; |
| 97 | |
| 98 | static struct { |
| 99 | int ratio; |
| 100 | int clk_sys_rate; |
| 101 | } clk_sys_rates[] = { |
| 102 | { 64, 0 }, |
| 103 | { 128, 1 }, |
| 104 | { 192, 2 }, |
| 105 | { 256, 3 }, |
| 106 | { 384, 4 }, |
| 107 | { 512, 5 }, |
| 108 | { 768, 6 }, |
| 109 | { 1024, 7 }, |
| 110 | { 1408, 8 }, |
| 111 | { 1536, 9 }, |
| 112 | }; |
| 113 | |
| 114 | static struct { |
| 115 | int rate; |
| 116 | int sample_rate; |
| 117 | } sample_rates[] = { |
| 118 | { 8000, 0 }, |
| 119 | { 11025, 1 }, |
| 120 | { 12000, 2 }, |
| 121 | { 16000, 3 }, |
| 122 | { 22050, 4 }, |
| 123 | { 24000, 5 }, |
| 124 | { 32000, 6 }, |
| 125 | { 44100, 7 }, |
| 126 | { 48000, 8 }, |
| 127 | { 88200, 9 }, |
| 128 | { 96000, 10 }, |
| 129 | }; |
| 130 | |
| 131 | static struct { |
| 132 | int div; /* *10 due to .5s */ |
| 133 | int bclk_div; |
| 134 | } bclk_divs[] = { |
| 135 | { 10, 0 }, |
| 136 | { 15, 1 }, |
| 137 | { 20, 2 }, |
| 138 | { 30, 3 }, |
| 139 | { 40, 4 }, |
| 140 | { 50, 5 }, |
| 141 | { 55, 6 }, |
| 142 | { 60, 7 }, |
| 143 | { 80, 8 }, |
| 144 | { 100, 9 }, |
| 145 | { 110, 10 }, |
| 146 | { 120, 11 }, |
| 147 | { 160, 12 }, |
| 148 | { 200, 13 }, |
| 149 | { 220, 14 }, |
| 150 | { 240, 15 }, |
| 151 | { 250, 16 }, |
| 152 | { 300, 17 }, |
| 153 | { 320, 18 }, |
| 154 | { 440, 19 }, |
| 155 | { 480, 20 }, |
| 156 | }; |
| 157 | |
| 158 | struct wm9081_priv { |
| 159 | struct snd_soc_codec codec; |
| 160 | u16 reg_cache[WM9081_MAX_REGISTER + 1]; |
| 161 | int sysclk_source; |
| 162 | int mclk_rate; |
| 163 | int sysclk_rate; |
| 164 | int fs; |
| 165 | int bclk; |
| 166 | int master; |
| 167 | int fll_fref; |
| 168 | int fll_fout; |
Mark Brown | e0026be | 2009-08-11 16:28:39 +0100 | [diff] [blame] | 169 | int tdm_width; |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 170 | struct wm9081_retune_mobile_config *retune; |
| 171 | }; |
| 172 | |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 173 | static int wm9081_volatile_register(unsigned int reg) |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 174 | { |
| 175 | switch (reg) { |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 176 | case WM9081_SOFTWARE_RESET: |
| 177 | return 1; |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 178 | default: |
| 179 | return 0; |
| 180 | } |
| 181 | } |
| 182 | |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 183 | static int wm9081_reset(struct snd_soc_codec *codec) |
| 184 | { |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 185 | return snd_soc_write(codec, WM9081_SOFTWARE_RESET, 0); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 186 | } |
| 187 | |
| 188 | static const DECLARE_TLV_DB_SCALE(drc_in_tlv, -4500, 75, 0); |
| 189 | static const DECLARE_TLV_DB_SCALE(drc_out_tlv, -2250, 75, 0); |
| 190 | static const DECLARE_TLV_DB_SCALE(drc_min_tlv, -1800, 600, 0); |
| 191 | static unsigned int drc_max_tlv[] = { |
| 192 | TLV_DB_RANGE_HEAD(4), |
| 193 | 0, 0, TLV_DB_SCALE_ITEM(1200, 0, 0), |
| 194 | 1, 1, TLV_DB_SCALE_ITEM(1800, 0, 0), |
| 195 | 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0), |
| 196 | 3, 3, TLV_DB_SCALE_ITEM(3600, 0, 0), |
| 197 | }; |
| 198 | static const DECLARE_TLV_DB_SCALE(drc_qr_tlv, 1200, 600, 0); |
| 199 | static const DECLARE_TLV_DB_SCALE(drc_startup_tlv, -300, 50, 0); |
| 200 | |
| 201 | static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); |
| 202 | |
| 203 | static const DECLARE_TLV_DB_SCALE(in_tlv, -600, 600, 0); |
| 204 | static const DECLARE_TLV_DB_SCALE(dac_tlv, -7200, 75, 1); |
| 205 | static const DECLARE_TLV_DB_SCALE(out_tlv, -5700, 100, 0); |
| 206 | |
| 207 | static const char *drc_high_text[] = { |
| 208 | "1", |
| 209 | "1/2", |
| 210 | "1/4", |
| 211 | "1/8", |
| 212 | "1/16", |
| 213 | "0", |
| 214 | }; |
| 215 | |
| 216 | static const struct soc_enum drc_high = |
| 217 | SOC_ENUM_SINGLE(WM9081_DRC_3, 3, 6, drc_high_text); |
| 218 | |
| 219 | static const char *drc_low_text[] = { |
| 220 | "1", |
| 221 | "1/2", |
| 222 | "1/4", |
| 223 | "1/8", |
| 224 | "0", |
| 225 | }; |
| 226 | |
| 227 | static const struct soc_enum drc_low = |
| 228 | SOC_ENUM_SINGLE(WM9081_DRC_3, 0, 5, drc_low_text); |
| 229 | |
| 230 | static const char *drc_atk_text[] = { |
| 231 | "181us", |
| 232 | "181us", |
| 233 | "363us", |
| 234 | "726us", |
| 235 | "1.45ms", |
| 236 | "2.9ms", |
| 237 | "5.8ms", |
| 238 | "11.6ms", |
| 239 | "23.2ms", |
| 240 | "46.4ms", |
| 241 | "92.8ms", |
| 242 | "185.6ms", |
| 243 | }; |
| 244 | |
| 245 | static const struct soc_enum drc_atk = |
| 246 | SOC_ENUM_SINGLE(WM9081_DRC_2, 12, 12, drc_atk_text); |
| 247 | |
| 248 | static const char *drc_dcy_text[] = { |
| 249 | "186ms", |
| 250 | "372ms", |
| 251 | "743ms", |
| 252 | "1.49s", |
| 253 | "2.97s", |
| 254 | "5.94s", |
| 255 | "11.89s", |
| 256 | "23.78s", |
| 257 | "47.56s", |
| 258 | }; |
| 259 | |
| 260 | static const struct soc_enum drc_dcy = |
| 261 | SOC_ENUM_SINGLE(WM9081_DRC_2, 8, 9, drc_dcy_text); |
| 262 | |
| 263 | static const char *drc_qr_dcy_text[] = { |
| 264 | "0.725ms", |
| 265 | "1.45ms", |
| 266 | "5.8ms", |
| 267 | }; |
| 268 | |
| 269 | static const struct soc_enum drc_qr_dcy = |
| 270 | SOC_ENUM_SINGLE(WM9081_DRC_2, 4, 3, drc_qr_dcy_text); |
| 271 | |
| 272 | static const char *dac_deemph_text[] = { |
| 273 | "None", |
| 274 | "32kHz", |
| 275 | "44.1kHz", |
| 276 | "48kHz", |
| 277 | }; |
| 278 | |
| 279 | static const struct soc_enum dac_deemph = |
| 280 | SOC_ENUM_SINGLE(WM9081_DAC_DIGITAL_2, 1, 4, dac_deemph_text); |
| 281 | |
| 282 | static const char *speaker_mode_text[] = { |
| 283 | "Class D", |
| 284 | "Class AB", |
| 285 | }; |
| 286 | |
| 287 | static const struct soc_enum speaker_mode = |
| 288 | SOC_ENUM_SINGLE(WM9081_ANALOGUE_SPEAKER_2, 6, 2, speaker_mode_text); |
| 289 | |
| 290 | static int speaker_mode_get(struct snd_kcontrol *kcontrol, |
| 291 | struct snd_ctl_elem_value *ucontrol) |
| 292 | { |
| 293 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); |
| 294 | unsigned int reg; |
| 295 | |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 296 | reg = snd_soc_read(codec, WM9081_ANALOGUE_SPEAKER_2); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 297 | if (reg & WM9081_SPK_MODE) |
| 298 | ucontrol->value.integer.value[0] = 1; |
| 299 | else |
| 300 | ucontrol->value.integer.value[0] = 0; |
| 301 | |
| 302 | return 0; |
| 303 | } |
| 304 | |
| 305 | /* |
| 306 | * Stop any attempts to change speaker mode while the speaker is enabled. |
| 307 | * |
| 308 | * We also have some special anti-pop controls dependant on speaker |
| 309 | * mode which must be changed along with the mode. |
| 310 | */ |
| 311 | static int speaker_mode_put(struct snd_kcontrol *kcontrol, |
| 312 | struct snd_ctl_elem_value *ucontrol) |
| 313 | { |
| 314 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 315 | unsigned int reg_pwr = snd_soc_read(codec, WM9081_POWER_MANAGEMENT); |
| 316 | unsigned int reg2 = snd_soc_read(codec, WM9081_ANALOGUE_SPEAKER_2); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 317 | |
| 318 | /* Are we changing anything? */ |
| 319 | if (ucontrol->value.integer.value[0] == |
| 320 | ((reg2 & WM9081_SPK_MODE) != 0)) |
| 321 | return 0; |
| 322 | |
| 323 | /* Don't try to change modes while enabled */ |
| 324 | if (reg_pwr & WM9081_SPK_ENA) |
| 325 | return -EINVAL; |
| 326 | |
| 327 | if (ucontrol->value.integer.value[0]) { |
| 328 | /* Class AB */ |
| 329 | reg2 &= ~(WM9081_SPK_INV_MUTE | WM9081_OUT_SPK_CTRL); |
| 330 | reg2 |= WM9081_SPK_MODE; |
| 331 | } else { |
| 332 | /* Class D */ |
| 333 | reg2 |= WM9081_SPK_INV_MUTE | WM9081_OUT_SPK_CTRL; |
| 334 | reg2 &= ~WM9081_SPK_MODE; |
| 335 | } |
| 336 | |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 337 | snd_soc_write(codec, WM9081_ANALOGUE_SPEAKER_2, reg2); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 338 | |
| 339 | return 0; |
| 340 | } |
| 341 | |
| 342 | static const struct snd_kcontrol_new wm9081_snd_controls[] = { |
| 343 | SOC_SINGLE_TLV("IN1 Volume", WM9081_ANALOGUE_MIXER, 1, 1, 1, in_tlv), |
| 344 | SOC_SINGLE_TLV("IN2 Volume", WM9081_ANALOGUE_MIXER, 3, 1, 1, in_tlv), |
| 345 | |
| 346 | SOC_SINGLE_TLV("Playback Volume", WM9081_DAC_DIGITAL_1, 1, 96, 0, dac_tlv), |
| 347 | |
| 348 | SOC_SINGLE("LINEOUT Switch", WM9081_ANALOGUE_LINEOUT, 7, 1, 1), |
| 349 | SOC_SINGLE("LINEOUT ZC Switch", WM9081_ANALOGUE_LINEOUT, 6, 1, 0), |
| 350 | SOC_SINGLE_TLV("LINEOUT Volume", WM9081_ANALOGUE_LINEOUT, 0, 63, 0, out_tlv), |
| 351 | |
| 352 | SOC_SINGLE("DRC Switch", WM9081_DRC_1, 15, 1, 0), |
| 353 | SOC_ENUM("DRC High Slope", drc_high), |
| 354 | SOC_ENUM("DRC Low Slope", drc_low), |
| 355 | SOC_SINGLE_TLV("DRC Input Volume", WM9081_DRC_4, 5, 60, 1, drc_in_tlv), |
| 356 | SOC_SINGLE_TLV("DRC Output Volume", WM9081_DRC_4, 0, 30, 1, drc_out_tlv), |
| 357 | SOC_SINGLE_TLV("DRC Minimum Volume", WM9081_DRC_2, 2, 3, 1, drc_min_tlv), |
| 358 | SOC_SINGLE_TLV("DRC Maximum Volume", WM9081_DRC_2, 0, 3, 0, drc_max_tlv), |
| 359 | SOC_ENUM("DRC Attack", drc_atk), |
| 360 | SOC_ENUM("DRC Decay", drc_dcy), |
| 361 | SOC_SINGLE("DRC Quick Release Switch", WM9081_DRC_1, 2, 1, 0), |
| 362 | SOC_SINGLE_TLV("DRC Quick Release Volume", WM9081_DRC_2, 6, 3, 0, drc_qr_tlv), |
| 363 | SOC_ENUM("DRC Quick Release Decay", drc_qr_dcy), |
| 364 | SOC_SINGLE_TLV("DRC Startup Volume", WM9081_DRC_1, 6, 18, 0, drc_startup_tlv), |
| 365 | |
| 366 | SOC_SINGLE("EQ Switch", WM9081_EQ_1, 0, 1, 0), |
| 367 | |
| 368 | SOC_SINGLE("Speaker DC Volume", WM9081_ANALOGUE_SPEAKER_1, 3, 5, 0), |
| 369 | SOC_SINGLE("Speaker AC Volume", WM9081_ANALOGUE_SPEAKER_1, 0, 5, 0), |
| 370 | SOC_SINGLE("Speaker Switch", WM9081_ANALOGUE_SPEAKER_PGA, 7, 1, 1), |
| 371 | SOC_SINGLE("Speaker ZC Switch", WM9081_ANALOGUE_SPEAKER_PGA, 6, 1, 0), |
| 372 | SOC_SINGLE_TLV("Speaker Volume", WM9081_ANALOGUE_SPEAKER_PGA, 0, 63, 0, |
| 373 | out_tlv), |
| 374 | SOC_ENUM("DAC Deemphasis", dac_deemph), |
| 375 | SOC_ENUM_EXT("Speaker Mode", speaker_mode, speaker_mode_get, speaker_mode_put), |
| 376 | }; |
| 377 | |
| 378 | static const struct snd_kcontrol_new wm9081_eq_controls[] = { |
| 379 | SOC_SINGLE_TLV("EQ1 Volume", WM9081_EQ_1, 11, 24, 0, eq_tlv), |
| 380 | SOC_SINGLE_TLV("EQ2 Volume", WM9081_EQ_1, 6, 24, 0, eq_tlv), |
| 381 | SOC_SINGLE_TLV("EQ3 Volume", WM9081_EQ_1, 1, 24, 0, eq_tlv), |
| 382 | SOC_SINGLE_TLV("EQ4 Volume", WM9081_EQ_2, 11, 24, 0, eq_tlv), |
| 383 | SOC_SINGLE_TLV("EQ5 Volume", WM9081_EQ_2, 6, 24, 0, eq_tlv), |
| 384 | }; |
| 385 | |
| 386 | static const struct snd_kcontrol_new mixer[] = { |
| 387 | SOC_DAPM_SINGLE("IN1 Switch", WM9081_ANALOGUE_MIXER, 0, 1, 0), |
| 388 | SOC_DAPM_SINGLE("IN2 Switch", WM9081_ANALOGUE_MIXER, 2, 1, 0), |
| 389 | SOC_DAPM_SINGLE("Playback Switch", WM9081_ANALOGUE_MIXER, 4, 1, 0), |
| 390 | }; |
| 391 | |
| 392 | static int speaker_event(struct snd_soc_dapm_widget *w, |
| 393 | struct snd_kcontrol *kcontrol, int event) |
| 394 | { |
| 395 | struct snd_soc_codec *codec = w->codec; |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 396 | unsigned int reg = snd_soc_read(codec, WM9081_POWER_MANAGEMENT); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 397 | |
| 398 | switch (event) { |
| 399 | case SND_SOC_DAPM_POST_PMU: |
| 400 | reg |= WM9081_SPK_ENA; |
| 401 | break; |
| 402 | |
| 403 | case SND_SOC_DAPM_PRE_PMD: |
| 404 | reg &= ~WM9081_SPK_ENA; |
| 405 | break; |
| 406 | } |
| 407 | |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 408 | snd_soc_write(codec, WM9081_POWER_MANAGEMENT, reg); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 409 | |
| 410 | return 0; |
| 411 | } |
| 412 | |
| 413 | struct _fll_div { |
| 414 | u16 fll_fratio; |
| 415 | u16 fll_outdiv; |
| 416 | u16 fll_clk_ref_div; |
| 417 | u16 n; |
| 418 | u16 k; |
| 419 | }; |
| 420 | |
| 421 | /* The size in bits of the FLL divide multiplied by 10 |
| 422 | * to allow rounding later */ |
| 423 | #define FIXED_FLL_SIZE ((1 << 16) * 10) |
| 424 | |
| 425 | static struct { |
| 426 | unsigned int min; |
| 427 | unsigned int max; |
| 428 | u16 fll_fratio; |
| 429 | int ratio; |
| 430 | } fll_fratios[] = { |
| 431 | { 0, 64000, 4, 16 }, |
| 432 | { 64000, 128000, 3, 8 }, |
| 433 | { 128000, 256000, 2, 4 }, |
| 434 | { 256000, 1000000, 1, 2 }, |
| 435 | { 1000000, 13500000, 0, 1 }, |
| 436 | }; |
| 437 | |
| 438 | static int fll_factors(struct _fll_div *fll_div, unsigned int Fref, |
| 439 | unsigned int Fout) |
| 440 | { |
| 441 | u64 Kpart; |
| 442 | unsigned int K, Ndiv, Nmod, target; |
| 443 | unsigned int div; |
| 444 | int i; |
| 445 | |
| 446 | /* Fref must be <=13.5MHz */ |
| 447 | div = 1; |
| 448 | while ((Fref / div) > 13500000) { |
| 449 | div *= 2; |
| 450 | |
| 451 | if (div > 8) { |
| 452 | pr_err("Can't scale %dMHz input down to <=13.5MHz\n", |
| 453 | Fref); |
| 454 | return -EINVAL; |
| 455 | } |
| 456 | } |
| 457 | fll_div->fll_clk_ref_div = div / 2; |
| 458 | |
| 459 | pr_debug("Fref=%u Fout=%u\n", Fref, Fout); |
| 460 | |
| 461 | /* Apply the division for our remaining calculations */ |
| 462 | Fref /= div; |
| 463 | |
| 464 | /* Fvco should be 90-100MHz; don't check the upper bound */ |
| 465 | div = 0; |
| 466 | target = Fout * 2; |
| 467 | while (target < 90000000) { |
| 468 | div++; |
| 469 | target *= 2; |
| 470 | if (div > 7) { |
| 471 | pr_err("Unable to find FLL_OUTDIV for Fout=%uHz\n", |
| 472 | Fout); |
| 473 | return -EINVAL; |
| 474 | } |
| 475 | } |
| 476 | fll_div->fll_outdiv = div; |
| 477 | |
| 478 | pr_debug("Fvco=%dHz\n", target); |
| 479 | |
| 480 | /* Find an appropraite FLL_FRATIO and factor it out of the target */ |
| 481 | for (i = 0; i < ARRAY_SIZE(fll_fratios); i++) { |
| 482 | if (fll_fratios[i].min <= Fref && Fref <= fll_fratios[i].max) { |
| 483 | fll_div->fll_fratio = fll_fratios[i].fll_fratio; |
| 484 | target /= fll_fratios[i].ratio; |
| 485 | break; |
| 486 | } |
| 487 | } |
| 488 | if (i == ARRAY_SIZE(fll_fratios)) { |
| 489 | pr_err("Unable to find FLL_FRATIO for Fref=%uHz\n", Fref); |
| 490 | return -EINVAL; |
| 491 | } |
| 492 | |
| 493 | /* Now, calculate N.K */ |
| 494 | Ndiv = target / Fref; |
| 495 | |
| 496 | fll_div->n = Ndiv; |
| 497 | Nmod = target % Fref; |
| 498 | pr_debug("Nmod=%d\n", Nmod); |
| 499 | |
| 500 | /* Calculate fractional part - scale up so we can round. */ |
| 501 | Kpart = FIXED_FLL_SIZE * (long long)Nmod; |
| 502 | |
| 503 | do_div(Kpart, Fref); |
| 504 | |
| 505 | K = Kpart & 0xFFFFFFFF; |
| 506 | |
| 507 | if ((K % 10) >= 5) |
| 508 | K += 5; |
| 509 | |
| 510 | /* Move down to proper range now rounding is done */ |
| 511 | fll_div->k = K / 10; |
| 512 | |
| 513 | pr_debug("N=%x K=%x FLL_FRATIO=%x FLL_OUTDIV=%x FLL_CLK_REF_DIV=%x\n", |
| 514 | fll_div->n, fll_div->k, |
| 515 | fll_div->fll_fratio, fll_div->fll_outdiv, |
| 516 | fll_div->fll_clk_ref_div); |
| 517 | |
| 518 | return 0; |
| 519 | } |
| 520 | |
| 521 | static int wm9081_set_fll(struct snd_soc_codec *codec, int fll_id, |
| 522 | unsigned int Fref, unsigned int Fout) |
| 523 | { |
| 524 | struct wm9081_priv *wm9081 = codec->private_data; |
| 525 | u16 reg1, reg4, reg5; |
| 526 | struct _fll_div fll_div; |
| 527 | int ret; |
| 528 | int clk_sys_reg; |
| 529 | |
| 530 | /* Any change? */ |
| 531 | if (Fref == wm9081->fll_fref && Fout == wm9081->fll_fout) |
| 532 | return 0; |
| 533 | |
| 534 | /* Disable the FLL */ |
| 535 | if (Fout == 0) { |
| 536 | dev_dbg(codec->dev, "FLL disabled\n"); |
| 537 | wm9081->fll_fref = 0; |
| 538 | wm9081->fll_fout = 0; |
| 539 | |
| 540 | return 0; |
| 541 | } |
| 542 | |
| 543 | ret = fll_factors(&fll_div, Fref, Fout); |
| 544 | if (ret != 0) |
| 545 | return ret; |
| 546 | |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 547 | reg5 = snd_soc_read(codec, WM9081_FLL_CONTROL_5); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 548 | reg5 &= ~WM9081_FLL_CLK_SRC_MASK; |
| 549 | |
| 550 | switch (fll_id) { |
| 551 | case WM9081_SYSCLK_FLL_MCLK: |
| 552 | reg5 |= 0x1; |
| 553 | break; |
| 554 | |
| 555 | default: |
| 556 | dev_err(codec->dev, "Unknown FLL ID %d\n", fll_id); |
| 557 | return -EINVAL; |
| 558 | } |
| 559 | |
| 560 | /* Disable CLK_SYS while we reconfigure */ |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 561 | clk_sys_reg = snd_soc_read(codec, WM9081_CLOCK_CONTROL_3); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 562 | if (clk_sys_reg & WM9081_CLK_SYS_ENA) |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 563 | snd_soc_write(codec, WM9081_CLOCK_CONTROL_3, |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 564 | clk_sys_reg & ~WM9081_CLK_SYS_ENA); |
| 565 | |
| 566 | /* Any FLL configuration change requires that the FLL be |
| 567 | * disabled first. */ |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 568 | reg1 = snd_soc_read(codec, WM9081_FLL_CONTROL_1); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 569 | reg1 &= ~WM9081_FLL_ENA; |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 570 | snd_soc_write(codec, WM9081_FLL_CONTROL_1, reg1); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 571 | |
| 572 | /* Apply the configuration */ |
| 573 | if (fll_div.k) |
| 574 | reg1 |= WM9081_FLL_FRAC_MASK; |
| 575 | else |
| 576 | reg1 &= ~WM9081_FLL_FRAC_MASK; |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 577 | snd_soc_write(codec, WM9081_FLL_CONTROL_1, reg1); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 578 | |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 579 | snd_soc_write(codec, WM9081_FLL_CONTROL_2, |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 580 | (fll_div.fll_outdiv << WM9081_FLL_OUTDIV_SHIFT) | |
| 581 | (fll_div.fll_fratio << WM9081_FLL_FRATIO_SHIFT)); |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 582 | snd_soc_write(codec, WM9081_FLL_CONTROL_3, fll_div.k); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 583 | |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 584 | reg4 = snd_soc_read(codec, WM9081_FLL_CONTROL_4); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 585 | reg4 &= ~WM9081_FLL_N_MASK; |
| 586 | reg4 |= fll_div.n << WM9081_FLL_N_SHIFT; |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 587 | snd_soc_write(codec, WM9081_FLL_CONTROL_4, reg4); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 588 | |
| 589 | reg5 &= ~WM9081_FLL_CLK_REF_DIV_MASK; |
| 590 | reg5 |= fll_div.fll_clk_ref_div << WM9081_FLL_CLK_REF_DIV_SHIFT; |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 591 | snd_soc_write(codec, WM9081_FLL_CONTROL_5, reg5); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 592 | |
| 593 | /* Enable the FLL */ |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 594 | snd_soc_write(codec, WM9081_FLL_CONTROL_1, reg1 | WM9081_FLL_ENA); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 595 | |
| 596 | /* Then bring CLK_SYS up again if it was disabled */ |
| 597 | if (clk_sys_reg & WM9081_CLK_SYS_ENA) |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 598 | snd_soc_write(codec, WM9081_CLOCK_CONTROL_3, clk_sys_reg); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 599 | |
| 600 | dev_dbg(codec->dev, "FLL enabled at %dHz->%dHz\n", Fref, Fout); |
| 601 | |
| 602 | wm9081->fll_fref = Fref; |
| 603 | wm9081->fll_fout = Fout; |
| 604 | |
| 605 | return 0; |
| 606 | } |
| 607 | |
| 608 | static int configure_clock(struct snd_soc_codec *codec) |
| 609 | { |
| 610 | struct wm9081_priv *wm9081 = codec->private_data; |
| 611 | int new_sysclk, i, target; |
| 612 | unsigned int reg; |
| 613 | int ret = 0; |
| 614 | int mclkdiv = 0; |
| 615 | int fll = 0; |
| 616 | |
| 617 | switch (wm9081->sysclk_source) { |
| 618 | case WM9081_SYSCLK_MCLK: |
| 619 | if (wm9081->mclk_rate > 12225000) { |
| 620 | mclkdiv = 1; |
| 621 | wm9081->sysclk_rate = wm9081->mclk_rate / 2; |
| 622 | } else { |
| 623 | wm9081->sysclk_rate = wm9081->mclk_rate; |
| 624 | } |
| 625 | wm9081_set_fll(codec, WM9081_SYSCLK_FLL_MCLK, 0, 0); |
| 626 | break; |
| 627 | |
| 628 | case WM9081_SYSCLK_FLL_MCLK: |
| 629 | /* If we have a sample rate calculate a CLK_SYS that |
| 630 | * gives us a suitable DAC configuration, plus BCLK. |
| 631 | * Ideally we would check to see if we can clock |
| 632 | * directly from MCLK and only use the FLL if this is |
| 633 | * not the case, though care must be taken with free |
| 634 | * running mode. |
| 635 | */ |
| 636 | if (wm9081->master && wm9081->bclk) { |
| 637 | /* Make sure we can generate CLK_SYS and BCLK |
| 638 | * and that we've got 3MHz for optimal |
| 639 | * performance. */ |
| 640 | for (i = 0; i < ARRAY_SIZE(clk_sys_rates); i++) { |
| 641 | target = wm9081->fs * clk_sys_rates[i].ratio; |
Mark Brown | 0154724 | 2009-05-23 00:01:05 +0100 | [diff] [blame] | 642 | new_sysclk = target; |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 643 | if (target >= wm9081->bclk && |
| 644 | target > 3000000) |
Mark Brown | 0154724 | 2009-05-23 00:01:05 +0100 | [diff] [blame] | 645 | break; |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 646 | } |
Mark Brown | 4b75e94 | 2009-07-15 10:36:51 +0100 | [diff] [blame] | 647 | |
| 648 | if (i == ARRAY_SIZE(clk_sys_rates)) |
| 649 | return -EINVAL; |
| 650 | |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 651 | } else if (wm9081->fs) { |
| 652 | for (i = 0; i < ARRAY_SIZE(clk_sys_rates); i++) { |
| 653 | new_sysclk = clk_sys_rates[i].ratio |
| 654 | * wm9081->fs; |
| 655 | if (new_sysclk > 3000000) |
| 656 | break; |
| 657 | } |
Mark Brown | 4b75e94 | 2009-07-15 10:36:51 +0100 | [diff] [blame] | 658 | |
| 659 | if (i == ARRAY_SIZE(clk_sys_rates)) |
| 660 | return -EINVAL; |
| 661 | |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 662 | } else { |
| 663 | new_sysclk = 12288000; |
| 664 | } |
| 665 | |
| 666 | ret = wm9081_set_fll(codec, WM9081_SYSCLK_FLL_MCLK, |
| 667 | wm9081->mclk_rate, new_sysclk); |
| 668 | if (ret == 0) { |
| 669 | wm9081->sysclk_rate = new_sysclk; |
| 670 | |
| 671 | /* Switch SYSCLK over to FLL */ |
| 672 | fll = 1; |
| 673 | } else { |
| 674 | wm9081->sysclk_rate = wm9081->mclk_rate; |
| 675 | } |
| 676 | break; |
| 677 | |
| 678 | default: |
| 679 | return -EINVAL; |
| 680 | } |
| 681 | |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 682 | reg = snd_soc_read(codec, WM9081_CLOCK_CONTROL_1); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 683 | if (mclkdiv) |
| 684 | reg |= WM9081_MCLKDIV2; |
| 685 | else |
| 686 | reg &= ~WM9081_MCLKDIV2; |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 687 | snd_soc_write(codec, WM9081_CLOCK_CONTROL_1, reg); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 688 | |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 689 | reg = snd_soc_read(codec, WM9081_CLOCK_CONTROL_3); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 690 | if (fll) |
| 691 | reg |= WM9081_CLK_SRC_SEL; |
| 692 | else |
| 693 | reg &= ~WM9081_CLK_SRC_SEL; |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 694 | snd_soc_write(codec, WM9081_CLOCK_CONTROL_3, reg); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 695 | |
| 696 | dev_dbg(codec->dev, "CLK_SYS is %dHz\n", wm9081->sysclk_rate); |
| 697 | |
| 698 | return ret; |
| 699 | } |
| 700 | |
| 701 | static int clk_sys_event(struct snd_soc_dapm_widget *w, |
| 702 | struct snd_kcontrol *kcontrol, int event) |
| 703 | { |
| 704 | struct snd_soc_codec *codec = w->codec; |
| 705 | struct wm9081_priv *wm9081 = codec->private_data; |
| 706 | |
| 707 | /* This should be done on init() for bypass paths */ |
| 708 | switch (wm9081->sysclk_source) { |
| 709 | case WM9081_SYSCLK_MCLK: |
| 710 | dev_dbg(codec->dev, "Using %dHz MCLK\n", wm9081->mclk_rate); |
| 711 | break; |
| 712 | case WM9081_SYSCLK_FLL_MCLK: |
| 713 | dev_dbg(codec->dev, "Using %dHz MCLK with FLL\n", |
| 714 | wm9081->mclk_rate); |
| 715 | break; |
| 716 | default: |
| 717 | dev_err(codec->dev, "System clock not configured\n"); |
| 718 | return -EINVAL; |
| 719 | } |
| 720 | |
| 721 | switch (event) { |
| 722 | case SND_SOC_DAPM_PRE_PMU: |
| 723 | configure_clock(codec); |
| 724 | break; |
| 725 | |
| 726 | case SND_SOC_DAPM_POST_PMD: |
| 727 | /* Disable the FLL if it's running */ |
| 728 | wm9081_set_fll(codec, 0, 0, 0); |
| 729 | break; |
| 730 | } |
| 731 | |
| 732 | return 0; |
| 733 | } |
| 734 | |
| 735 | static const struct snd_soc_dapm_widget wm9081_dapm_widgets[] = { |
| 736 | SND_SOC_DAPM_INPUT("IN1"), |
| 737 | SND_SOC_DAPM_INPUT("IN2"), |
| 738 | |
| 739 | SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM9081_POWER_MANAGEMENT, 0, 0), |
| 740 | |
| 741 | SND_SOC_DAPM_MIXER_NAMED_CTL("Mixer", SND_SOC_NOPM, 0, 0, |
| 742 | mixer, ARRAY_SIZE(mixer)), |
| 743 | |
| 744 | SND_SOC_DAPM_PGA("LINEOUT PGA", WM9081_POWER_MANAGEMENT, 4, 0, NULL, 0), |
| 745 | |
| 746 | SND_SOC_DAPM_PGA_E("Speaker PGA", WM9081_POWER_MANAGEMENT, 2, 0, NULL, 0, |
| 747 | speaker_event, |
| 748 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), |
| 749 | |
| 750 | SND_SOC_DAPM_OUTPUT("LINEOUT"), |
| 751 | SND_SOC_DAPM_OUTPUT("SPKN"), |
| 752 | SND_SOC_DAPM_OUTPUT("SPKP"), |
| 753 | |
| 754 | SND_SOC_DAPM_SUPPLY("CLK_SYS", WM9081_CLOCK_CONTROL_3, 0, 0, clk_sys_event, |
| 755 | SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), |
| 756 | SND_SOC_DAPM_SUPPLY("CLK_DSP", WM9081_CLOCK_CONTROL_3, 1, 0, NULL, 0), |
| 757 | SND_SOC_DAPM_SUPPLY("TOCLK", WM9081_CLOCK_CONTROL_3, 2, 0, NULL, 0), |
| 758 | }; |
| 759 | |
| 760 | |
| 761 | static const struct snd_soc_dapm_route audio_paths[] = { |
| 762 | { "DAC", NULL, "CLK_SYS" }, |
| 763 | { "DAC", NULL, "CLK_DSP" }, |
| 764 | |
| 765 | { "Mixer", "IN1 Switch", "IN1" }, |
| 766 | { "Mixer", "IN2 Switch", "IN2" }, |
| 767 | { "Mixer", "Playback Switch", "DAC" }, |
| 768 | |
| 769 | { "LINEOUT PGA", NULL, "Mixer" }, |
| 770 | { "LINEOUT PGA", NULL, "TOCLK" }, |
| 771 | { "LINEOUT PGA", NULL, "CLK_SYS" }, |
| 772 | |
| 773 | { "LINEOUT", NULL, "LINEOUT PGA" }, |
| 774 | |
| 775 | { "Speaker PGA", NULL, "Mixer" }, |
| 776 | { "Speaker PGA", NULL, "TOCLK" }, |
| 777 | { "Speaker PGA", NULL, "CLK_SYS" }, |
| 778 | |
| 779 | { "SPKN", NULL, "Speaker PGA" }, |
| 780 | { "SPKP", NULL, "Speaker PGA" }, |
| 781 | }; |
| 782 | |
| 783 | static int wm9081_set_bias_level(struct snd_soc_codec *codec, |
| 784 | enum snd_soc_bias_level level) |
| 785 | { |
| 786 | u16 reg; |
| 787 | |
| 788 | switch (level) { |
| 789 | case SND_SOC_BIAS_ON: |
| 790 | break; |
| 791 | |
| 792 | case SND_SOC_BIAS_PREPARE: |
| 793 | /* VMID=2*40k */ |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 794 | reg = snd_soc_read(codec, WM9081_VMID_CONTROL); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 795 | reg &= ~WM9081_VMID_SEL_MASK; |
| 796 | reg |= 0x2; |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 797 | snd_soc_write(codec, WM9081_VMID_CONTROL, reg); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 798 | |
| 799 | /* Normal bias current */ |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 800 | reg = snd_soc_read(codec, WM9081_BIAS_CONTROL_1); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 801 | reg &= ~WM9081_STBY_BIAS_ENA; |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 802 | snd_soc_write(codec, WM9081_BIAS_CONTROL_1, reg); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 803 | break; |
| 804 | |
| 805 | case SND_SOC_BIAS_STANDBY: |
| 806 | /* Initial cold start */ |
| 807 | if (codec->bias_level == SND_SOC_BIAS_OFF) { |
| 808 | /* Disable LINEOUT discharge */ |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 809 | reg = snd_soc_read(codec, WM9081_ANTI_POP_CONTROL); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 810 | reg &= ~WM9081_LINEOUT_DISCH; |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 811 | snd_soc_write(codec, WM9081_ANTI_POP_CONTROL, reg); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 812 | |
| 813 | /* Select startup bias source */ |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 814 | reg = snd_soc_read(codec, WM9081_BIAS_CONTROL_1); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 815 | reg |= WM9081_BIAS_SRC | WM9081_BIAS_ENA; |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 816 | snd_soc_write(codec, WM9081_BIAS_CONTROL_1, reg); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 817 | |
| 818 | /* VMID 2*4k; Soft VMID ramp enable */ |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 819 | reg = snd_soc_read(codec, WM9081_VMID_CONTROL); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 820 | reg |= WM9081_VMID_RAMP | 0x6; |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 821 | snd_soc_write(codec, WM9081_VMID_CONTROL, reg); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 822 | |
| 823 | mdelay(100); |
| 824 | |
| 825 | /* Normal bias enable & soft start off */ |
| 826 | reg |= WM9081_BIAS_ENA; |
| 827 | reg &= ~WM9081_VMID_RAMP; |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 828 | snd_soc_write(codec, WM9081_VMID_CONTROL, reg); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 829 | |
| 830 | /* Standard bias source */ |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 831 | reg = snd_soc_read(codec, WM9081_BIAS_CONTROL_1); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 832 | reg &= ~WM9081_BIAS_SRC; |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 833 | snd_soc_write(codec, WM9081_BIAS_CONTROL_1, reg); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 834 | } |
| 835 | |
| 836 | /* VMID 2*240k */ |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 837 | reg = snd_soc_read(codec, WM9081_BIAS_CONTROL_1); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 838 | reg &= ~WM9081_VMID_SEL_MASK; |
| 839 | reg |= 0x40; |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 840 | snd_soc_write(codec, WM9081_VMID_CONTROL, reg); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 841 | |
| 842 | /* Standby bias current on */ |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 843 | reg = snd_soc_read(codec, WM9081_BIAS_CONTROL_1); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 844 | reg |= WM9081_STBY_BIAS_ENA; |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 845 | snd_soc_write(codec, WM9081_BIAS_CONTROL_1, reg); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 846 | break; |
| 847 | |
| 848 | case SND_SOC_BIAS_OFF: |
| 849 | /* Startup bias source */ |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 850 | reg = snd_soc_read(codec, WM9081_BIAS_CONTROL_1); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 851 | reg |= WM9081_BIAS_SRC; |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 852 | snd_soc_write(codec, WM9081_BIAS_CONTROL_1, reg); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 853 | |
| 854 | /* Disable VMID and biases with soft ramping */ |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 855 | reg = snd_soc_read(codec, WM9081_VMID_CONTROL); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 856 | reg &= ~(WM9081_VMID_SEL_MASK | WM9081_BIAS_ENA); |
| 857 | reg |= WM9081_VMID_RAMP; |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 858 | snd_soc_write(codec, WM9081_VMID_CONTROL, reg); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 859 | |
| 860 | /* Actively discharge LINEOUT */ |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 861 | reg = snd_soc_read(codec, WM9081_ANTI_POP_CONTROL); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 862 | reg |= WM9081_LINEOUT_DISCH; |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 863 | snd_soc_write(codec, WM9081_ANTI_POP_CONTROL, reg); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 864 | break; |
| 865 | } |
| 866 | |
| 867 | codec->bias_level = level; |
| 868 | |
| 869 | return 0; |
| 870 | } |
| 871 | |
| 872 | static int wm9081_set_dai_fmt(struct snd_soc_dai *dai, |
| 873 | unsigned int fmt) |
| 874 | { |
| 875 | struct snd_soc_codec *codec = dai->codec; |
| 876 | struct wm9081_priv *wm9081 = codec->private_data; |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 877 | unsigned int aif2 = snd_soc_read(codec, WM9081_AUDIO_INTERFACE_2); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 878 | |
| 879 | aif2 &= ~(WM9081_AIF_BCLK_INV | WM9081_AIF_LRCLK_INV | |
| 880 | WM9081_BCLK_DIR | WM9081_LRCLK_DIR | WM9081_AIF_FMT_MASK); |
| 881 | |
| 882 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
| 883 | case SND_SOC_DAIFMT_CBS_CFS: |
| 884 | wm9081->master = 0; |
| 885 | break; |
| 886 | case SND_SOC_DAIFMT_CBS_CFM: |
| 887 | aif2 |= WM9081_LRCLK_DIR; |
| 888 | wm9081->master = 1; |
| 889 | break; |
| 890 | case SND_SOC_DAIFMT_CBM_CFS: |
| 891 | aif2 |= WM9081_BCLK_DIR; |
| 892 | wm9081->master = 1; |
| 893 | break; |
| 894 | case SND_SOC_DAIFMT_CBM_CFM: |
| 895 | aif2 |= WM9081_LRCLK_DIR | WM9081_BCLK_DIR; |
| 896 | wm9081->master = 1; |
| 897 | break; |
| 898 | default: |
| 899 | return -EINVAL; |
| 900 | } |
| 901 | |
| 902 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { |
| 903 | case SND_SOC_DAIFMT_DSP_B: |
| 904 | aif2 |= WM9081_AIF_LRCLK_INV; |
| 905 | case SND_SOC_DAIFMT_DSP_A: |
| 906 | aif2 |= 0x3; |
| 907 | break; |
| 908 | case SND_SOC_DAIFMT_I2S: |
| 909 | aif2 |= 0x2; |
| 910 | break; |
| 911 | case SND_SOC_DAIFMT_RIGHT_J: |
| 912 | break; |
| 913 | case SND_SOC_DAIFMT_LEFT_J: |
| 914 | aif2 |= 0x1; |
| 915 | break; |
| 916 | default: |
| 917 | return -EINVAL; |
| 918 | } |
| 919 | |
| 920 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { |
| 921 | case SND_SOC_DAIFMT_DSP_A: |
| 922 | case SND_SOC_DAIFMT_DSP_B: |
| 923 | /* frame inversion not valid for DSP modes */ |
| 924 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { |
| 925 | case SND_SOC_DAIFMT_NB_NF: |
| 926 | break; |
| 927 | case SND_SOC_DAIFMT_IB_NF: |
| 928 | aif2 |= WM9081_AIF_BCLK_INV; |
| 929 | break; |
| 930 | default: |
| 931 | return -EINVAL; |
| 932 | } |
| 933 | break; |
| 934 | |
| 935 | case SND_SOC_DAIFMT_I2S: |
| 936 | case SND_SOC_DAIFMT_RIGHT_J: |
| 937 | case SND_SOC_DAIFMT_LEFT_J: |
| 938 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { |
| 939 | case SND_SOC_DAIFMT_NB_NF: |
| 940 | break; |
| 941 | case SND_SOC_DAIFMT_IB_IF: |
| 942 | aif2 |= WM9081_AIF_BCLK_INV | WM9081_AIF_LRCLK_INV; |
| 943 | break; |
| 944 | case SND_SOC_DAIFMT_IB_NF: |
| 945 | aif2 |= WM9081_AIF_BCLK_INV; |
| 946 | break; |
| 947 | case SND_SOC_DAIFMT_NB_IF: |
| 948 | aif2 |= WM9081_AIF_LRCLK_INV; |
| 949 | break; |
| 950 | default: |
| 951 | return -EINVAL; |
| 952 | } |
| 953 | break; |
| 954 | default: |
| 955 | return -EINVAL; |
| 956 | } |
| 957 | |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 958 | snd_soc_write(codec, WM9081_AUDIO_INTERFACE_2, aif2); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 959 | |
| 960 | return 0; |
| 961 | } |
| 962 | |
| 963 | static int wm9081_hw_params(struct snd_pcm_substream *substream, |
| 964 | struct snd_pcm_hw_params *params, |
| 965 | struct snd_soc_dai *dai) |
| 966 | { |
| 967 | struct snd_soc_codec *codec = dai->codec; |
| 968 | struct wm9081_priv *wm9081 = codec->private_data; |
| 969 | int ret, i, best, best_val, cur_val; |
| 970 | unsigned int clk_ctrl2, aif1, aif2, aif3, aif4; |
| 971 | |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 972 | clk_ctrl2 = snd_soc_read(codec, WM9081_CLOCK_CONTROL_2); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 973 | clk_ctrl2 &= ~(WM9081_CLK_SYS_RATE_MASK | WM9081_SAMPLE_RATE_MASK); |
| 974 | |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 975 | aif1 = snd_soc_read(codec, WM9081_AUDIO_INTERFACE_1); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 976 | |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 977 | aif2 = snd_soc_read(codec, WM9081_AUDIO_INTERFACE_2); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 978 | aif2 &= ~WM9081_AIF_WL_MASK; |
| 979 | |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 980 | aif3 = snd_soc_read(codec, WM9081_AUDIO_INTERFACE_3); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 981 | aif3 &= ~WM9081_BCLK_DIV_MASK; |
| 982 | |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 983 | aif4 = snd_soc_read(codec, WM9081_AUDIO_INTERFACE_4); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 984 | aif4 &= ~WM9081_LRCLK_RATE_MASK; |
| 985 | |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 986 | wm9081->fs = params_rate(params); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 987 | |
Mark Brown | e0026be | 2009-08-11 16:28:39 +0100 | [diff] [blame] | 988 | if (wm9081->tdm_width) { |
| 989 | /* If TDM is set up then that fixes our BCLK. */ |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 990 | int slots = ((aif1 & WM9081_AIFDAC_TDM_MODE_MASK) >> |
| 991 | WM9081_AIFDAC_TDM_MODE_SHIFT) + 1; |
Mark Brown | e0026be | 2009-08-11 16:28:39 +0100 | [diff] [blame] | 992 | |
| 993 | wm9081->bclk = wm9081->fs * wm9081->tdm_width * slots; |
| 994 | } else { |
| 995 | /* Otherwise work out a BCLK from the sample size */ |
| 996 | wm9081->bclk = 2 * wm9081->fs; |
| 997 | |
| 998 | switch (params_format(params)) { |
| 999 | case SNDRV_PCM_FORMAT_S16_LE: |
| 1000 | wm9081->bclk *= 16; |
| 1001 | break; |
| 1002 | case SNDRV_PCM_FORMAT_S20_3LE: |
| 1003 | wm9081->bclk *= 20; |
| 1004 | aif2 |= 0x4; |
| 1005 | break; |
| 1006 | case SNDRV_PCM_FORMAT_S24_LE: |
| 1007 | wm9081->bclk *= 24; |
| 1008 | aif2 |= 0x8; |
| 1009 | break; |
| 1010 | case SNDRV_PCM_FORMAT_S32_LE: |
| 1011 | wm9081->bclk *= 32; |
| 1012 | aif2 |= 0xc; |
| 1013 | break; |
| 1014 | default: |
| 1015 | return -EINVAL; |
| 1016 | } |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 1017 | } |
| 1018 | |
| 1019 | dev_dbg(codec->dev, "Target BCLK is %dHz\n", wm9081->bclk); |
| 1020 | |
| 1021 | ret = configure_clock(codec); |
| 1022 | if (ret != 0) |
| 1023 | return ret; |
| 1024 | |
| 1025 | /* Select nearest CLK_SYS_RATE */ |
| 1026 | best = 0; |
| 1027 | best_val = abs((wm9081->sysclk_rate / clk_sys_rates[0].ratio) |
| 1028 | - wm9081->fs); |
| 1029 | for (i = 1; i < ARRAY_SIZE(clk_sys_rates); i++) { |
| 1030 | cur_val = abs((wm9081->sysclk_rate / |
Joe Perches | a419aef | 2009-08-18 11:18:35 -0700 | [diff] [blame] | 1031 | clk_sys_rates[i].ratio) - wm9081->fs); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 1032 | if (cur_val < best_val) { |
| 1033 | best = i; |
| 1034 | best_val = cur_val; |
| 1035 | } |
| 1036 | } |
| 1037 | dev_dbg(codec->dev, "Selected CLK_SYS_RATIO of %d\n", |
| 1038 | clk_sys_rates[best].ratio); |
| 1039 | clk_ctrl2 |= (clk_sys_rates[best].clk_sys_rate |
| 1040 | << WM9081_CLK_SYS_RATE_SHIFT); |
| 1041 | |
| 1042 | /* SAMPLE_RATE */ |
| 1043 | best = 0; |
| 1044 | best_val = abs(wm9081->fs - sample_rates[0].rate); |
| 1045 | for (i = 1; i < ARRAY_SIZE(sample_rates); i++) { |
| 1046 | /* Closest match */ |
| 1047 | cur_val = abs(wm9081->fs - sample_rates[i].rate); |
| 1048 | if (cur_val < best_val) { |
| 1049 | best = i; |
| 1050 | best_val = cur_val; |
| 1051 | } |
| 1052 | } |
| 1053 | dev_dbg(codec->dev, "Selected SAMPLE_RATE of %dHz\n", |
| 1054 | sample_rates[best].rate); |
Mark Brown | 0154724 | 2009-05-23 00:01:05 +0100 | [diff] [blame] | 1055 | clk_ctrl2 |= (sample_rates[best].sample_rate |
| 1056 | << WM9081_SAMPLE_RATE_SHIFT); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 1057 | |
| 1058 | /* BCLK_DIV */ |
| 1059 | best = 0; |
| 1060 | best_val = INT_MAX; |
| 1061 | for (i = 0; i < ARRAY_SIZE(bclk_divs); i++) { |
| 1062 | cur_val = ((wm9081->sysclk_rate * 10) / bclk_divs[i].div) |
| 1063 | - wm9081->bclk; |
| 1064 | if (cur_val < 0) /* Table is sorted */ |
| 1065 | break; |
| 1066 | if (cur_val < best_val) { |
| 1067 | best = i; |
| 1068 | best_val = cur_val; |
| 1069 | } |
| 1070 | } |
| 1071 | wm9081->bclk = (wm9081->sysclk_rate * 10) / bclk_divs[best].div; |
| 1072 | dev_dbg(codec->dev, "Selected BCLK_DIV of %d for %dHz BCLK\n", |
| 1073 | bclk_divs[best].div, wm9081->bclk); |
| 1074 | aif3 |= bclk_divs[best].bclk_div; |
| 1075 | |
| 1076 | /* LRCLK is a simple fraction of BCLK */ |
| 1077 | dev_dbg(codec->dev, "LRCLK_RATE is %d\n", wm9081->bclk / wm9081->fs); |
| 1078 | aif4 |= wm9081->bclk / wm9081->fs; |
| 1079 | |
| 1080 | /* Apply a ReTune Mobile configuration if it's in use */ |
| 1081 | if (wm9081->retune) { |
| 1082 | struct wm9081_retune_mobile_config *retune = wm9081->retune; |
| 1083 | struct wm9081_retune_mobile_setting *s; |
| 1084 | int eq1; |
| 1085 | |
| 1086 | best = 0; |
| 1087 | best_val = abs(retune->configs[0].rate - wm9081->fs); |
| 1088 | for (i = 0; i < retune->num_configs; i++) { |
| 1089 | cur_val = abs(retune->configs[i].rate - wm9081->fs); |
| 1090 | if (cur_val < best_val) { |
| 1091 | best_val = cur_val; |
| 1092 | best = i; |
| 1093 | } |
| 1094 | } |
| 1095 | s = &retune->configs[best]; |
| 1096 | |
| 1097 | dev_dbg(codec->dev, "ReTune Mobile %s tuned for %dHz\n", |
| 1098 | s->name, s->rate); |
| 1099 | |
| 1100 | /* If the EQ is enabled then disable it while we write out */ |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 1101 | eq1 = snd_soc_read(codec, WM9081_EQ_1) & WM9081_EQ_ENA; |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 1102 | if (eq1 & WM9081_EQ_ENA) |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 1103 | snd_soc_write(codec, WM9081_EQ_1, 0); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 1104 | |
| 1105 | /* Write out the other values */ |
| 1106 | for (i = 1; i < ARRAY_SIZE(s->config); i++) |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 1107 | snd_soc_write(codec, WM9081_EQ_1 + i, s->config[i]); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 1108 | |
| 1109 | eq1 |= (s->config[0] & ~WM9081_EQ_ENA); |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 1110 | snd_soc_write(codec, WM9081_EQ_1, eq1); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 1111 | } |
| 1112 | |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 1113 | snd_soc_write(codec, WM9081_CLOCK_CONTROL_2, clk_ctrl2); |
| 1114 | snd_soc_write(codec, WM9081_AUDIO_INTERFACE_2, aif2); |
| 1115 | snd_soc_write(codec, WM9081_AUDIO_INTERFACE_3, aif3); |
| 1116 | snd_soc_write(codec, WM9081_AUDIO_INTERFACE_4, aif4); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 1117 | |
| 1118 | return 0; |
| 1119 | } |
| 1120 | |
| 1121 | static int wm9081_digital_mute(struct snd_soc_dai *codec_dai, int mute) |
| 1122 | { |
| 1123 | struct snd_soc_codec *codec = codec_dai->codec; |
| 1124 | unsigned int reg; |
| 1125 | |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 1126 | reg = snd_soc_read(codec, WM9081_DAC_DIGITAL_2); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 1127 | |
| 1128 | if (mute) |
| 1129 | reg |= WM9081_DAC_MUTE; |
| 1130 | else |
| 1131 | reg &= ~WM9081_DAC_MUTE; |
| 1132 | |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 1133 | snd_soc_write(codec, WM9081_DAC_DIGITAL_2, reg); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 1134 | |
| 1135 | return 0; |
| 1136 | } |
| 1137 | |
| 1138 | static int wm9081_set_sysclk(struct snd_soc_dai *codec_dai, |
| 1139 | int clk_id, unsigned int freq, int dir) |
| 1140 | { |
| 1141 | struct snd_soc_codec *codec = codec_dai->codec; |
| 1142 | struct wm9081_priv *wm9081 = codec->private_data; |
| 1143 | |
| 1144 | switch (clk_id) { |
| 1145 | case WM9081_SYSCLK_MCLK: |
| 1146 | case WM9081_SYSCLK_FLL_MCLK: |
| 1147 | wm9081->sysclk_source = clk_id; |
| 1148 | wm9081->mclk_rate = freq; |
| 1149 | break; |
| 1150 | |
| 1151 | default: |
| 1152 | return -EINVAL; |
| 1153 | } |
| 1154 | |
| 1155 | return 0; |
| 1156 | } |
| 1157 | |
| 1158 | static int wm9081_set_tdm_slot(struct snd_soc_dai *dai, |
Daniel Ribeiro | a5479e3 | 2009-06-15 21:44:31 -0300 | [diff] [blame] | 1159 | unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width) |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 1160 | { |
| 1161 | struct snd_soc_codec *codec = dai->codec; |
Mark Brown | e0026be | 2009-08-11 16:28:39 +0100 | [diff] [blame] | 1162 | struct wm9081_priv *wm9081 = codec->private_data; |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 1163 | unsigned int aif1 = snd_soc_read(codec, WM9081_AUDIO_INTERFACE_1); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 1164 | |
| 1165 | aif1 &= ~(WM9081_AIFDAC_TDM_SLOT_MASK | WM9081_AIFDAC_TDM_MODE_MASK); |
| 1166 | |
Mark Brown | e0026be | 2009-08-11 16:28:39 +0100 | [diff] [blame] | 1167 | if (slots < 0 || slots > 4) |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 1168 | return -EINVAL; |
| 1169 | |
Mark Brown | e0026be | 2009-08-11 16:28:39 +0100 | [diff] [blame] | 1170 | wm9081->tdm_width = slot_width; |
| 1171 | |
| 1172 | if (slots == 0) |
| 1173 | slots = 1; |
| 1174 | |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 1175 | aif1 |= (slots - 1) << WM9081_AIFDAC_TDM_MODE_SHIFT; |
| 1176 | |
Daniel Ribeiro | a5479e3 | 2009-06-15 21:44:31 -0300 | [diff] [blame] | 1177 | switch (rx_mask) { |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 1178 | case 1: |
| 1179 | break; |
| 1180 | case 2: |
| 1181 | aif1 |= 0x10; |
| 1182 | break; |
| 1183 | case 4: |
| 1184 | aif1 |= 0x20; |
| 1185 | break; |
| 1186 | case 8: |
| 1187 | aif1 |= 0x30; |
| 1188 | break; |
| 1189 | default: |
| 1190 | return -EINVAL; |
| 1191 | } |
| 1192 | |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 1193 | snd_soc_write(codec, WM9081_AUDIO_INTERFACE_1, aif1); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 1194 | |
| 1195 | return 0; |
| 1196 | } |
| 1197 | |
| 1198 | #define WM9081_RATES SNDRV_PCM_RATE_8000_96000 |
| 1199 | |
| 1200 | #define WM9081_FORMATS \ |
| 1201 | (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ |
| 1202 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) |
| 1203 | |
| 1204 | static struct snd_soc_dai_ops wm9081_dai_ops = { |
| 1205 | .hw_params = wm9081_hw_params, |
| 1206 | .set_sysclk = wm9081_set_sysclk, |
| 1207 | .set_fmt = wm9081_set_dai_fmt, |
| 1208 | .digital_mute = wm9081_digital_mute, |
| 1209 | .set_tdm_slot = wm9081_set_tdm_slot, |
| 1210 | }; |
| 1211 | |
| 1212 | /* We report two channels because the CODEC processes a stereo signal, even |
| 1213 | * though it is only capable of handling a mono output. |
| 1214 | */ |
| 1215 | struct snd_soc_dai wm9081_dai = { |
| 1216 | .name = "WM9081", |
| 1217 | .playback = { |
| 1218 | .stream_name = "HiFi Playback", |
| 1219 | .channels_min = 1, |
| 1220 | .channels_max = 2, |
| 1221 | .rates = WM9081_RATES, |
| 1222 | .formats = WM9081_FORMATS, |
| 1223 | }, |
| 1224 | .ops = &wm9081_dai_ops, |
| 1225 | }; |
| 1226 | EXPORT_SYMBOL_GPL(wm9081_dai); |
| 1227 | |
| 1228 | |
| 1229 | static struct snd_soc_codec *wm9081_codec; |
| 1230 | |
| 1231 | static int wm9081_probe(struct platform_device *pdev) |
| 1232 | { |
| 1233 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); |
| 1234 | struct snd_soc_codec *codec; |
| 1235 | struct wm9081_priv *wm9081; |
| 1236 | int ret = 0; |
| 1237 | |
| 1238 | if (wm9081_codec == NULL) { |
| 1239 | dev_err(&pdev->dev, "Codec device not registered\n"); |
| 1240 | return -ENODEV; |
| 1241 | } |
| 1242 | |
| 1243 | socdev->card->codec = wm9081_codec; |
| 1244 | codec = wm9081_codec; |
| 1245 | wm9081 = codec->private_data; |
| 1246 | |
| 1247 | /* register pcms */ |
| 1248 | ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); |
| 1249 | if (ret < 0) { |
| 1250 | dev_err(codec->dev, "failed to create pcms: %d\n", ret); |
| 1251 | goto pcm_err; |
| 1252 | } |
| 1253 | |
| 1254 | snd_soc_add_controls(codec, wm9081_snd_controls, |
| 1255 | ARRAY_SIZE(wm9081_snd_controls)); |
| 1256 | if (!wm9081->retune) { |
| 1257 | dev_dbg(codec->dev, |
| 1258 | "No ReTune Mobile data, using normal EQ\n"); |
| 1259 | snd_soc_add_controls(codec, wm9081_eq_controls, |
| 1260 | ARRAY_SIZE(wm9081_eq_controls)); |
| 1261 | } |
| 1262 | |
| 1263 | snd_soc_dapm_new_controls(codec, wm9081_dapm_widgets, |
| 1264 | ARRAY_SIZE(wm9081_dapm_widgets)); |
| 1265 | snd_soc_dapm_add_routes(codec, audio_paths, ARRAY_SIZE(audio_paths)); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 1266 | |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 1267 | return ret; |
| 1268 | |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 1269 | pcm_err: |
| 1270 | return ret; |
| 1271 | } |
| 1272 | |
| 1273 | static int wm9081_remove(struct platform_device *pdev) |
| 1274 | { |
| 1275 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); |
| 1276 | |
| 1277 | snd_soc_free_pcms(socdev); |
| 1278 | snd_soc_dapm_free(socdev); |
| 1279 | |
| 1280 | return 0; |
| 1281 | } |
| 1282 | |
| 1283 | #ifdef CONFIG_PM |
| 1284 | static int wm9081_suspend(struct platform_device *pdev, pm_message_t state) |
| 1285 | { |
| 1286 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); |
| 1287 | struct snd_soc_codec *codec = socdev->card->codec; |
| 1288 | |
| 1289 | wm9081_set_bias_level(codec, SND_SOC_BIAS_OFF); |
| 1290 | |
| 1291 | return 0; |
| 1292 | } |
| 1293 | |
| 1294 | static int wm9081_resume(struct platform_device *pdev) |
| 1295 | { |
| 1296 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); |
| 1297 | struct snd_soc_codec *codec = socdev->card->codec; |
| 1298 | u16 *reg_cache = codec->reg_cache; |
| 1299 | int i; |
| 1300 | |
| 1301 | for (i = 0; i < codec->reg_cache_size; i++) { |
| 1302 | if (i == WM9081_SOFTWARE_RESET) |
| 1303 | continue; |
| 1304 | |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 1305 | snd_soc_write(codec, i, reg_cache[i]); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 1306 | } |
| 1307 | |
| 1308 | wm9081_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
| 1309 | |
| 1310 | return 0; |
| 1311 | } |
| 1312 | #else |
| 1313 | #define wm9081_suspend NULL |
| 1314 | #define wm9081_resume NULL |
| 1315 | #endif |
| 1316 | |
| 1317 | struct snd_soc_codec_device soc_codec_dev_wm9081 = { |
| 1318 | .probe = wm9081_probe, |
| 1319 | .remove = wm9081_remove, |
| 1320 | .suspend = wm9081_suspend, |
| 1321 | .resume = wm9081_resume, |
| 1322 | }; |
| 1323 | EXPORT_SYMBOL_GPL(soc_codec_dev_wm9081); |
| 1324 | |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 1325 | static int wm9081_register(struct wm9081_priv *wm9081, |
| 1326 | enum snd_soc_control_type control) |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 1327 | { |
| 1328 | struct snd_soc_codec *codec = &wm9081->codec; |
| 1329 | int ret; |
| 1330 | u16 reg; |
| 1331 | |
| 1332 | if (wm9081_codec) { |
| 1333 | dev_err(codec->dev, "Another WM9081 is registered\n"); |
| 1334 | ret = -EINVAL; |
| 1335 | goto err; |
| 1336 | } |
| 1337 | |
| 1338 | mutex_init(&codec->mutex); |
| 1339 | INIT_LIST_HEAD(&codec->dapm_widgets); |
| 1340 | INIT_LIST_HEAD(&codec->dapm_paths); |
| 1341 | |
| 1342 | codec->private_data = wm9081; |
| 1343 | codec->name = "WM9081"; |
| 1344 | codec->owner = THIS_MODULE; |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 1345 | codec->dai = &wm9081_dai; |
| 1346 | codec->num_dai = 1; |
| 1347 | codec->reg_cache_size = ARRAY_SIZE(wm9081->reg_cache); |
| 1348 | codec->reg_cache = &wm9081->reg_cache; |
| 1349 | codec->bias_level = SND_SOC_BIAS_OFF; |
| 1350 | codec->set_bias_level = wm9081_set_bias_level; |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 1351 | codec->volatile_register = wm9081_volatile_register; |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 1352 | |
| 1353 | memcpy(codec->reg_cache, wm9081_reg_defaults, |
| 1354 | sizeof(wm9081_reg_defaults)); |
| 1355 | |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 1356 | ret = snd_soc_codec_set_cache_io(codec, 8, 16, control); |
| 1357 | if (ret != 0) { |
| 1358 | dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); |
| 1359 | return ret; |
| 1360 | } |
| 1361 | |
| 1362 | reg = snd_soc_read(codec, WM9081_SOFTWARE_RESET); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 1363 | if (reg != 0x9081) { |
| 1364 | dev_err(codec->dev, "Device is not a WM9081: ID=0x%x\n", reg); |
| 1365 | ret = -EINVAL; |
| 1366 | goto err; |
| 1367 | } |
| 1368 | |
| 1369 | ret = wm9081_reset(codec); |
| 1370 | if (ret < 0) { |
| 1371 | dev_err(codec->dev, "Failed to issue reset\n"); |
| 1372 | return ret; |
| 1373 | } |
| 1374 | |
| 1375 | wm9081_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
| 1376 | |
| 1377 | /* Enable zero cross by default */ |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 1378 | reg = snd_soc_read(codec, WM9081_ANALOGUE_LINEOUT); |
| 1379 | snd_soc_write(codec, WM9081_ANALOGUE_LINEOUT, reg | WM9081_LINEOUTZC); |
| 1380 | reg = snd_soc_read(codec, WM9081_ANALOGUE_SPEAKER_PGA); |
| 1381 | snd_soc_write(codec, WM9081_ANALOGUE_SPEAKER_PGA, |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 1382 | reg | WM9081_SPKPGAZC); |
| 1383 | |
| 1384 | wm9081_dai.dev = codec->dev; |
| 1385 | |
| 1386 | wm9081_codec = codec; |
| 1387 | |
| 1388 | ret = snd_soc_register_codec(codec); |
| 1389 | if (ret != 0) { |
| 1390 | dev_err(codec->dev, "Failed to register codec: %d\n", ret); |
| 1391 | return ret; |
| 1392 | } |
| 1393 | |
| 1394 | ret = snd_soc_register_dai(&wm9081_dai); |
| 1395 | if (ret != 0) { |
| 1396 | dev_err(codec->dev, "Failed to register DAI: %d\n", ret); |
| 1397 | snd_soc_unregister_codec(codec); |
| 1398 | return ret; |
| 1399 | } |
| 1400 | |
| 1401 | return 0; |
| 1402 | |
| 1403 | err: |
| 1404 | kfree(wm9081); |
| 1405 | return ret; |
| 1406 | } |
| 1407 | |
| 1408 | static void wm9081_unregister(struct wm9081_priv *wm9081) |
| 1409 | { |
| 1410 | wm9081_set_bias_level(&wm9081->codec, SND_SOC_BIAS_OFF); |
| 1411 | snd_soc_unregister_dai(&wm9081_dai); |
| 1412 | snd_soc_unregister_codec(&wm9081->codec); |
| 1413 | kfree(wm9081); |
| 1414 | wm9081_codec = NULL; |
| 1415 | } |
| 1416 | |
| 1417 | static __devinit int wm9081_i2c_probe(struct i2c_client *i2c, |
| 1418 | const struct i2c_device_id *id) |
| 1419 | { |
| 1420 | struct wm9081_priv *wm9081; |
| 1421 | struct snd_soc_codec *codec; |
| 1422 | |
| 1423 | wm9081 = kzalloc(sizeof(struct wm9081_priv), GFP_KERNEL); |
| 1424 | if (wm9081 == NULL) |
| 1425 | return -ENOMEM; |
| 1426 | |
| 1427 | codec = &wm9081->codec; |
| 1428 | codec->hw_write = (hw_write_t)i2c_master_send; |
| 1429 | wm9081->retune = i2c->dev.platform_data; |
| 1430 | |
| 1431 | i2c_set_clientdata(i2c, wm9081); |
| 1432 | codec->control_data = i2c; |
| 1433 | |
| 1434 | codec->dev = &i2c->dev; |
| 1435 | |
Mark Brown | 8d50e44 | 2009-07-10 23:12:01 +0100 | [diff] [blame] | 1436 | return wm9081_register(wm9081, SND_SOC_I2C); |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 1437 | } |
| 1438 | |
| 1439 | static __devexit int wm9081_i2c_remove(struct i2c_client *client) |
| 1440 | { |
| 1441 | struct wm9081_priv *wm9081 = i2c_get_clientdata(client); |
| 1442 | wm9081_unregister(wm9081); |
| 1443 | return 0; |
| 1444 | } |
| 1445 | |
| 1446 | static const struct i2c_device_id wm9081_i2c_id[] = { |
| 1447 | { "wm9081", 0 }, |
| 1448 | { } |
| 1449 | }; |
| 1450 | MODULE_DEVICE_TABLE(i2c, wm9081_i2c_id); |
| 1451 | |
| 1452 | static struct i2c_driver wm9081_i2c_driver = { |
| 1453 | .driver = { |
| 1454 | .name = "wm9081", |
| 1455 | .owner = THIS_MODULE, |
| 1456 | }, |
| 1457 | .probe = wm9081_i2c_probe, |
| 1458 | .remove = __devexit_p(wm9081_i2c_remove), |
Mark Brown | 86ed366 | 2009-05-22 15:01:19 +0100 | [diff] [blame] | 1459 | .id_table = wm9081_i2c_id, |
| 1460 | }; |
| 1461 | |
| 1462 | static int __init wm9081_modinit(void) |
| 1463 | { |
| 1464 | int ret; |
| 1465 | |
| 1466 | ret = i2c_add_driver(&wm9081_i2c_driver); |
| 1467 | if (ret != 0) { |
| 1468 | printk(KERN_ERR "Failed to register WM9081 I2C driver: %d\n", |
| 1469 | ret); |
| 1470 | } |
| 1471 | |
| 1472 | return ret; |
| 1473 | } |
| 1474 | module_init(wm9081_modinit); |
| 1475 | |
| 1476 | static void __exit wm9081_exit(void) |
| 1477 | { |
| 1478 | i2c_del_driver(&wm9081_i2c_driver); |
| 1479 | } |
| 1480 | module_exit(wm9081_exit); |
| 1481 | |
| 1482 | |
| 1483 | MODULE_DESCRIPTION("ASoC WM9081 driver"); |
| 1484 | MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); |
| 1485 | MODULE_LICENSE("GPL"); |