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Bartlomiej Zolnierkiewicz66623272008-07-21 16:55:11 -07001/* ide.h: SPARC PCI specific IDE glue.
2 *
3 * Copyright (C) 1997 David S. Miller (davem@davemloft.net)
4 * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
5 * Adaptation from sparc64 version to sparc by Pete Zaitcev.
6 */
7
8#ifndef _SPARC_IDE_H
9#define _SPARC_IDE_H
10
11#ifdef __KERNEL__
12
13#include <asm/io.h>
14#ifdef CONFIG_SPARC64
15#include <asm/pgalloc.h>
16#include <asm/spitfire.h>
17#include <asm/cacheflush.h>
18#include <asm/page.h>
Sam Ravnborgf5e706a2008-07-17 21:55:51 -070019#else
Bartlomiej Zolnierkiewicz66623272008-07-21 16:55:11 -070020#include <asm/pgtable.h>
21#include <asm/psr.h>
Sam Ravnborgf5e706a2008-07-17 21:55:51 -070022#endif
Bartlomiej Zolnierkiewicz66623272008-07-21 16:55:11 -070023
24#undef MAX_HWIFS
25#define MAX_HWIFS 2
26
27#define __ide_insl(data_reg, buffer, wcount) \
28 __ide_insw(data_reg, buffer, (wcount)<<1)
29#define __ide_outsl(data_reg, buffer, wcount) \
30 __ide_outsw(data_reg, buffer, (wcount)<<1)
31
32/* On sparc, I/O ports and MMIO registers are accessed identically. */
33#define __ide_mm_insw __ide_insw
34#define __ide_mm_insl __ide_insl
35#define __ide_mm_outsw __ide_outsw
36#define __ide_mm_outsl __ide_outsl
37
38static inline void __ide_insw(void __iomem *port, void *dst, u32 count)
39{
40#if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE)
41 unsigned long end = (unsigned long)dst + (count << 1);
Sam Ravnborgf5e706a2008-07-17 21:55:51 -070042#endif
Bartlomiej Zolnierkiewicz66623272008-07-21 16:55:11 -070043 u16 *ps = dst;
44 u32 *pi;
45
46 if(((unsigned long)ps) & 0x2) {
47 *ps++ = __raw_readw(port);
48 count--;
49 }
50 pi = (u32 *)ps;
51 while(count >= 2) {
52 u32 w;
53
54 w = __raw_readw(port) << 16;
55 w |= __raw_readw(port);
56 *pi++ = w;
57 count -= 2;
58 }
59 ps = (u16 *)pi;
60 if(count)
61 *ps++ = __raw_readw(port);
62
63#if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE)
64 __flush_dcache_range((unsigned long)dst, end);
65#endif
66}
67
68static inline void __ide_outsw(void __iomem *port, const void *src, u32 count)
69{
70#if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE)
71 unsigned long end = (unsigned long)src + (count << 1);
72#endif
73 const u16 *ps = src;
74 const u32 *pi;
75
76 if(((unsigned long)src) & 0x2) {
77 __raw_writew(*ps++, port);
78 count--;
79 }
80 pi = (const u32 *)ps;
81 while(count >= 2) {
82 u32 w;
83
84 w = *pi++;
85 __raw_writew((w >> 16), port);
86 __raw_writew(w, port);
87 count -= 2;
88 }
89 ps = (const u16 *)pi;
90 if(count)
91 __raw_writew(*ps, port);
92
93#if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE)
94 __flush_dcache_range((unsigned long)src, end);
95#endif
96}
97
98#endif /* __KERNEL__ */
99
100#endif /* _SPARC_IDE_H */