Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
Bartlomiej Zolnierkiewicz | a29ec3b | 2007-10-16 22:29:52 +0200 | [diff] [blame] | 2 | * linux/drivers/ide/pci/hpt366.c Version 1.14 Oct 1, 2007 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 1999-2003 Andre Hedrick <andre@linux-ide.org> |
| 5 | * Portions Copyright (C) 2001 Sun Microsystems, Inc. |
| 6 | * Portions Copyright (C) 2003 Red Hat Inc |
Sergei Shtylyov | 38b66f8 | 2007-04-20 22:16:58 +0200 | [diff] [blame] | 7 | * Portions Copyright (C) 2005-2007 MontaVista Software, Inc. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 8 | * |
| 9 | * Thanks to HighPoint Technologies for their assistance, and hardware. |
| 10 | * Special Thanks to Jon Burchmore in SanDiego for the deep pockets, his |
| 11 | * donation of an ABit BP6 mainboard, processor, and memory acellerated |
| 12 | * development and support. |
| 13 | * |
Alan Cox | b39b01f | 2005-06-27 15:24:27 -0700 | [diff] [blame] | 14 | * |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 15 | * HighPoint has its own drivers (open source except for the RAID part) |
| 16 | * available from http://www.highpoint-tech.com/BIOS%20+%20Driver/. |
| 17 | * This may be useful to anyone wanting to work on this driver, however do not |
| 18 | * trust them too much since the code tends to become less and less meaningful |
| 19 | * as the time passes... :-/ |
Alan Cox | b39b01f | 2005-06-27 15:24:27 -0700 | [diff] [blame] | 20 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 21 | * Note that final HPT370 support was done by force extraction of GPL. |
| 22 | * |
| 23 | * - add function for getting/setting power status of drive |
| 24 | * - the HPT370's state machine can get confused. reset it before each dma |
| 25 | * xfer to prevent that from happening. |
| 26 | * - reset state engine whenever we get an error. |
| 27 | * - check for busmaster state at end of dma. |
| 28 | * - use new highpoint timings. |
| 29 | * - detect bus speed using highpoint register. |
| 30 | * - use pll if we don't have a clock table. added a 66MHz table that's |
| 31 | * just 2x the 33MHz table. |
| 32 | * - removed turnaround. NOTE: we never want to switch between pll and |
| 33 | * pci clocks as the chip can glitch in those cases. the highpoint |
| 34 | * approved workaround slows everything down too much to be useful. in |
| 35 | * addition, we would have to serialize access to each chip. |
| 36 | * Adrian Sun <a.sun@sun.com> |
| 37 | * |
| 38 | * add drive timings for 66MHz PCI bus, |
| 39 | * fix ATA Cable signal detection, fix incorrect /proc info |
| 40 | * add /proc display for per-drive PIO/DMA/UDMA mode and |
| 41 | * per-channel ATA-33/66 Cable detect. |
| 42 | * Duncan Laurie <void@sun.com> |
| 43 | * |
| 44 | * fixup /proc output for multiple controllers |
| 45 | * Tim Hockin <thockin@sun.com> |
| 46 | * |
| 47 | * On hpt366: |
| 48 | * Reset the hpt366 on error, reset on dma |
| 49 | * Fix disabling Fast Interrupt hpt366. |
| 50 | * Mike Waychison <crlf@sun.com> |
| 51 | * |
| 52 | * Added support for 372N clocking and clock switching. The 372N needs |
| 53 | * different clocks on read/write. This requires overloading rw_disk and |
| 54 | * other deeply crazy things. Thanks to <http://www.hoerstreich.de> for |
| 55 | * keeping me sane. |
| 56 | * Alan Cox <alan@redhat.com> |
| 57 | * |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 58 | * - fix the clock turnaround code: it was writing to the wrong ports when |
| 59 | * called for the secondary channel, caching the current clock mode per- |
| 60 | * channel caused the cached register value to get out of sync with the |
| 61 | * actual one, the channels weren't serialized, the turnaround shouldn't |
| 62 | * be done on 66 MHz PCI bus |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 63 | * - disable UltraATA/100 for HPT370 by default as the 33 MHz clock being used |
| 64 | * does not allow for this speed anyway |
| 65 | * - avoid touching disabled channels (e.g. HPT371/N are single channel chips, |
| 66 | * their primary channel is kind of virtual, it isn't tied to any pins) |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 67 | * - fix/remove bad/unused timing tables and use one set of tables for the whole |
| 68 | * HPT37x chip family; save space by introducing the separate transfer mode |
| 69 | * table in which the mode lookup is done |
Sergei Shtylyov | 26c068d | 2006-12-13 00:35:52 -0800 | [diff] [blame] | 70 | * - use f_CNT value saved by the HighPoint BIOS as reading it directly gives |
Sergei Shtylyov | 7293136 | 2007-09-11 22:28:35 +0200 | [diff] [blame] | 71 | * the wrong PCI frequency since DPLL has already been calibrated by BIOS; |
| 72 | * read it only from the function 0 of HPT374 chips |
Sergei Shtylyov | 33b18a6 | 2006-12-13 00:35:50 -0800 | [diff] [blame] | 73 | * - fix the hotswap code: it caused RESET- to glitch when tristating the bus, |
| 74 | * and for HPT36x the obsolete HDIO_TRISTATE_HWIF handler was called instead |
Sergei Shtylyov | 73d1dd9 | 2006-12-13 00:35:51 -0800 | [diff] [blame] | 75 | * - pass to init_chipset() handlers a copy of the IDE PCI device structure as |
| 76 | * they tamper with its fields |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 77 | * - pass to the init_setup handlers a copy of the ide_pci_device_t structure |
| 78 | * since they may tamper with its fields |
Sergei Shtylyov | 9077857 | 2007-02-07 18:17:51 +0100 | [diff] [blame] | 79 | * - prefix the driver startup messages with the real chip name |
| 80 | * - claim the extra 240 bytes of I/O space for all chips |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 81 | * - optimize the UltraDMA filtering and the drive list lookup code |
Sergei Shtylyov | b458671 | 2007-02-07 18:17:54 +0100 | [diff] [blame] | 82 | * - use pci_get_slot() to get to the function 1 of HPT36x/374 |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 83 | * - cache offset of the channel's misc. control registers (MCRs) being used |
| 84 | * throughout the driver |
| 85 | * - only touch the relevant MCR when detecting the cable type on HPT374's |
| 86 | * function 1 |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 87 | * - rename all the register related variables consistently |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 88 | * - move all the interrupt twiddling code from the speedproc handlers into |
| 89 | * init_hwif_hpt366(), also grouping all the DMA related code together there |
| 90 | * - merge two HPT37x speedproc handlers, fix the PIO timing register mask and |
| 91 | * separate the UltraDMA and MWDMA masks there to avoid changing PIO timings |
| 92 | * when setting an UltraDMA mode |
| 93 | * - fix hpt3xx_tune_drive() to set the PIO mode requested, not always select |
| 94 | * the best possible one |
Sergei Shtylyov | 4bf63de | 2007-02-07 18:18:13 +0100 | [diff] [blame] | 95 | * - clean up DMA timeout handling for HPT370 |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 96 | * - switch to using the enumeration type to differ between the numerous chip |
| 97 | * variants, matching PCI device/revision ID with the chip type early, at the |
| 98 | * init_setup stage |
| 99 | * - extend the hpt_info structure to hold the DPLL and PCI clock frequencies, |
| 100 | * stop duplicating it for each channel by storing the pointer in the pci_dev |
| 101 | * structure: first, at the init_setup stage, point it to a static "template" |
| 102 | * with only the chip type and its specific base DPLL frequency, the highest |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 103 | * UltraDMA mode, and the chip settings table pointer filled, then, at the |
| 104 | * init_chipset stage, allocate per-chip instance and fill it with the rest |
| 105 | * of the necessary information |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 106 | * - get rid of the constant thresholds in the HPT37x PCI clock detection code, |
| 107 | * switch to calculating PCI clock frequency based on the chip's base DPLL |
| 108 | * frequency |
| 109 | * - switch to using the DPLL clock and enable UltraATA/133 mode by default on |
Sergei Shtylyov | 278978e | 2007-06-08 15:14:32 +0200 | [diff] [blame] | 110 | * anything newer than HPT370/A (except HPT374 that is not capable of this |
| 111 | * mode according to the manual) |
Sergei Shtylyov | 6273d26 | 2007-02-07 18:18:20 +0100 | [diff] [blame] | 112 | * - fold PCI clock detection and DPLL setup code into init_chipset_hpt366(), |
| 113 | * also fixing the interchanged 25/40 MHz PCI clock cases for HPT36x chips; |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 114 | * unify HPT36x/37x timing setup code and the speedproc handlers by joining |
| 115 | * the register setting lists into the table indexed by the clock selected |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 116 | * - set the correct hwif->ultra_mask for each individual chip |
Sergei Shtylyov | b4e4436 | 2007-10-11 23:53:58 +0200 | [diff] [blame] | 117 | * - add Ultra and MW DMA mode filtering for the HPT37[24] based SATA cards |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 118 | * Sergei Shtylyov, <sshtylyov@ru.mvista.com> or <source@mvista.com> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 119 | */ |
| 120 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 121 | #include <linux/types.h> |
| 122 | #include <linux/module.h> |
| 123 | #include <linux/kernel.h> |
| 124 | #include <linux/delay.h> |
| 125 | #include <linux/timer.h> |
| 126 | #include <linux/mm.h> |
| 127 | #include <linux/ioport.h> |
| 128 | #include <linux/blkdev.h> |
| 129 | #include <linux/hdreg.h> |
| 130 | |
| 131 | #include <linux/interrupt.h> |
| 132 | #include <linux/pci.h> |
| 133 | #include <linux/init.h> |
| 134 | #include <linux/ide.h> |
| 135 | |
| 136 | #include <asm/uaccess.h> |
| 137 | #include <asm/io.h> |
| 138 | #include <asm/irq.h> |
| 139 | |
| 140 | /* various tuning parameters */ |
| 141 | #define HPT_RESET_STATE_ENGINE |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 142 | #undef HPT_DELAY_INTERRUPT |
| 143 | #define HPT_SERIALIZE_IO 0 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 144 | |
| 145 | static const char *quirk_drives[] = { |
| 146 | "QUANTUM FIREBALLlct08 08", |
| 147 | "QUANTUM FIREBALLP KA6.4", |
| 148 | "QUANTUM FIREBALLP LM20.4", |
| 149 | "QUANTUM FIREBALLP LM20.5", |
| 150 | NULL |
| 151 | }; |
| 152 | |
| 153 | static const char *bad_ata100_5[] = { |
| 154 | "IBM-DTLA-307075", |
| 155 | "IBM-DTLA-307060", |
| 156 | "IBM-DTLA-307045", |
| 157 | "IBM-DTLA-307030", |
| 158 | "IBM-DTLA-307020", |
| 159 | "IBM-DTLA-307015", |
| 160 | "IBM-DTLA-305040", |
| 161 | "IBM-DTLA-305030", |
| 162 | "IBM-DTLA-305020", |
| 163 | "IC35L010AVER07-0", |
| 164 | "IC35L020AVER07-0", |
| 165 | "IC35L030AVER07-0", |
| 166 | "IC35L040AVER07-0", |
| 167 | "IC35L060AVER07-0", |
| 168 | "WDC AC310200R", |
| 169 | NULL |
| 170 | }; |
| 171 | |
| 172 | static const char *bad_ata66_4[] = { |
| 173 | "IBM-DTLA-307075", |
| 174 | "IBM-DTLA-307060", |
| 175 | "IBM-DTLA-307045", |
| 176 | "IBM-DTLA-307030", |
| 177 | "IBM-DTLA-307020", |
| 178 | "IBM-DTLA-307015", |
| 179 | "IBM-DTLA-305040", |
| 180 | "IBM-DTLA-305030", |
| 181 | "IBM-DTLA-305020", |
| 182 | "IC35L010AVER07-0", |
| 183 | "IC35L020AVER07-0", |
| 184 | "IC35L030AVER07-0", |
| 185 | "IC35L040AVER07-0", |
| 186 | "IC35L060AVER07-0", |
| 187 | "WDC AC310200R", |
Sergei Shtylyov | 783353b | 2007-07-03 22:28:35 +0200 | [diff] [blame] | 188 | "MAXTOR STM3320620A", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 189 | NULL |
| 190 | }; |
| 191 | |
| 192 | static const char *bad_ata66_3[] = { |
| 193 | "WDC AC310200R", |
| 194 | NULL |
| 195 | }; |
| 196 | |
| 197 | static const char *bad_ata33[] = { |
| 198 | "Maxtor 92720U8", "Maxtor 92040U6", "Maxtor 91360U4", "Maxtor 91020U3", "Maxtor 90845U3", "Maxtor 90650U2", |
| 199 | "Maxtor 91360D8", "Maxtor 91190D7", "Maxtor 91020D6", "Maxtor 90845D5", "Maxtor 90680D4", "Maxtor 90510D3", "Maxtor 90340D2", |
| 200 | "Maxtor 91152D8", "Maxtor 91008D7", "Maxtor 90845D6", "Maxtor 90840D6", "Maxtor 90720D5", "Maxtor 90648D5", "Maxtor 90576D4", |
| 201 | "Maxtor 90510D4", |
| 202 | "Maxtor 90432D3", "Maxtor 90288D2", "Maxtor 90256D2", |
| 203 | "Maxtor 91000D8", "Maxtor 90910D8", "Maxtor 90875D7", "Maxtor 90840D7", "Maxtor 90750D6", "Maxtor 90625D5", "Maxtor 90500D4", |
| 204 | "Maxtor 91728D8", "Maxtor 91512D7", "Maxtor 91303D6", "Maxtor 91080D5", "Maxtor 90845D4", "Maxtor 90680D4", "Maxtor 90648D3", "Maxtor 90432D2", |
| 205 | NULL |
| 206 | }; |
| 207 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 208 | static u8 xfer_speeds[] = { |
| 209 | XFER_UDMA_6, |
| 210 | XFER_UDMA_5, |
| 211 | XFER_UDMA_4, |
| 212 | XFER_UDMA_3, |
| 213 | XFER_UDMA_2, |
| 214 | XFER_UDMA_1, |
| 215 | XFER_UDMA_0, |
| 216 | |
| 217 | XFER_MW_DMA_2, |
| 218 | XFER_MW_DMA_1, |
| 219 | XFER_MW_DMA_0, |
| 220 | |
| 221 | XFER_PIO_4, |
| 222 | XFER_PIO_3, |
| 223 | XFER_PIO_2, |
| 224 | XFER_PIO_1, |
| 225 | XFER_PIO_0 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 226 | }; |
| 227 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 228 | /* Key for bus clock timings |
| 229 | * 36x 37x |
| 230 | * bits bits |
| 231 | * 0:3 0:3 data_high_time. Inactive time of DIOW_/DIOR_ for PIO and MW DMA. |
| 232 | * cycles = value + 1 |
| 233 | * 4:7 4:8 data_low_time. Active time of DIOW_/DIOR_ for PIO and MW DMA. |
| 234 | * cycles = value + 1 |
| 235 | * 8:11 9:12 cmd_high_time. Inactive time of DIOW_/DIOR_ during task file |
| 236 | * register access. |
| 237 | * 12:15 13:17 cmd_low_time. Active time of DIOW_/DIOR_ during task file |
| 238 | * register access. |
| 239 | * 16:18 18:20 udma_cycle_time. Clock cycles for UDMA xfer. |
| 240 | * - 21 CLK frequency: 0=ATA clock, 1=dual ATA clock. |
| 241 | * 19:21 22:24 pre_high_time. Time to initialize the 1st cycle for PIO and |
| 242 | * MW DMA xfer. |
| 243 | * 22:24 25:27 cmd_pre_high_time. Time to initialize the 1st PIO cycle for |
| 244 | * task file register access. |
| 245 | * 28 28 UDMA enable. |
| 246 | * 29 29 DMA enable. |
| 247 | * 30 30 PIO MST enable. If set, the chip is in bus master mode during |
| 248 | * PIO xfer. |
| 249 | * 31 31 FIFO enable. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 250 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 251 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 252 | static u32 forty_base_hpt36x[] = { |
| 253 | /* XFER_UDMA_6 */ 0x900fd943, |
| 254 | /* XFER_UDMA_5 */ 0x900fd943, |
| 255 | /* XFER_UDMA_4 */ 0x900fd943, |
| 256 | /* XFER_UDMA_3 */ 0x900ad943, |
| 257 | /* XFER_UDMA_2 */ 0x900bd943, |
| 258 | /* XFER_UDMA_1 */ 0x9008d943, |
| 259 | /* XFER_UDMA_0 */ 0x9008d943, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 260 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 261 | /* XFER_MW_DMA_2 */ 0xa008d943, |
| 262 | /* XFER_MW_DMA_1 */ 0xa010d955, |
| 263 | /* XFER_MW_DMA_0 */ 0xa010d9fc, |
| 264 | |
| 265 | /* XFER_PIO_4 */ 0xc008d963, |
| 266 | /* XFER_PIO_3 */ 0xc010d974, |
| 267 | /* XFER_PIO_2 */ 0xc010d997, |
| 268 | /* XFER_PIO_1 */ 0xc010d9c7, |
| 269 | /* XFER_PIO_0 */ 0xc018d9d9 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 270 | }; |
| 271 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 272 | static u32 thirty_three_base_hpt36x[] = { |
| 273 | /* XFER_UDMA_6 */ 0x90c9a731, |
| 274 | /* XFER_UDMA_5 */ 0x90c9a731, |
| 275 | /* XFER_UDMA_4 */ 0x90c9a731, |
| 276 | /* XFER_UDMA_3 */ 0x90cfa731, |
| 277 | /* XFER_UDMA_2 */ 0x90caa731, |
| 278 | /* XFER_UDMA_1 */ 0x90cba731, |
| 279 | /* XFER_UDMA_0 */ 0x90c8a731, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 280 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 281 | /* XFER_MW_DMA_2 */ 0xa0c8a731, |
| 282 | /* XFER_MW_DMA_1 */ 0xa0c8a732, /* 0xa0c8a733 */ |
| 283 | /* XFER_MW_DMA_0 */ 0xa0c8a797, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 284 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 285 | /* XFER_PIO_4 */ 0xc0c8a731, |
| 286 | /* XFER_PIO_3 */ 0xc0c8a742, |
| 287 | /* XFER_PIO_2 */ 0xc0d0a753, |
| 288 | /* XFER_PIO_1 */ 0xc0d0a7a3, /* 0xc0d0a793 */ |
| 289 | /* XFER_PIO_0 */ 0xc0d0a7aa /* 0xc0d0a7a7 */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 290 | }; |
| 291 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 292 | static u32 twenty_five_base_hpt36x[] = { |
| 293 | /* XFER_UDMA_6 */ 0x90c98521, |
| 294 | /* XFER_UDMA_5 */ 0x90c98521, |
| 295 | /* XFER_UDMA_4 */ 0x90c98521, |
| 296 | /* XFER_UDMA_3 */ 0x90cf8521, |
| 297 | /* XFER_UDMA_2 */ 0x90cf8521, |
| 298 | /* XFER_UDMA_1 */ 0x90cb8521, |
| 299 | /* XFER_UDMA_0 */ 0x90cb8521, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 300 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 301 | /* XFER_MW_DMA_2 */ 0xa0ca8521, |
| 302 | /* XFER_MW_DMA_1 */ 0xa0ca8532, |
| 303 | /* XFER_MW_DMA_0 */ 0xa0ca8575, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 304 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 305 | /* XFER_PIO_4 */ 0xc0ca8521, |
| 306 | /* XFER_PIO_3 */ 0xc0ca8532, |
| 307 | /* XFER_PIO_2 */ 0xc0ca8542, |
| 308 | /* XFER_PIO_1 */ 0xc0d08572, |
| 309 | /* XFER_PIO_0 */ 0xc0d08585 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 310 | }; |
| 311 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 312 | static u32 thirty_three_base_hpt37x[] = { |
| 313 | /* XFER_UDMA_6 */ 0x12446231, /* 0x12646231 ?? */ |
| 314 | /* XFER_UDMA_5 */ 0x12446231, |
| 315 | /* XFER_UDMA_4 */ 0x12446231, |
| 316 | /* XFER_UDMA_3 */ 0x126c6231, |
| 317 | /* XFER_UDMA_2 */ 0x12486231, |
| 318 | /* XFER_UDMA_1 */ 0x124c6233, |
| 319 | /* XFER_UDMA_0 */ 0x12506297, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 320 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 321 | /* XFER_MW_DMA_2 */ 0x22406c31, |
| 322 | /* XFER_MW_DMA_1 */ 0x22406c33, |
| 323 | /* XFER_MW_DMA_0 */ 0x22406c97, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 324 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 325 | /* XFER_PIO_4 */ 0x06414e31, |
| 326 | /* XFER_PIO_3 */ 0x06414e42, |
| 327 | /* XFER_PIO_2 */ 0x06414e53, |
| 328 | /* XFER_PIO_1 */ 0x06814e93, |
| 329 | /* XFER_PIO_0 */ 0x06814ea7 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 330 | }; |
| 331 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 332 | static u32 fifty_base_hpt37x[] = { |
| 333 | /* XFER_UDMA_6 */ 0x12848242, |
| 334 | /* XFER_UDMA_5 */ 0x12848242, |
| 335 | /* XFER_UDMA_4 */ 0x12ac8242, |
| 336 | /* XFER_UDMA_3 */ 0x128c8242, |
| 337 | /* XFER_UDMA_2 */ 0x120c8242, |
| 338 | /* XFER_UDMA_1 */ 0x12148254, |
| 339 | /* XFER_UDMA_0 */ 0x121882ea, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 340 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 341 | /* XFER_MW_DMA_2 */ 0x22808242, |
| 342 | /* XFER_MW_DMA_1 */ 0x22808254, |
| 343 | /* XFER_MW_DMA_0 */ 0x228082ea, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 344 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 345 | /* XFER_PIO_4 */ 0x0a81f442, |
| 346 | /* XFER_PIO_3 */ 0x0a81f443, |
| 347 | /* XFER_PIO_2 */ 0x0a81f454, |
| 348 | /* XFER_PIO_1 */ 0x0ac1f465, |
| 349 | /* XFER_PIO_0 */ 0x0ac1f48a |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 350 | }; |
| 351 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 352 | static u32 sixty_six_base_hpt37x[] = { |
| 353 | /* XFER_UDMA_6 */ 0x1c869c62, |
| 354 | /* XFER_UDMA_5 */ 0x1cae9c62, /* 0x1c8a9c62 */ |
| 355 | /* XFER_UDMA_4 */ 0x1c8a9c62, |
| 356 | /* XFER_UDMA_3 */ 0x1c8e9c62, |
| 357 | /* XFER_UDMA_2 */ 0x1c929c62, |
| 358 | /* XFER_UDMA_1 */ 0x1c9a9c62, |
| 359 | /* XFER_UDMA_0 */ 0x1c829c62, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 360 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 361 | /* XFER_MW_DMA_2 */ 0x2c829c62, |
| 362 | /* XFER_MW_DMA_1 */ 0x2c829c66, |
| 363 | /* XFER_MW_DMA_0 */ 0x2c829d2e, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 364 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 365 | /* XFER_PIO_4 */ 0x0c829c62, |
| 366 | /* XFER_PIO_3 */ 0x0c829c84, |
| 367 | /* XFER_PIO_2 */ 0x0c829ca6, |
| 368 | /* XFER_PIO_1 */ 0x0d029d26, |
| 369 | /* XFER_PIO_0 */ 0x0d029d5e |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 370 | }; |
| 371 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 372 | #define HPT366_DEBUG_DRIVE_INFO 0 |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 373 | #define HPT371_ALLOW_ATA133_6 1 |
| 374 | #define HPT302_ALLOW_ATA133_6 1 |
| 375 | #define HPT372_ALLOW_ATA133_6 1 |
Sergei Shtylyov | e139b0b | 2007-02-07 18:17:37 +0100 | [diff] [blame] | 376 | #define HPT370_ALLOW_ATA100_5 0 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 377 | #define HPT366_ALLOW_ATA66_4 1 |
| 378 | #define HPT366_ALLOW_ATA66_3 1 |
| 379 | #define HPT366_MAX_DEVS 8 |
| 380 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 381 | /* Supported ATA clock frequencies */ |
| 382 | enum ata_clock { |
| 383 | ATA_CLOCK_25MHZ, |
| 384 | ATA_CLOCK_33MHZ, |
| 385 | ATA_CLOCK_40MHZ, |
| 386 | ATA_CLOCK_50MHZ, |
| 387 | ATA_CLOCK_66MHZ, |
| 388 | NUM_ATA_CLOCKS |
Alan Cox | b39b01f | 2005-06-27 15:24:27 -0700 | [diff] [blame] | 389 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 390 | |
Alan Cox | b39b01f | 2005-06-27 15:24:27 -0700 | [diff] [blame] | 391 | /* |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 392 | * Hold all the HighPoint chip information in one place. |
Alan Cox | b39b01f | 2005-06-27 15:24:27 -0700 | [diff] [blame] | 393 | */ |
| 394 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 395 | struct hpt_info { |
| 396 | u8 chip_type; /* Chip type */ |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 397 | u8 max_ultra; /* Max. UltraDMA mode allowed */ |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 398 | u8 dpll_clk; /* DPLL clock in MHz */ |
| 399 | u8 pci_clk; /* PCI clock in MHz */ |
| 400 | u32 **settings; /* Chipset settings table */ |
| 401 | }; |
Sergei Shtylyov | e139b0b | 2007-02-07 18:17:37 +0100 | [diff] [blame] | 402 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 403 | /* Supported HighPoint chips */ |
| 404 | enum { |
| 405 | HPT36x, |
| 406 | HPT370, |
| 407 | HPT370A, |
| 408 | HPT374, |
| 409 | HPT372, |
| 410 | HPT372A, |
| 411 | HPT302, |
| 412 | HPT371, |
| 413 | HPT372N, |
| 414 | HPT302N, |
| 415 | HPT371N |
| 416 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 417 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 418 | static u32 *hpt36x_settings[NUM_ATA_CLOCKS] = { |
| 419 | twenty_five_base_hpt36x, |
| 420 | thirty_three_base_hpt36x, |
| 421 | forty_base_hpt36x, |
| 422 | NULL, |
| 423 | NULL |
| 424 | }; |
| 425 | |
| 426 | static u32 *hpt37x_settings[NUM_ATA_CLOCKS] = { |
| 427 | NULL, |
| 428 | thirty_three_base_hpt37x, |
| 429 | NULL, |
| 430 | fifty_base_hpt37x, |
| 431 | sixty_six_base_hpt37x |
| 432 | }; |
| 433 | |
| 434 | static struct hpt_info hpt36x __devinitdata = { |
| 435 | .chip_type = HPT36x, |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 436 | .max_ultra = HPT366_ALLOW_ATA66_3 ? (HPT366_ALLOW_ATA66_4 ? 4 : 3) : 2, |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 437 | .dpll_clk = 0, /* no DPLL */ |
| 438 | .settings = hpt36x_settings |
| 439 | }; |
| 440 | |
| 441 | static struct hpt_info hpt370 __devinitdata = { |
| 442 | .chip_type = HPT370, |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 443 | .max_ultra = HPT370_ALLOW_ATA100_5 ? 5 : 4, |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 444 | .dpll_clk = 48, |
| 445 | .settings = hpt37x_settings |
| 446 | }; |
| 447 | |
| 448 | static struct hpt_info hpt370a __devinitdata = { |
| 449 | .chip_type = HPT370A, |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 450 | .max_ultra = HPT370_ALLOW_ATA100_5 ? 5 : 4, |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 451 | .dpll_clk = 48, |
| 452 | .settings = hpt37x_settings |
| 453 | }; |
| 454 | |
| 455 | static struct hpt_info hpt374 __devinitdata = { |
| 456 | .chip_type = HPT374, |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 457 | .max_ultra = 5, |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 458 | .dpll_clk = 48, |
| 459 | .settings = hpt37x_settings |
| 460 | }; |
| 461 | |
| 462 | static struct hpt_info hpt372 __devinitdata = { |
| 463 | .chip_type = HPT372, |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 464 | .max_ultra = HPT372_ALLOW_ATA133_6 ? 6 : 5, |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 465 | .dpll_clk = 55, |
| 466 | .settings = hpt37x_settings |
| 467 | }; |
| 468 | |
| 469 | static struct hpt_info hpt372a __devinitdata = { |
| 470 | .chip_type = HPT372A, |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 471 | .max_ultra = HPT372_ALLOW_ATA133_6 ? 6 : 5, |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 472 | .dpll_clk = 66, |
| 473 | .settings = hpt37x_settings |
| 474 | }; |
| 475 | |
| 476 | static struct hpt_info hpt302 __devinitdata = { |
| 477 | .chip_type = HPT302, |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 478 | .max_ultra = HPT372_ALLOW_ATA133_6 ? 6 : 5, |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 479 | .dpll_clk = 66, |
| 480 | .settings = hpt37x_settings |
| 481 | }; |
| 482 | |
| 483 | static struct hpt_info hpt371 __devinitdata = { |
| 484 | .chip_type = HPT371, |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 485 | .max_ultra = HPT371_ALLOW_ATA133_6 ? 6 : 5, |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 486 | .dpll_clk = 66, |
| 487 | .settings = hpt37x_settings |
| 488 | }; |
| 489 | |
| 490 | static struct hpt_info hpt372n __devinitdata = { |
| 491 | .chip_type = HPT372N, |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 492 | .max_ultra = HPT372_ALLOW_ATA133_6 ? 6 : 5, |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 493 | .dpll_clk = 77, |
| 494 | .settings = hpt37x_settings |
| 495 | }; |
| 496 | |
| 497 | static struct hpt_info hpt302n __devinitdata = { |
| 498 | .chip_type = HPT302N, |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 499 | .max_ultra = HPT302_ALLOW_ATA133_6 ? 6 : 5, |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 500 | .dpll_clk = 77, |
Sergei Shtylyov | 38b66f8 | 2007-04-20 22:16:58 +0200 | [diff] [blame] | 501 | .settings = hpt37x_settings |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 502 | }; |
| 503 | |
| 504 | static struct hpt_info hpt371n __devinitdata = { |
| 505 | .chip_type = HPT371N, |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 506 | .max_ultra = HPT371_ALLOW_ATA133_6 ? 6 : 5, |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 507 | .dpll_clk = 77, |
| 508 | .settings = hpt37x_settings |
| 509 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 510 | |
Sergei Shtylyov | e139b0b | 2007-02-07 18:17:37 +0100 | [diff] [blame] | 511 | static int check_in_drive_list(ide_drive_t *drive, const char **list) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 512 | { |
Sergei Shtylyov | e139b0b | 2007-02-07 18:17:37 +0100 | [diff] [blame] | 513 | struct hd_driveid *id = drive->id; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 514 | |
Sergei Shtylyov | e139b0b | 2007-02-07 18:17:37 +0100 | [diff] [blame] | 515 | while (*list) |
| 516 | if (!strcmp(*list++,id->model)) |
| 517 | return 1; |
| 518 | return 0; |
| 519 | } |
Alan Cox | b39b01f | 2005-06-27 15:24:27 -0700 | [diff] [blame] | 520 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 521 | /* |
Sergei Shtylyov | 2808b0a | 2007-09-11 22:28:36 +0200 | [diff] [blame] | 522 | * The Marvell bridge chips used on the HighPoint SATA cards do not seem |
| 523 | * to support the UltraDMA modes 1, 2, and 3 as well as any MWDMA modes... |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 524 | */ |
Bartlomiej Zolnierkiewicz | 2d5eaa6 | 2007-05-10 00:01:08 +0200 | [diff] [blame] | 525 | |
| 526 | static u8 hpt3xx_udma_filter(ide_drive_t *drive) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 527 | { |
Sergei Shtylyov | 2808b0a | 2007-09-11 22:28:36 +0200 | [diff] [blame] | 528 | ide_hwif_t *hwif = HWIF(drive); |
| 529 | struct hpt_info *info = pci_get_drvdata(hwif->pci_dev); |
| 530 | u8 mask = hwif->ultra_mask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 531 | |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 532 | switch (info->chip_type) { |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 533 | case HPT36x: |
| 534 | if (!HPT366_ALLOW_ATA66_4 || |
| 535 | check_in_drive_list(drive, bad_ata66_4)) |
Sergei Shtylyov | 2808b0a | 2007-09-11 22:28:36 +0200 | [diff] [blame] | 536 | mask = ATA_UDMA3; |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 537 | |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 538 | if (!HPT366_ALLOW_ATA66_3 || |
| 539 | check_in_drive_list(drive, bad_ata66_3)) |
Sergei Shtylyov | 2808b0a | 2007-09-11 22:28:36 +0200 | [diff] [blame] | 540 | mask = ATA_UDMA2; |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 541 | break; |
Sergei Shtylyov | 2808b0a | 2007-09-11 22:28:36 +0200 | [diff] [blame] | 542 | case HPT370: |
| 543 | if (!HPT370_ALLOW_ATA100_5 || |
| 544 | check_in_drive_list(drive, bad_ata100_5)) |
| 545 | mask = ATA_UDMA4; |
| 546 | break; |
| 547 | case HPT370A: |
| 548 | if (!HPT370_ALLOW_ATA100_5 || |
| 549 | check_in_drive_list(drive, bad_ata100_5)) |
| 550 | return ATA_UDMA4; |
| 551 | case HPT372 : |
| 552 | case HPT372A: |
| 553 | case HPT372N: |
| 554 | case HPT374 : |
| 555 | if (ide_dev_is_sata(drive->id)) |
| 556 | mask &= ~0x0e; |
| 557 | /* Fall thru */ |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 558 | default: |
Sergei Shtylyov | 2808b0a | 2007-09-11 22:28:36 +0200 | [diff] [blame] | 559 | return mask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 560 | } |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 561 | |
| 562 | return check_in_drive_list(drive, bad_ata33) ? 0x00 : mask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 563 | } |
| 564 | |
Sergei Shtylyov | b4e4436 | 2007-10-11 23:53:58 +0200 | [diff] [blame] | 565 | static u8 hpt3xx_mdma_filter(ide_drive_t *drive) |
| 566 | { |
| 567 | ide_hwif_t *hwif = HWIF(drive); |
| 568 | struct hpt_info *info = pci_get_drvdata(hwif->pci_dev); |
| 569 | |
| 570 | switch (info->chip_type) { |
| 571 | case HPT372 : |
| 572 | case HPT372A: |
| 573 | case HPT372N: |
| 574 | case HPT374 : |
| 575 | if (ide_dev_is_sata(drive->id)) |
| 576 | return 0x00; |
| 577 | /* Fall thru */ |
| 578 | default: |
| 579 | return 0x07; |
| 580 | } |
| 581 | } |
| 582 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 583 | static u32 get_speed_setting(u8 speed, struct hpt_info *info) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 584 | { |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 585 | int i; |
| 586 | |
| 587 | /* |
| 588 | * Lookup the transfer mode table to get the index into |
| 589 | * the timing table. |
| 590 | * |
| 591 | * NOTE: For XFER_PIO_SLOW, PIO mode 0 timings will be used. |
| 592 | */ |
| 593 | for (i = 0; i < ARRAY_SIZE(xfer_speeds) - 1; i++) |
| 594 | if (xfer_speeds[i] == speed) |
| 595 | break; |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 596 | /* |
| 597 | * NOTE: info->settings only points to the pointer |
| 598 | * to the list of the actual register values |
| 599 | */ |
| 600 | return (*info->settings)[i]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 601 | } |
| 602 | |
Bartlomiej Zolnierkiewicz | 88b2b32 | 2007-10-13 17:47:51 +0200 | [diff] [blame] | 603 | static void hpt36x_set_mode(ide_drive_t *drive, const u8 speed) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 604 | { |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 605 | ide_hwif_t *hwif = HWIF(drive); |
| 606 | struct pci_dev *dev = hwif->pci_dev; |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 607 | struct hpt_info *info = pci_get_drvdata(dev); |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 608 | u8 itr_addr = drive->dn ? 0x44 : 0x40; |
Sergei Shtylyov | 26ccb80 | 2007-02-07 18:18:11 +0100 | [diff] [blame] | 609 | u32 old_itr = 0; |
Bartlomiej Zolnierkiewicz | 2d5eaa6 | 2007-05-10 00:01:08 +0200 | [diff] [blame] | 610 | u32 itr_mask, new_itr; |
| 611 | |
Bartlomiej Zolnierkiewicz | 2d5eaa6 | 2007-05-10 00:01:08 +0200 | [diff] [blame] | 612 | itr_mask = speed < XFER_MW_DMA_0 ? 0x30070000 : |
| 613 | (speed < XFER_UDMA_0 ? 0xc0070000 : 0xc03800ff); |
| 614 | |
| 615 | new_itr = get_speed_setting(speed, info); |
Alan Cox | b39b01f | 2005-06-27 15:24:27 -0700 | [diff] [blame] | 616 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 617 | /* |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 618 | * Disable on-chip PIO FIFO/buffer (and PIO MST mode as well) |
| 619 | * to avoid problems handling I/O errors later |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 620 | */ |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 621 | pci_read_config_dword(dev, itr_addr, &old_itr); |
| 622 | new_itr = (new_itr & ~itr_mask) | (old_itr & itr_mask); |
| 623 | new_itr &= ~0xc0000000; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 624 | |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 625 | pci_write_config_dword(dev, itr_addr, new_itr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 626 | } |
| 627 | |
Bartlomiej Zolnierkiewicz | 88b2b32 | 2007-10-13 17:47:51 +0200 | [diff] [blame] | 628 | static void hpt37x_set_mode(ide_drive_t *drive, const u8 speed) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 629 | { |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 630 | ide_hwif_t *hwif = HWIF(drive); |
| 631 | struct pci_dev *dev = hwif->pci_dev; |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 632 | struct hpt_info *info = pci_get_drvdata(dev); |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 633 | u8 itr_addr = 0x40 + (drive->dn * 4); |
Sergei Shtylyov | 26ccb80 | 2007-02-07 18:18:11 +0100 | [diff] [blame] | 634 | u32 old_itr = 0; |
Bartlomiej Zolnierkiewicz | 2d5eaa6 | 2007-05-10 00:01:08 +0200 | [diff] [blame] | 635 | u32 itr_mask, new_itr; |
| 636 | |
Bartlomiej Zolnierkiewicz | 2d5eaa6 | 2007-05-10 00:01:08 +0200 | [diff] [blame] | 637 | itr_mask = speed < XFER_MW_DMA_0 ? 0x303c0000 : |
| 638 | (speed < XFER_UDMA_0 ? 0xc03c0000 : 0xc1c001ff); |
| 639 | |
| 640 | new_itr = get_speed_setting(speed, info); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 641 | |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 642 | pci_read_config_dword(dev, itr_addr, &old_itr); |
| 643 | new_itr = (new_itr & ~itr_mask) | (old_itr & itr_mask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 644 | |
Alan Cox | b39b01f | 2005-06-27 15:24:27 -0700 | [diff] [blame] | 645 | if (speed < XFER_MW_DMA_0) |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 646 | new_itr &= ~0x80000000; /* Disable on-chip PIO FIFO/buffer */ |
| 647 | pci_write_config_dword(dev, itr_addr, new_itr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 648 | } |
| 649 | |
Bartlomiej Zolnierkiewicz | 88b2b32 | 2007-10-13 17:47:51 +0200 | [diff] [blame] | 650 | static void hpt3xx_set_mode(ide_drive_t *drive, const u8 speed) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 651 | { |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 652 | ide_hwif_t *hwif = HWIF(drive); |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 653 | struct hpt_info *info = pci_get_drvdata(hwif->pci_dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 654 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 655 | if (info->chip_type >= HPT370) |
Bartlomiej Zolnierkiewicz | 88b2b32 | 2007-10-13 17:47:51 +0200 | [diff] [blame] | 656 | hpt37x_set_mode(drive, speed); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 657 | else /* hpt368: hpt_minimum_revision(dev, 2) */ |
Bartlomiej Zolnierkiewicz | 88b2b32 | 2007-10-13 17:47:51 +0200 | [diff] [blame] | 658 | hpt36x_set_mode(drive, speed); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 659 | } |
| 660 | |
Bartlomiej Zolnierkiewicz | 26bcb87 | 2007-10-11 23:54:00 +0200 | [diff] [blame] | 661 | static void hpt3xx_set_pio_mode(ide_drive_t *drive, const u8 pio) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 662 | { |
Bartlomiej Zolnierkiewicz | 88b2b32 | 2007-10-13 17:47:51 +0200 | [diff] [blame] | 663 | hpt3xx_set_mode(drive, XFER_PIO_0 + pio); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 664 | } |
| 665 | |
Sergei Shtylyov | e139b0b | 2007-02-07 18:17:37 +0100 | [diff] [blame] | 666 | static int hpt3xx_quirkproc(ide_drive_t *drive) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 667 | { |
Sergei Shtylyov | e139b0b | 2007-02-07 18:17:37 +0100 | [diff] [blame] | 668 | struct hd_driveid *id = drive->id; |
| 669 | const char **list = quirk_drives; |
| 670 | |
| 671 | while (*list) |
| 672 | if (strstr(id->model, *list++)) |
| 673 | return 1; |
| 674 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 675 | } |
| 676 | |
Sergei Shtylyov | 26ccb80 | 2007-02-07 18:18:11 +0100 | [diff] [blame] | 677 | static void hpt3xx_intrproc(ide_drive_t *drive) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 678 | { |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 679 | ide_hwif_t *hwif = HWIF(drive); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 680 | |
| 681 | if (drive->quirk_list) |
| 682 | return; |
| 683 | /* drives in the quirk_list may not like intr setups/cleanups */ |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 684 | hwif->OUTB(drive->ctl | 2, IDE_CONTROL_REG); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 685 | } |
| 686 | |
Sergei Shtylyov | 26ccb80 | 2007-02-07 18:18:11 +0100 | [diff] [blame] | 687 | static void hpt3xx_maskproc(ide_drive_t *drive, int mask) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 688 | { |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 689 | ide_hwif_t *hwif = HWIF(drive); |
| 690 | struct pci_dev *dev = hwif->pci_dev; |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 691 | struct hpt_info *info = pci_get_drvdata(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 692 | |
| 693 | if (drive->quirk_list) { |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 694 | if (info->chip_type >= HPT370) { |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 695 | u8 scr1 = 0; |
| 696 | |
| 697 | pci_read_config_byte(dev, 0x5a, &scr1); |
| 698 | if (((scr1 & 0x10) >> 4) != mask) { |
| 699 | if (mask) |
| 700 | scr1 |= 0x10; |
| 701 | else |
| 702 | scr1 &= ~0x10; |
| 703 | pci_write_config_byte(dev, 0x5a, scr1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 704 | } |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 705 | } else { |
| 706 | if (mask) |
| 707 | disable_irq(hwif->irq); |
| 708 | else |
| 709 | enable_irq (hwif->irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 710 | } |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 711 | } else |
| 712 | hwif->OUTB(mask ? (drive->ctl | 2) : (drive->ctl & ~2), |
| 713 | IDE_CONTROL_REG); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 714 | } |
| 715 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 716 | /* |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 717 | * This is specific to the HPT366 UDMA chipset |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 718 | * by HighPoint|Triones Technologies, Inc. |
| 719 | */ |
Sergei Shtylyov | 841d2a9 | 2007-07-09 23:17:54 +0200 | [diff] [blame] | 720 | static void hpt366_dma_lost_irq(ide_drive_t *drive) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 721 | { |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 722 | struct pci_dev *dev = HWIF(drive)->pci_dev; |
| 723 | u8 mcr1 = 0, mcr3 = 0, scr1 = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 724 | |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 725 | pci_read_config_byte(dev, 0x50, &mcr1); |
| 726 | pci_read_config_byte(dev, 0x52, &mcr3); |
| 727 | pci_read_config_byte(dev, 0x5a, &scr1); |
| 728 | printk("%s: (%s) mcr1=0x%02x, mcr3=0x%02x, scr1=0x%02x\n", |
| 729 | drive->name, __FUNCTION__, mcr1, mcr3, scr1); |
| 730 | if (scr1 & 0x10) |
| 731 | pci_write_config_byte(dev, 0x5a, scr1 & ~0x10); |
Sergei Shtylyov | 841d2a9 | 2007-07-09 23:17:54 +0200 | [diff] [blame] | 732 | ide_dma_lost_irq(drive); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 733 | } |
| 734 | |
Sergei Shtylyov | 4bf63de | 2007-02-07 18:18:13 +0100 | [diff] [blame] | 735 | static void hpt370_clear_engine(ide_drive_t *drive) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 736 | { |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 737 | ide_hwif_t *hwif = HWIF(drive); |
| 738 | |
| 739 | pci_write_config_byte(hwif->pci_dev, hwif->select_data, 0x37); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 740 | udelay(10); |
| 741 | } |
| 742 | |
Sergei Shtylyov | 4bf63de | 2007-02-07 18:18:13 +0100 | [diff] [blame] | 743 | static void hpt370_irq_timeout(ide_drive_t *drive) |
| 744 | { |
| 745 | ide_hwif_t *hwif = HWIF(drive); |
| 746 | u16 bfifo = 0; |
| 747 | u8 dma_cmd; |
| 748 | |
| 749 | pci_read_config_word(hwif->pci_dev, hwif->select_data + 2, &bfifo); |
| 750 | printk(KERN_DEBUG "%s: %d bytes in FIFO\n", drive->name, bfifo & 0x1ff); |
| 751 | |
| 752 | /* get DMA command mode */ |
| 753 | dma_cmd = hwif->INB(hwif->dma_command); |
| 754 | /* stop DMA */ |
| 755 | hwif->OUTB(dma_cmd & ~0x1, hwif->dma_command); |
| 756 | hpt370_clear_engine(drive); |
| 757 | } |
| 758 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 759 | static void hpt370_ide_dma_start(ide_drive_t *drive) |
| 760 | { |
| 761 | #ifdef HPT_RESET_STATE_ENGINE |
| 762 | hpt370_clear_engine(drive); |
| 763 | #endif |
| 764 | ide_dma_start(drive); |
| 765 | } |
| 766 | |
Sergei Shtylyov | 4bf63de | 2007-02-07 18:18:13 +0100 | [diff] [blame] | 767 | static int hpt370_ide_dma_end(ide_drive_t *drive) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 768 | { |
| 769 | ide_hwif_t *hwif = HWIF(drive); |
Sergei Shtylyov | 4bf63de | 2007-02-07 18:18:13 +0100 | [diff] [blame] | 770 | u8 dma_stat = hwif->INB(hwif->dma_status); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 771 | |
| 772 | if (dma_stat & 0x01) { |
| 773 | /* wait a little */ |
| 774 | udelay(20); |
| 775 | dma_stat = hwif->INB(hwif->dma_status); |
Sergei Shtylyov | 4bf63de | 2007-02-07 18:18:13 +0100 | [diff] [blame] | 776 | if (dma_stat & 0x01) |
| 777 | hpt370_irq_timeout(drive); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 778 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 779 | return __ide_dma_end(drive); |
| 780 | } |
| 781 | |
Sergei Shtylyov | c283f5d | 2007-07-09 23:17:54 +0200 | [diff] [blame] | 782 | static void hpt370_dma_timeout(ide_drive_t *drive) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 783 | { |
Sergei Shtylyov | 4bf63de | 2007-02-07 18:18:13 +0100 | [diff] [blame] | 784 | hpt370_irq_timeout(drive); |
Sergei Shtylyov | c283f5d | 2007-07-09 23:17:54 +0200 | [diff] [blame] | 785 | ide_dma_timeout(drive); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 786 | } |
| 787 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 788 | /* returns 1 if DMA IRQ issued, 0 otherwise */ |
| 789 | static int hpt374_ide_dma_test_irq(ide_drive_t *drive) |
| 790 | { |
| 791 | ide_hwif_t *hwif = HWIF(drive); |
| 792 | u16 bfifo = 0; |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 793 | u8 dma_stat; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 794 | |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 795 | pci_read_config_word(hwif->pci_dev, hwif->select_data + 2, &bfifo); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 796 | if (bfifo & 0x1FF) { |
| 797 | // printk("%s: %d bytes in FIFO\n", drive->name, bfifo); |
| 798 | return 0; |
| 799 | } |
| 800 | |
Bartlomiej Zolnierkiewicz | 0ecdca2 | 2007-02-17 02:40:25 +0100 | [diff] [blame] | 801 | dma_stat = inb(hwif->dma_status); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 802 | /* return 1 if INTR asserted */ |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 803 | if (dma_stat & 4) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 804 | return 1; |
| 805 | |
| 806 | if (!drive->waiting_for_dma) |
| 807 | printk(KERN_WARNING "%s: (%s) called while not waiting\n", |
| 808 | drive->name, __FUNCTION__); |
| 809 | return 0; |
| 810 | } |
| 811 | |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 812 | static int hpt374_ide_dma_end(ide_drive_t *drive) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 813 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 814 | ide_hwif_t *hwif = HWIF(drive); |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 815 | struct pci_dev *dev = hwif->pci_dev; |
| 816 | u8 mcr = 0, mcr_addr = hwif->select_data; |
| 817 | u8 bwsr = 0, mask = hwif->channel ? 0x02 : 0x01; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 818 | |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 819 | pci_read_config_byte(dev, 0x6a, &bwsr); |
| 820 | pci_read_config_byte(dev, mcr_addr, &mcr); |
| 821 | if (bwsr & mask) |
| 822 | pci_write_config_byte(dev, mcr_addr, mcr | 0x30); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 823 | return __ide_dma_end(drive); |
| 824 | } |
| 825 | |
| 826 | /** |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 827 | * hpt3xxn_set_clock - perform clock switching dance |
| 828 | * @hwif: hwif to switch |
| 829 | * @mode: clocking mode (0x21 for write, 0x23 otherwise) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 830 | * |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 831 | * Switch the DPLL clock on the HPT3xxN devices. This is a right mess. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 832 | */ |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 833 | |
| 834 | static void hpt3xxn_set_clock(ide_hwif_t *hwif, u8 mode) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 835 | { |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 836 | u8 scr2 = hwif->INB(hwif->dma_master + 0x7b); |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 837 | |
| 838 | if ((scr2 & 0x7f) == mode) |
| 839 | return; |
| 840 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 841 | /* Tristate the bus */ |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 842 | hwif->OUTB(0x80, hwif->dma_master + 0x73); |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 843 | hwif->OUTB(0x80, hwif->dma_master + 0x77); |
| 844 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 845 | /* Switch clock and reset channels */ |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 846 | hwif->OUTB(mode, hwif->dma_master + 0x7b); |
| 847 | hwif->OUTB(0xc0, hwif->dma_master + 0x79); |
| 848 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 849 | /* |
| 850 | * Reset the state machines. |
| 851 | * NOTE: avoid accidentally enabling the disabled channels. |
| 852 | */ |
| 853 | hwif->OUTB(hwif->INB(hwif->dma_master + 0x70) | 0x32, |
| 854 | hwif->dma_master + 0x70); |
| 855 | hwif->OUTB(hwif->INB(hwif->dma_master + 0x74) | 0x32, |
| 856 | hwif->dma_master + 0x74); |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 857 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 858 | /* Complete reset */ |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 859 | hwif->OUTB(0x00, hwif->dma_master + 0x79); |
| 860 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 861 | /* Reconnect channels to bus */ |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 862 | hwif->OUTB(0x00, hwif->dma_master + 0x73); |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 863 | hwif->OUTB(0x00, hwif->dma_master + 0x77); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 864 | } |
| 865 | |
| 866 | /** |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 867 | * hpt3xxn_rw_disk - prepare for I/O |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 868 | * @drive: drive for command |
| 869 | * @rq: block request structure |
| 870 | * |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 871 | * This is called when a disk I/O is issued to HPT3xxN. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 872 | * We need it because of the clock switching. |
| 873 | */ |
| 874 | |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 875 | static void hpt3xxn_rw_disk(ide_drive_t *drive, struct request *rq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 876 | { |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 877 | hpt3xxn_set_clock(HWIF(drive), rq_data_dir(rq) ? 0x23 : 0x21); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 878 | } |
| 879 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 880 | /* |
Sergei Shtylyov | 33b18a6 | 2006-12-13 00:35:50 -0800 | [diff] [blame] | 881 | * Set/get power state for a drive. |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 882 | * NOTE: affects both drives on each channel. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 883 | * |
Sergei Shtylyov | 33b18a6 | 2006-12-13 00:35:50 -0800 | [diff] [blame] | 884 | * When we turn the power back on, we need to re-initialize things. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 885 | */ |
| 886 | #define TRISTATE_BIT 0x8000 |
Sergei Shtylyov | 33b18a6 | 2006-12-13 00:35:50 -0800 | [diff] [blame] | 887 | |
| 888 | static int hpt3xx_busproc(ide_drive_t *drive, int state) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 889 | { |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 890 | ide_hwif_t *hwif = HWIF(drive); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 891 | struct pci_dev *dev = hwif->pci_dev; |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 892 | u8 mcr_addr = hwif->select_data + 2; |
| 893 | u8 resetmask = hwif->channel ? 0x80 : 0x40; |
| 894 | u8 bsr2 = 0; |
| 895 | u16 mcr = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 896 | |
| 897 | hwif->bus_state = state; |
| 898 | |
Sergei Shtylyov | 33b18a6 | 2006-12-13 00:35:50 -0800 | [diff] [blame] | 899 | /* Grab the status. */ |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 900 | pci_read_config_word(dev, mcr_addr, &mcr); |
| 901 | pci_read_config_byte(dev, 0x59, &bsr2); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 902 | |
Sergei Shtylyov | 33b18a6 | 2006-12-13 00:35:50 -0800 | [diff] [blame] | 903 | /* |
| 904 | * Set the state. We don't set it if we don't need to do so. |
| 905 | * Make sure that the drive knows that it has failed if it's off. |
| 906 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 907 | switch (state) { |
| 908 | case BUSSTATE_ON: |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 909 | if (!(bsr2 & resetmask)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 910 | return 0; |
Sergei Shtylyov | 33b18a6 | 2006-12-13 00:35:50 -0800 | [diff] [blame] | 911 | hwif->drives[0].failures = hwif->drives[1].failures = 0; |
| 912 | |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 913 | pci_write_config_byte(dev, 0x59, bsr2 & ~resetmask); |
| 914 | pci_write_config_word(dev, mcr_addr, mcr & ~TRISTATE_BIT); |
Sergei Shtylyov | 33b18a6 | 2006-12-13 00:35:50 -0800 | [diff] [blame] | 915 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 916 | case BUSSTATE_OFF: |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 917 | if ((bsr2 & resetmask) && !(mcr & TRISTATE_BIT)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 918 | return 0; |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 919 | mcr &= ~TRISTATE_BIT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 920 | break; |
| 921 | case BUSSTATE_TRISTATE: |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 922 | if ((bsr2 & resetmask) && (mcr & TRISTATE_BIT)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 923 | return 0; |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 924 | mcr |= TRISTATE_BIT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 925 | break; |
Sergei Shtylyov | 33b18a6 | 2006-12-13 00:35:50 -0800 | [diff] [blame] | 926 | default: |
| 927 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 928 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 929 | |
Sergei Shtylyov | 33b18a6 | 2006-12-13 00:35:50 -0800 | [diff] [blame] | 930 | hwif->drives[0].failures = hwif->drives[0].max_failures + 1; |
| 931 | hwif->drives[1].failures = hwif->drives[1].max_failures + 1; |
| 932 | |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 933 | pci_write_config_word(dev, mcr_addr, mcr); |
| 934 | pci_write_config_byte(dev, 0x59, bsr2 | resetmask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 935 | return 0; |
| 936 | } |
| 937 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 938 | /** |
| 939 | * hpt37x_calibrate_dpll - calibrate the DPLL |
| 940 | * @dev: PCI device |
| 941 | * |
| 942 | * Perform a calibration cycle on the DPLL. |
| 943 | * Returns 1 if this succeeds |
| 944 | */ |
| 945 | static int __devinit hpt37x_calibrate_dpll(struct pci_dev *dev, u16 f_low, u16 f_high) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 946 | { |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 947 | u32 dpll = (f_high << 16) | f_low | 0x100; |
| 948 | u8 scr2; |
| 949 | int i; |
Alan Cox | b39b01f | 2005-06-27 15:24:27 -0700 | [diff] [blame] | 950 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 951 | pci_write_config_dword(dev, 0x5c, dpll); |
Alan Cox | b39b01f | 2005-06-27 15:24:27 -0700 | [diff] [blame] | 952 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 953 | /* Wait for oscillator ready */ |
| 954 | for(i = 0; i < 0x5000; ++i) { |
| 955 | udelay(50); |
| 956 | pci_read_config_byte(dev, 0x5b, &scr2); |
| 957 | if (scr2 & 0x80) |
Alan Cox | b39b01f | 2005-06-27 15:24:27 -0700 | [diff] [blame] | 958 | break; |
| 959 | } |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 960 | /* See if it stays ready (we'll just bail out if it's not yet) */ |
| 961 | for(i = 0; i < 0x1000; ++i) { |
| 962 | pci_read_config_byte(dev, 0x5b, &scr2); |
| 963 | /* DPLL destabilized? */ |
| 964 | if(!(scr2 & 0x80)) |
| 965 | return 0; |
Sergei Shtylyov | 9077857 | 2007-02-07 18:17:51 +0100 | [diff] [blame] | 966 | } |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 967 | /* Turn off tuning, we have the DPLL set */ |
| 968 | pci_read_config_dword (dev, 0x5c, &dpll); |
| 969 | pci_write_config_dword(dev, 0x5c, (dpll & ~0x100)); |
| 970 | return 1; |
Alan Cox | b39b01f | 2005-06-27 15:24:27 -0700 | [diff] [blame] | 971 | } |
| 972 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 973 | static unsigned int __devinit init_chipset_hpt366(struct pci_dev *dev, const char *name) |
| 974 | { |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 975 | struct hpt_info *info = kmalloc(sizeof(struct hpt_info), GFP_KERNEL); |
| 976 | unsigned long io_base = pci_resource_start(dev, 4); |
| 977 | u8 pci_clk, dpll_clk = 0; /* PCI and DPLL clock in MHz */ |
Sergei Shtylyov | 7293136 | 2007-09-11 22:28:35 +0200 | [diff] [blame] | 978 | u8 chip_type; |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 979 | enum ata_clock clock; |
| 980 | |
| 981 | if (info == NULL) { |
| 982 | printk(KERN_ERR "%s: out of memory!\n", name); |
| 983 | return -ENOMEM; |
| 984 | } |
| 985 | |
| 986 | /* |
| 987 | * Copy everything from a static "template" structure |
| 988 | * to just allocated per-chip hpt_info structure. |
| 989 | */ |
Sergei Shtylyov | 7293136 | 2007-09-11 22:28:35 +0200 | [diff] [blame] | 990 | memcpy(info, pci_get_drvdata(dev), sizeof(struct hpt_info)); |
| 991 | chip_type = info->chip_type; |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 992 | |
Alan Cox | b39b01f | 2005-06-27 15:24:27 -0700 | [diff] [blame] | 993 | pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, (L1_CACHE_BYTES / 4)); |
| 994 | pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x78); |
| 995 | pci_write_config_byte(dev, PCI_MIN_GNT, 0x08); |
| 996 | pci_write_config_byte(dev, PCI_MAX_LAT, 0x08); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 997 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 998 | /* |
| 999 | * First, try to estimate the PCI clock frequency... |
| 1000 | */ |
Sergei Shtylyov | 7293136 | 2007-09-11 22:28:35 +0200 | [diff] [blame] | 1001 | if (chip_type >= HPT370) { |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1002 | u8 scr1 = 0; |
| 1003 | u16 f_cnt = 0; |
| 1004 | u32 temp = 0; |
Alan Cox | b39b01f | 2005-06-27 15:24:27 -0700 | [diff] [blame] | 1005 | |
Sergei Shtylyov | 26ccb80 | 2007-02-07 18:18:11 +0100 | [diff] [blame] | 1006 | /* Interrupt force enable. */ |
| 1007 | pci_read_config_byte(dev, 0x5a, &scr1); |
| 1008 | if (scr1 & 0x10) |
| 1009 | pci_write_config_byte(dev, 0x5a, scr1 & ~0x10); |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1010 | |
| 1011 | /* |
| 1012 | * HighPoint does this for HPT372A. |
| 1013 | * NOTE: This register is only writeable via I/O space. |
| 1014 | */ |
Sergei Shtylyov | 7293136 | 2007-09-11 22:28:35 +0200 | [diff] [blame] | 1015 | if (chip_type == HPT372A) |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1016 | outb(0x0e, io_base + 0x9c); |
| 1017 | |
| 1018 | /* |
| 1019 | * Default to PCI clock. Make sure MA15/16 are set to output |
| 1020 | * to prevent drives having problems with 40-pin cables. |
| 1021 | */ |
| 1022 | pci_write_config_byte(dev, 0x5b, 0x23); |
| 1023 | |
| 1024 | /* |
| 1025 | * We'll have to read f_CNT value in order to determine |
| 1026 | * the PCI clock frequency according to the following ratio: |
| 1027 | * |
| 1028 | * f_CNT = Fpci * 192 / Fdpll |
| 1029 | * |
| 1030 | * First try reading the register in which the HighPoint BIOS |
| 1031 | * saves f_CNT value before reprogramming the DPLL from its |
| 1032 | * default setting (which differs for the various chips). |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1033 | * |
Sergei Shtylyov | 7293136 | 2007-09-11 22:28:35 +0200 | [diff] [blame] | 1034 | * NOTE: This register is only accessible via I/O space; |
| 1035 | * HPT374 BIOS only saves it for the function 0, so we have to |
| 1036 | * always read it from there -- no need to check the result of |
| 1037 | * pci_get_slot() for the function 0 as the whole device has |
| 1038 | * been already "pinned" (via function 1) in init_setup_hpt374() |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1039 | */ |
Sergei Shtylyov | 7293136 | 2007-09-11 22:28:35 +0200 | [diff] [blame] | 1040 | if (chip_type == HPT374 && (PCI_FUNC(dev->devfn) & 1)) { |
| 1041 | struct pci_dev *dev1 = pci_get_slot(dev->bus, |
| 1042 | dev->devfn - 1); |
| 1043 | unsigned long io_base = pci_resource_start(dev1, 4); |
| 1044 | |
| 1045 | temp = inl(io_base + 0x90); |
| 1046 | pci_dev_put(dev1); |
| 1047 | } else |
| 1048 | temp = inl(io_base + 0x90); |
| 1049 | |
| 1050 | /* |
| 1051 | * In case the signature check fails, we'll have to |
| 1052 | * resort to reading the f_CNT register itself in hopes |
| 1053 | * that nobody has touched the DPLL yet... |
| 1054 | */ |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1055 | if ((temp & 0xFFFFF000) != 0xABCDE000) { |
| 1056 | int i; |
| 1057 | |
| 1058 | printk(KERN_WARNING "%s: no clock data saved by BIOS\n", |
| 1059 | name); |
| 1060 | |
| 1061 | /* Calculate the average value of f_CNT. */ |
| 1062 | for (temp = i = 0; i < 128; i++) { |
| 1063 | pci_read_config_word(dev, 0x78, &f_cnt); |
| 1064 | temp += f_cnt & 0x1ff; |
| 1065 | mdelay(1); |
| 1066 | } |
| 1067 | f_cnt = temp / 128; |
| 1068 | } else |
| 1069 | f_cnt = temp & 0x1ff; |
| 1070 | |
| 1071 | dpll_clk = info->dpll_clk; |
| 1072 | pci_clk = (f_cnt * dpll_clk) / 192; |
| 1073 | |
| 1074 | /* Clamp PCI clock to bands. */ |
| 1075 | if (pci_clk < 40) |
| 1076 | pci_clk = 33; |
| 1077 | else if(pci_clk < 45) |
| 1078 | pci_clk = 40; |
| 1079 | else if(pci_clk < 55) |
| 1080 | pci_clk = 50; |
| 1081 | else |
| 1082 | pci_clk = 66; |
| 1083 | |
| 1084 | printk(KERN_INFO "%s: DPLL base: %d MHz, f_CNT: %d, " |
| 1085 | "assuming %d MHz PCI\n", name, dpll_clk, f_cnt, pci_clk); |
| 1086 | } else { |
| 1087 | u32 itr1 = 0; |
| 1088 | |
| 1089 | pci_read_config_dword(dev, 0x40, &itr1); |
| 1090 | |
| 1091 | /* Detect PCI clock by looking at cmd_high_time. */ |
| 1092 | switch((itr1 >> 8) & 0x07) { |
| 1093 | case 0x09: |
| 1094 | pci_clk = 40; |
Sergei Shtylyov | 6273d26 | 2007-02-07 18:18:20 +0100 | [diff] [blame] | 1095 | break; |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1096 | case 0x05: |
| 1097 | pci_clk = 25; |
Sergei Shtylyov | 6273d26 | 2007-02-07 18:18:20 +0100 | [diff] [blame] | 1098 | break; |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1099 | case 0x07: |
| 1100 | default: |
| 1101 | pci_clk = 33; |
Sergei Shtylyov | 6273d26 | 2007-02-07 18:18:20 +0100 | [diff] [blame] | 1102 | break; |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1103 | } |
Sergei Shtylyov | 26ccb80 | 2007-02-07 18:18:11 +0100 | [diff] [blame] | 1104 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1105 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1106 | /* Let's assume we'll use PCI clock for the ATA clock... */ |
| 1107 | switch (pci_clk) { |
| 1108 | case 25: |
| 1109 | clock = ATA_CLOCK_25MHZ; |
| 1110 | break; |
| 1111 | case 33: |
| 1112 | default: |
| 1113 | clock = ATA_CLOCK_33MHZ; |
| 1114 | break; |
| 1115 | case 40: |
| 1116 | clock = ATA_CLOCK_40MHZ; |
| 1117 | break; |
| 1118 | case 50: |
| 1119 | clock = ATA_CLOCK_50MHZ; |
| 1120 | break; |
| 1121 | case 66: |
| 1122 | clock = ATA_CLOCK_66MHZ; |
| 1123 | break; |
| 1124 | } |
| 1125 | |
| 1126 | /* |
| 1127 | * Only try the DPLL if we don't have a table for the PCI clock that |
| 1128 | * we are running at for HPT370/A, always use it for anything newer... |
| 1129 | * |
| 1130 | * NOTE: Using the internal DPLL results in slow reads on 33 MHz PCI. |
| 1131 | * We also don't like using the DPLL because this causes glitches |
| 1132 | * on PRST-/SRST- when the state engine gets reset... |
| 1133 | */ |
Sergei Shtylyov | 7293136 | 2007-09-11 22:28:35 +0200 | [diff] [blame] | 1134 | if (chip_type >= HPT374 || info->settings[clock] == NULL) { |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1135 | u16 f_low, delta = pci_clk < 50 ? 2 : 4; |
| 1136 | int adjust; |
| 1137 | |
| 1138 | /* |
| 1139 | * Select 66 MHz DPLL clock only if UltraATA/133 mode is |
| 1140 | * supported/enabled, use 50 MHz DPLL clock otherwise... |
| 1141 | */ |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 1142 | if (info->max_ultra == 6) { |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1143 | dpll_clk = 66; |
| 1144 | clock = ATA_CLOCK_66MHZ; |
| 1145 | } else if (dpll_clk) { /* HPT36x chips don't have DPLL */ |
| 1146 | dpll_clk = 50; |
| 1147 | clock = ATA_CLOCK_50MHZ; |
| 1148 | } |
| 1149 | |
| 1150 | if (info->settings[clock] == NULL) { |
| 1151 | printk(KERN_ERR "%s: unknown bus timing!\n", name); |
| 1152 | kfree(info); |
| 1153 | return -EIO; |
| 1154 | } |
| 1155 | |
| 1156 | /* Select the DPLL clock. */ |
| 1157 | pci_write_config_byte(dev, 0x5b, 0x21); |
| 1158 | |
| 1159 | /* |
| 1160 | * Adjust the DPLL based upon PCI clock, enable it, |
| 1161 | * and wait for stabilization... |
| 1162 | */ |
| 1163 | f_low = (pci_clk * 48) / dpll_clk; |
| 1164 | |
| 1165 | for (adjust = 0; adjust < 8; adjust++) { |
| 1166 | if(hpt37x_calibrate_dpll(dev, f_low, f_low + delta)) |
| 1167 | break; |
| 1168 | |
| 1169 | /* |
| 1170 | * See if it'll settle at a fractionally different clock |
| 1171 | */ |
| 1172 | if (adjust & 1) |
| 1173 | f_low -= adjust >> 1; |
| 1174 | else |
| 1175 | f_low += adjust >> 1; |
| 1176 | } |
| 1177 | if (adjust == 8) { |
| 1178 | printk(KERN_ERR "%s: DPLL did not stabilize!\n", name); |
| 1179 | kfree(info); |
| 1180 | return -EIO; |
| 1181 | } |
| 1182 | |
| 1183 | printk("%s: using %d MHz DPLL clock\n", name, dpll_clk); |
| 1184 | } else { |
| 1185 | /* Mark the fact that we're not using the DPLL. */ |
| 1186 | dpll_clk = 0; |
| 1187 | |
| 1188 | printk("%s: using %d MHz PCI clock\n", name, pci_clk); |
| 1189 | } |
| 1190 | |
| 1191 | /* |
| 1192 | * Advance the table pointer to a slot which points to the list |
| 1193 | * of the register values settings matching the clock being used. |
| 1194 | */ |
| 1195 | info->settings += clock; |
| 1196 | |
| 1197 | /* Store the clock frequencies. */ |
| 1198 | info->dpll_clk = dpll_clk; |
| 1199 | info->pci_clk = pci_clk; |
| 1200 | |
| 1201 | /* Point to this chip's own instance of the hpt_info structure. */ |
| 1202 | pci_set_drvdata(dev, info); |
| 1203 | |
Sergei Shtylyov | 7293136 | 2007-09-11 22:28:35 +0200 | [diff] [blame] | 1204 | if (chip_type >= HPT370) { |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1205 | u8 mcr1, mcr4; |
| 1206 | |
| 1207 | /* |
| 1208 | * Reset the state engines. |
| 1209 | * NOTE: Avoid accidentally enabling the disabled channels. |
| 1210 | */ |
| 1211 | pci_read_config_byte (dev, 0x50, &mcr1); |
| 1212 | pci_read_config_byte (dev, 0x54, &mcr4); |
| 1213 | pci_write_config_byte(dev, 0x50, (mcr1 | 0x32)); |
| 1214 | pci_write_config_byte(dev, 0x54, (mcr4 | 0x32)); |
| 1215 | udelay(100); |
| 1216 | } |
| 1217 | |
| 1218 | /* |
| 1219 | * On HPT371N, if ATA clock is 66 MHz we must set bit 2 in |
| 1220 | * the MISC. register to stretch the UltraDMA Tss timing. |
| 1221 | * NOTE: This register is only writeable via I/O space. |
| 1222 | */ |
Sergei Shtylyov | 7293136 | 2007-09-11 22:28:35 +0200 | [diff] [blame] | 1223 | if (chip_type == HPT371N && clock == ATA_CLOCK_66MHZ) |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1224 | |
| 1225 | outb(inb(io_base + 0x9c) | 0x04, io_base + 0x9c); |
| 1226 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1227 | return dev->irq; |
| 1228 | } |
| 1229 | |
| 1230 | static void __devinit init_hwif_hpt366(ide_hwif_t *hwif) |
| 1231 | { |
Sergei Shtylyov | 2808b0a | 2007-09-11 22:28:36 +0200 | [diff] [blame] | 1232 | struct pci_dev *dev = hwif->pci_dev; |
| 1233 | struct hpt_info *info = pci_get_drvdata(dev); |
| 1234 | int serialize = HPT_SERIALIZE_IO; |
| 1235 | u8 scr1 = 0, ata66 = hwif->channel ? 0x01 : 0x02; |
| 1236 | u8 chip_type = info->chip_type; |
| 1237 | u8 new_mcr, old_mcr = 0; |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 1238 | |
| 1239 | /* Cache the channel's MISC. control registers' offset */ |
Sergei Shtylyov | 2808b0a | 2007-09-11 22:28:36 +0200 | [diff] [blame] | 1240 | hwif->select_data = hwif->channel ? 0x54 : 0x50; |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 1241 | |
Bartlomiej Zolnierkiewicz | 26bcb87 | 2007-10-11 23:54:00 +0200 | [diff] [blame] | 1242 | hwif->set_pio_mode = &hpt3xx_set_pio_mode; |
Bartlomiej Zolnierkiewicz | 88b2b32 | 2007-10-13 17:47:51 +0200 | [diff] [blame] | 1243 | hwif->set_dma_mode = &hpt3xx_set_mode; |
Sergei Shtylyov | 2808b0a | 2007-09-11 22:28:36 +0200 | [diff] [blame] | 1244 | hwif->quirkproc = &hpt3xx_quirkproc; |
| 1245 | hwif->intrproc = &hpt3xx_intrproc; |
| 1246 | hwif->maskproc = &hpt3xx_maskproc; |
| 1247 | hwif->busproc = &hpt3xx_busproc; |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 1248 | |
Sergei Shtylyov | 2808b0a | 2007-09-11 22:28:36 +0200 | [diff] [blame] | 1249 | hwif->udma_filter = &hpt3xx_udma_filter; |
Sergei Shtylyov | b4e4436 | 2007-10-11 23:53:58 +0200 | [diff] [blame] | 1250 | hwif->mdma_filter = &hpt3xx_mdma_filter; |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 1251 | |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 1252 | /* |
| 1253 | * HPT3xxN chips have some complications: |
| 1254 | * |
| 1255 | * - on 33 MHz PCI we must clock switch |
| 1256 | * - on 66 MHz PCI we must NOT use the PCI clock |
| 1257 | */ |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1258 | if (chip_type >= HPT372N && info->dpll_clk && info->pci_clk < 66) { |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 1259 | /* |
| 1260 | * Clock is shared between the channels, |
| 1261 | * so we'll have to serialize them... :-( |
| 1262 | */ |
| 1263 | serialize = 1; |
| 1264 | hwif->rw_disk = &hpt3xxn_rw_disk; |
| 1265 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1266 | |
Sergei Shtylyov | 26ccb80 | 2007-02-07 18:18:11 +0100 | [diff] [blame] | 1267 | /* Serialize access to this device if needed */ |
| 1268 | if (serialize && hwif->mate) |
| 1269 | hwif->serialized = hwif->mate->serialized = 1; |
| 1270 | |
| 1271 | /* |
| 1272 | * Disable the "fast interrupt" prediction. Don't hold off |
| 1273 | * on interrupts. (== 0x01 despite what the docs say) |
| 1274 | */ |
| 1275 | pci_read_config_byte(dev, hwif->select_data + 1, &old_mcr); |
| 1276 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1277 | if (info->chip_type >= HPT374) |
Sergei Shtylyov | 26ccb80 | 2007-02-07 18:18:11 +0100 | [diff] [blame] | 1278 | new_mcr = old_mcr & ~0x07; |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1279 | else if (info->chip_type >= HPT370) { |
Sergei Shtylyov | 26ccb80 | 2007-02-07 18:18:11 +0100 | [diff] [blame] | 1280 | new_mcr = old_mcr; |
| 1281 | new_mcr &= ~0x02; |
| 1282 | |
| 1283 | #ifdef HPT_DELAY_INTERRUPT |
| 1284 | new_mcr &= ~0x01; |
| 1285 | #else |
| 1286 | new_mcr |= 0x01; |
| 1287 | #endif |
| 1288 | } else /* HPT366 and HPT368 */ |
| 1289 | new_mcr = old_mcr & ~0x80; |
| 1290 | |
| 1291 | if (new_mcr != old_mcr) |
| 1292 | pci_write_config_byte(dev, hwif->select_data + 1, new_mcr); |
| 1293 | |
Bartlomiej Zolnierkiewicz | a29ec3b | 2007-10-16 22:29:52 +0200 | [diff] [blame] | 1294 | hwif->drives[0].autotune = hwif->drives[1].autotune = 1; |
| 1295 | |
| 1296 | if (hwif->dma_base == 0) |
Sergei Shtylyov | 26ccb80 | 2007-02-07 18:18:11 +0100 | [diff] [blame] | 1297 | return; |
Sergei Shtylyov | 26ccb80 | 2007-02-07 18:18:11 +0100 | [diff] [blame] | 1298 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1299 | /* |
| 1300 | * The HPT37x uses the CBLID pins as outputs for MA15/MA16 |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 1301 | * address lines to access an external EEPROM. To read valid |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1302 | * cable detect state the pins must be enabled as inputs. |
| 1303 | */ |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1304 | if (chip_type == HPT374 && (PCI_FUNC(dev->devfn) & 1)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1305 | /* |
| 1306 | * HPT374 PCI function 1 |
| 1307 | * - set bit 15 of reg 0x52 to enable TCBLID as input |
| 1308 | * - set bit 15 of reg 0x56 to enable FCBLID as input |
| 1309 | */ |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 1310 | u8 mcr_addr = hwif->select_data + 2; |
| 1311 | u16 mcr; |
| 1312 | |
| 1313 | pci_read_config_word (dev, mcr_addr, &mcr); |
| 1314 | pci_write_config_word(dev, mcr_addr, (mcr | 0x8000)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1315 | /* now read cable id register */ |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 1316 | pci_read_config_byte (dev, 0x5a, &scr1); |
| 1317 | pci_write_config_word(dev, mcr_addr, mcr); |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1318 | } else if (chip_type >= HPT370) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1319 | /* |
| 1320 | * HPT370/372 and 374 pcifn 0 |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 1321 | * - clear bit 0 of reg 0x5b to enable P/SCBLID as inputs |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1322 | */ |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 1323 | u8 scr2 = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1324 | |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 1325 | pci_read_config_byte (dev, 0x5b, &scr2); |
| 1326 | pci_write_config_byte(dev, 0x5b, (scr2 & ~1)); |
| 1327 | /* now read cable id register */ |
| 1328 | pci_read_config_byte (dev, 0x5a, &scr1); |
| 1329 | pci_write_config_byte(dev, 0x5b, scr2); |
| 1330 | } else |
| 1331 | pci_read_config_byte (dev, 0x5a, &scr1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1332 | |
Bartlomiej Zolnierkiewicz | 49521f9 | 2007-07-09 23:17:58 +0200 | [diff] [blame] | 1333 | if (hwif->cbl != ATA_CBL_PATA40_SHORT) |
| 1334 | hwif->cbl = (scr1 & ata66) ? ATA_CBL_PATA40 : ATA_CBL_PATA80; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1335 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1336 | if (chip_type >= HPT374) { |
Sergei Shtylyov | 26ccb80 | 2007-02-07 18:18:11 +0100 | [diff] [blame] | 1337 | hwif->ide_dma_test_irq = &hpt374_ide_dma_test_irq; |
| 1338 | hwif->ide_dma_end = &hpt374_ide_dma_end; |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1339 | } else if (chip_type >= HPT370) { |
Sergei Shtylyov | 26ccb80 | 2007-02-07 18:18:11 +0100 | [diff] [blame] | 1340 | hwif->dma_start = &hpt370_ide_dma_start; |
| 1341 | hwif->ide_dma_end = &hpt370_ide_dma_end; |
Sergei Shtylyov | c283f5d | 2007-07-09 23:17:54 +0200 | [diff] [blame] | 1342 | hwif->dma_timeout = &hpt370_dma_timeout; |
Sergei Shtylyov | 26ccb80 | 2007-02-07 18:18:11 +0100 | [diff] [blame] | 1343 | } else |
Sergei Shtylyov | 841d2a9 | 2007-07-09 23:17:54 +0200 | [diff] [blame] | 1344 | hwif->dma_lost_irq = &hpt366_dma_lost_irq; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1345 | } |
| 1346 | |
| 1347 | static void __devinit init_dma_hpt366(ide_hwif_t *hwif, unsigned long dmabase) |
| 1348 | { |
Sergei Shtylyov | 26ccb80 | 2007-02-07 18:18:11 +0100 | [diff] [blame] | 1349 | struct pci_dev *dev = hwif->pci_dev; |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 1350 | u8 masterdma = 0, slavedma = 0; |
| 1351 | u8 dma_new = 0, dma_old = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1352 | unsigned long flags; |
| 1353 | |
Sergei Shtylyov | 26ccb80 | 2007-02-07 18:18:11 +0100 | [diff] [blame] | 1354 | dma_old = hwif->INB(dmabase + 2); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1355 | |
| 1356 | local_irq_save(flags); |
| 1357 | |
| 1358 | dma_new = dma_old; |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 1359 | pci_read_config_byte(dev, hwif->channel ? 0x4b : 0x43, &masterdma); |
| 1360 | pci_read_config_byte(dev, hwif->channel ? 0x4f : 0x47, &slavedma); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1361 | |
| 1362 | if (masterdma & 0x30) dma_new |= 0x20; |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 1363 | if ( slavedma & 0x30) dma_new |= 0x40; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1364 | if (dma_new != dma_old) |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 1365 | hwif->OUTB(dma_new, dmabase + 2); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1366 | |
| 1367 | local_irq_restore(flags); |
| 1368 | |
| 1369 | ide_setup_dma(hwif, dmabase, 8); |
| 1370 | } |
| 1371 | |
| 1372 | static int __devinit init_setup_hpt374(struct pci_dev *dev, ide_pci_device_t *d) |
| 1373 | { |
Sergei Shtylyov | b458671 | 2007-02-07 18:17:54 +0100 | [diff] [blame] | 1374 | struct pci_dev *dev2; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1375 | |
| 1376 | if (PCI_FUNC(dev->devfn) & 1) |
| 1377 | return -ENODEV; |
| 1378 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1379 | pci_set_drvdata(dev, &hpt374); |
| 1380 | |
Sergei Shtylyov | b458671 | 2007-02-07 18:17:54 +0100 | [diff] [blame] | 1381 | if ((dev2 = pci_get_slot(dev->bus, dev->devfn + 1)) != NULL) { |
| 1382 | int ret; |
| 1383 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1384 | pci_set_drvdata(dev2, &hpt374); |
| 1385 | |
Sergei Shtylyov | b458671 | 2007-02-07 18:17:54 +0100 | [diff] [blame] | 1386 | if (dev2->irq != dev->irq) { |
| 1387 | /* FIXME: we need a core pci_set_interrupt() */ |
| 1388 | dev2->irq = dev->irq; |
| 1389 | printk(KERN_WARNING "%s: PCI config space interrupt " |
| 1390 | "fixed.\n", d->name); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1391 | } |
Sergei Shtylyov | b458671 | 2007-02-07 18:17:54 +0100 | [diff] [blame] | 1392 | ret = ide_setup_pci_devices(dev, dev2, d); |
| 1393 | if (ret < 0) |
| 1394 | pci_dev_put(dev2); |
| 1395 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1396 | } |
| 1397 | return ide_setup_pci_device(dev, d); |
| 1398 | } |
| 1399 | |
Sergei Shtylyov | 9077857 | 2007-02-07 18:17:51 +0100 | [diff] [blame] | 1400 | static int __devinit init_setup_hpt372n(struct pci_dev *dev, ide_pci_device_t *d) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1401 | { |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1402 | pci_set_drvdata(dev, &hpt372n); |
| 1403 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1404 | return ide_setup_pci_device(dev, d); |
| 1405 | } |
| 1406 | |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 1407 | static int __devinit init_setup_hpt371(struct pci_dev *dev, ide_pci_device_t *d) |
| 1408 | { |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1409 | struct hpt_info *info; |
Auke Kok | 44c1013 | 2007-06-08 15:46:36 -0700 | [diff] [blame] | 1410 | u8 mcr1 = 0; |
Sergei Shtylyov | 9077857 | 2007-02-07 18:17:51 +0100 | [diff] [blame] | 1411 | |
Auke Kok | 44c1013 | 2007-06-08 15:46:36 -0700 | [diff] [blame] | 1412 | if (dev->revision > 1) { |
Sergei Shtylyov | 9077857 | 2007-02-07 18:17:51 +0100 | [diff] [blame] | 1413 | d->name = "HPT371N"; |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 1414 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1415 | info = &hpt371n; |
| 1416 | } else |
| 1417 | info = &hpt371; |
| 1418 | |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 1419 | /* |
| 1420 | * HPT371 chips physically have only one channel, the secondary one, |
| 1421 | * but the primary channel registers do exist! Go figure... |
| 1422 | * So, we manually disable the non-existing channel here |
| 1423 | * (if the BIOS hasn't done this already). |
| 1424 | */ |
| 1425 | pci_read_config_byte(dev, 0x50, &mcr1); |
| 1426 | if (mcr1 & 0x04) |
Sergei Shtylyov | 9077857 | 2007-02-07 18:17:51 +0100 | [diff] [blame] | 1427 | pci_write_config_byte(dev, 0x50, mcr1 & ~0x04); |
| 1428 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1429 | pci_set_drvdata(dev, info); |
| 1430 | |
Sergei Shtylyov | 9077857 | 2007-02-07 18:17:51 +0100 | [diff] [blame] | 1431 | return ide_setup_pci_device(dev, d); |
| 1432 | } |
| 1433 | |
| 1434 | static int __devinit init_setup_hpt372a(struct pci_dev *dev, ide_pci_device_t *d) |
| 1435 | { |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1436 | struct hpt_info *info; |
Sergei Shtylyov | 9077857 | 2007-02-07 18:17:51 +0100 | [diff] [blame] | 1437 | |
Auke Kok | 44c1013 | 2007-06-08 15:46:36 -0700 | [diff] [blame] | 1438 | if (dev->revision > 1) { |
Sergei Shtylyov | 9077857 | 2007-02-07 18:17:51 +0100 | [diff] [blame] | 1439 | d->name = "HPT372N"; |
| 1440 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1441 | info = &hpt372n; |
| 1442 | } else |
| 1443 | info = &hpt372a; |
| 1444 | pci_set_drvdata(dev, info); |
| 1445 | |
Sergei Shtylyov | 9077857 | 2007-02-07 18:17:51 +0100 | [diff] [blame] | 1446 | return ide_setup_pci_device(dev, d); |
| 1447 | } |
| 1448 | |
| 1449 | static int __devinit init_setup_hpt302(struct pci_dev *dev, ide_pci_device_t *d) |
| 1450 | { |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1451 | struct hpt_info *info; |
Sergei Shtylyov | 9077857 | 2007-02-07 18:17:51 +0100 | [diff] [blame] | 1452 | |
Auke Kok | 44c1013 | 2007-06-08 15:46:36 -0700 | [diff] [blame] | 1453 | if (dev->revision > 1) { |
Sergei Shtylyov | 9077857 | 2007-02-07 18:17:51 +0100 | [diff] [blame] | 1454 | d->name = "HPT302N"; |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 1455 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1456 | info = &hpt302n; |
| 1457 | } else |
| 1458 | info = &hpt302; |
| 1459 | pci_set_drvdata(dev, info); |
| 1460 | |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 1461 | return ide_setup_pci_device(dev, d); |
| 1462 | } |
| 1463 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1464 | static int __devinit init_setup_hpt366(struct pci_dev *dev, ide_pci_device_t *d) |
| 1465 | { |
Sergei Shtylyov | b458671 | 2007-02-07 18:17:54 +0100 | [diff] [blame] | 1466 | struct pci_dev *dev2; |
Auke Kok | 44c1013 | 2007-06-08 15:46:36 -0700 | [diff] [blame] | 1467 | u8 rev = dev->revision; |
Sergei Shtylyov | 9077857 | 2007-02-07 18:17:51 +0100 | [diff] [blame] | 1468 | static char *chipset_names[] = { "HPT366", "HPT366", "HPT368", |
| 1469 | "HPT370", "HPT370A", "HPT372", |
| 1470 | "HPT372N" }; |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1471 | static struct hpt_info *info[] = { &hpt36x, &hpt36x, &hpt36x, |
| 1472 | &hpt370, &hpt370a, &hpt372, |
| 1473 | &hpt372n }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1474 | |
| 1475 | if (PCI_FUNC(dev->devfn) & 1) |
| 1476 | return -ENODEV; |
| 1477 | |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 1478 | switch (rev) { |
| 1479 | case 0: |
| 1480 | case 1: |
| 1481 | case 2: |
| 1482 | /* |
| 1483 | * HPT36x chips have one channel per function and have |
| 1484 | * both channel enable bits located differently and visible |
| 1485 | * to both functions -- really stupid design decision... :-( |
| 1486 | * Bit 4 is for the primary channel, bit 5 for the secondary. |
| 1487 | */ |
Bartlomiej Zolnierkiewicz | a5d8c5c | 2007-07-20 01:11:55 +0200 | [diff] [blame] | 1488 | d->host_flags |= IDE_HFLAG_SINGLE; |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 1489 | d->enablebits[0].mask = d->enablebits[0].val = 0x10; |
| 1490 | |
Sergei Shtylyov | 2808b0a | 2007-09-11 22:28:36 +0200 | [diff] [blame] | 1491 | d->udma_mask = HPT366_ALLOW_ATA66_3 ? (HPT366_ALLOW_ATA66_4 ? |
| 1492 | ATA_UDMA4 : ATA_UDMA3) : ATA_UDMA2; |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 1493 | break; |
| 1494 | case 3: |
| 1495 | case 4: |
Sergei Shtylyov | 2808b0a | 2007-09-11 22:28:36 +0200 | [diff] [blame] | 1496 | d->udma_mask = HPT370_ALLOW_ATA100_5 ? ATA_UDMA5 : ATA_UDMA4; |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 1497 | break; |
| 1498 | default: |
Sergei Shtylyov | e139b0b | 2007-02-07 18:17:37 +0100 | [diff] [blame] | 1499 | rev = 6; |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 1500 | /* fall thru */ |
| 1501 | case 5: |
| 1502 | case 6: |
Sergei Shtylyov | 2808b0a | 2007-09-11 22:28:36 +0200 | [diff] [blame] | 1503 | d->udma_mask = HPT372_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5; |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 1504 | break; |
| 1505 | } |
| 1506 | |
Sergei Shtylyov | 9077857 | 2007-02-07 18:17:51 +0100 | [diff] [blame] | 1507 | d->name = chipset_names[rev]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1508 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1509 | pci_set_drvdata(dev, info[rev]); |
| 1510 | |
Sergei Shtylyov | 9077857 | 2007-02-07 18:17:51 +0100 | [diff] [blame] | 1511 | if (rev > 2) |
| 1512 | goto init_single; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1513 | |
Sergei Shtylyov | b458671 | 2007-02-07 18:17:54 +0100 | [diff] [blame] | 1514 | if ((dev2 = pci_get_slot(dev->bus, dev->devfn + 1)) != NULL) { |
Sergei Shtylyov | 96dcc08 | 2007-07-03 22:28:35 +0200 | [diff] [blame] | 1515 | u8 mcr1 = 0, pin1 = 0, pin2 = 0; |
Sergei Shtylyov | b458671 | 2007-02-07 18:17:54 +0100 | [diff] [blame] | 1516 | int ret; |
| 1517 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1518 | pci_set_drvdata(dev2, info[rev]); |
| 1519 | |
Sergei Shtylyov | 96dcc08 | 2007-07-03 22:28:35 +0200 | [diff] [blame] | 1520 | /* |
| 1521 | * Now we'll have to force both channels enabled if |
| 1522 | * at least one of them has been enabled by BIOS... |
| 1523 | */ |
| 1524 | pci_read_config_byte(dev, 0x50, &mcr1); |
| 1525 | if (mcr1 & 0x30) |
| 1526 | pci_write_config_byte(dev, 0x50, mcr1 | 0x30); |
| 1527 | |
Sergei Shtylyov | b458671 | 2007-02-07 18:17:54 +0100 | [diff] [blame] | 1528 | pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin1); |
| 1529 | pci_read_config_byte(dev2, PCI_INTERRUPT_PIN, &pin2); |
| 1530 | if (pin1 != pin2 && dev->irq == dev2->irq) { |
Bartlomiej Zolnierkiewicz | 7cab14a | 2007-10-19 00:30:06 +0200 | [diff] [blame] | 1531 | d->host_flags |= IDE_HFLAG_BOOTABLE; |
Sergei Shtylyov | b458671 | 2007-02-07 18:17:54 +0100 | [diff] [blame] | 1532 | printk("%s: onboard version of chipset, pin1=%d pin2=%d\n", |
| 1533 | d->name, pin1, pin2); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1534 | } |
Sergei Shtylyov | b458671 | 2007-02-07 18:17:54 +0100 | [diff] [blame] | 1535 | ret = ide_setup_pci_devices(dev, dev2, d); |
| 1536 | if (ret < 0) |
| 1537 | pci_dev_put(dev2); |
| 1538 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1539 | } |
| 1540 | init_single: |
| 1541 | return ide_setup_pci_device(dev, d); |
| 1542 | } |
| 1543 | |
| 1544 | static ide_pci_device_t hpt366_chipsets[] __devinitdata = { |
| 1545 | { /* 0 */ |
| 1546 | .name = "HPT366", |
| 1547 | .init_setup = init_setup_hpt366, |
| 1548 | .init_chipset = init_chipset_hpt366, |
| 1549 | .init_hwif = init_hwif_hpt366, |
| 1550 | .init_dma = init_dma_hpt366, |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1551 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, |
Bartlomiej Zolnierkiewicz | 4099d14 | 2007-07-20 01:11:59 +0200 | [diff] [blame] | 1552 | .extra = 240, |
Bartlomiej Zolnierkiewicz | 7cab14a | 2007-10-19 00:30:06 +0200 | [diff] [blame] | 1553 | .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD, |
Bartlomiej Zolnierkiewicz | 4099d14 | 2007-07-20 01:11:59 +0200 | [diff] [blame] | 1554 | .pio_mask = ATA_PIO4, |
Bartlomiej Zolnierkiewicz | 5f8b6c3 | 2007-10-19 00:30:07 +0200 | [diff] [blame^] | 1555 | .mwdma_mask = ATA_MWDMA2, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1556 | },{ /* 1 */ |
| 1557 | .name = "HPT372A", |
Sergei Shtylyov | 9077857 | 2007-02-07 18:17:51 +0100 | [diff] [blame] | 1558 | .init_setup = init_setup_hpt372a, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1559 | .init_chipset = init_chipset_hpt366, |
| 1560 | .init_hwif = init_hwif_hpt366, |
| 1561 | .init_dma = init_dma_hpt366, |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1562 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, |
Sergei Shtylyov | 2808b0a | 2007-09-11 22:28:36 +0200 | [diff] [blame] | 1563 | .udma_mask = HPT372_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, |
Bartlomiej Zolnierkiewicz | 4099d14 | 2007-07-20 01:11:59 +0200 | [diff] [blame] | 1564 | .extra = 240, |
Bartlomiej Zolnierkiewicz | 7cab14a | 2007-10-19 00:30:06 +0200 | [diff] [blame] | 1565 | .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD, |
Bartlomiej Zolnierkiewicz | 4099d14 | 2007-07-20 01:11:59 +0200 | [diff] [blame] | 1566 | .pio_mask = ATA_PIO4, |
Bartlomiej Zolnierkiewicz | 5f8b6c3 | 2007-10-19 00:30:07 +0200 | [diff] [blame^] | 1567 | .mwdma_mask = ATA_MWDMA2, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1568 | },{ /* 2 */ |
| 1569 | .name = "HPT302", |
Sergei Shtylyov | 9077857 | 2007-02-07 18:17:51 +0100 | [diff] [blame] | 1570 | .init_setup = init_setup_hpt302, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1571 | .init_chipset = init_chipset_hpt366, |
| 1572 | .init_hwif = init_hwif_hpt366, |
| 1573 | .init_dma = init_dma_hpt366, |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1574 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, |
Sergei Shtylyov | 2808b0a | 2007-09-11 22:28:36 +0200 | [diff] [blame] | 1575 | .udma_mask = HPT302_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, |
Bartlomiej Zolnierkiewicz | 4099d14 | 2007-07-20 01:11:59 +0200 | [diff] [blame] | 1576 | .extra = 240, |
Bartlomiej Zolnierkiewicz | 7cab14a | 2007-10-19 00:30:06 +0200 | [diff] [blame] | 1577 | .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD, |
Bartlomiej Zolnierkiewicz | 4099d14 | 2007-07-20 01:11:59 +0200 | [diff] [blame] | 1578 | .pio_mask = ATA_PIO4, |
Bartlomiej Zolnierkiewicz | 5f8b6c3 | 2007-10-19 00:30:07 +0200 | [diff] [blame^] | 1579 | .mwdma_mask = ATA_MWDMA2, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1580 | },{ /* 3 */ |
| 1581 | .name = "HPT371", |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 1582 | .init_setup = init_setup_hpt371, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1583 | .init_chipset = init_chipset_hpt366, |
| 1584 | .init_hwif = init_hwif_hpt366, |
| 1585 | .init_dma = init_dma_hpt366, |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 1586 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, |
Sergei Shtylyov | 2808b0a | 2007-09-11 22:28:36 +0200 | [diff] [blame] | 1587 | .udma_mask = HPT371_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, |
Bartlomiej Zolnierkiewicz | 4099d14 | 2007-07-20 01:11:59 +0200 | [diff] [blame] | 1588 | .extra = 240, |
Bartlomiej Zolnierkiewicz | 7cab14a | 2007-10-19 00:30:06 +0200 | [diff] [blame] | 1589 | .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD, |
Bartlomiej Zolnierkiewicz | 4099d14 | 2007-07-20 01:11:59 +0200 | [diff] [blame] | 1590 | .pio_mask = ATA_PIO4, |
Bartlomiej Zolnierkiewicz | 5f8b6c3 | 2007-10-19 00:30:07 +0200 | [diff] [blame^] | 1591 | .mwdma_mask = ATA_MWDMA2, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1592 | },{ /* 4 */ |
| 1593 | .name = "HPT374", |
| 1594 | .init_setup = init_setup_hpt374, |
| 1595 | .init_chipset = init_chipset_hpt366, |
| 1596 | .init_hwif = init_hwif_hpt366, |
| 1597 | .init_dma = init_dma_hpt366, |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1598 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, |
Sergei Shtylyov | 2808b0a | 2007-09-11 22:28:36 +0200 | [diff] [blame] | 1599 | .udma_mask = ATA_UDMA5, |
Bartlomiej Zolnierkiewicz | 4099d14 | 2007-07-20 01:11:59 +0200 | [diff] [blame] | 1600 | .extra = 240, |
Bartlomiej Zolnierkiewicz | 7cab14a | 2007-10-19 00:30:06 +0200 | [diff] [blame] | 1601 | .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD, |
Bartlomiej Zolnierkiewicz | 4099d14 | 2007-07-20 01:11:59 +0200 | [diff] [blame] | 1602 | .pio_mask = ATA_PIO4, |
Bartlomiej Zolnierkiewicz | 5f8b6c3 | 2007-10-19 00:30:07 +0200 | [diff] [blame^] | 1603 | .mwdma_mask = ATA_MWDMA2, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1604 | },{ /* 5 */ |
| 1605 | .name = "HPT372N", |
Sergei Shtylyov | 9077857 | 2007-02-07 18:17:51 +0100 | [diff] [blame] | 1606 | .init_setup = init_setup_hpt372n, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1607 | .init_chipset = init_chipset_hpt366, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1608 | .init_hwif = init_hwif_hpt366, |
| 1609 | .init_dma = init_dma_hpt366, |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1610 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, |
Sergei Shtylyov | 2808b0a | 2007-09-11 22:28:36 +0200 | [diff] [blame] | 1611 | .udma_mask = HPT372_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, |
Bartlomiej Zolnierkiewicz | 4099d14 | 2007-07-20 01:11:59 +0200 | [diff] [blame] | 1612 | .extra = 240, |
Bartlomiej Zolnierkiewicz | 7cab14a | 2007-10-19 00:30:06 +0200 | [diff] [blame] | 1613 | .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_OFF_BOARD, |
Bartlomiej Zolnierkiewicz | 4099d14 | 2007-07-20 01:11:59 +0200 | [diff] [blame] | 1614 | .pio_mask = ATA_PIO4, |
Bartlomiej Zolnierkiewicz | 5f8b6c3 | 2007-10-19 00:30:07 +0200 | [diff] [blame^] | 1615 | .mwdma_mask = ATA_MWDMA2, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1616 | } |
| 1617 | }; |
| 1618 | |
| 1619 | /** |
| 1620 | * hpt366_init_one - called when an HPT366 is found |
| 1621 | * @dev: the hpt366 device |
| 1622 | * @id: the matching pci id |
| 1623 | * |
| 1624 | * Called when the PCI registration layer (or the IDE initialization) |
| 1625 | * finds a device matching our IDE device tables. |
Sergei Shtylyov | 73d1dd9 | 2006-12-13 00:35:51 -0800 | [diff] [blame] | 1626 | * |
| 1627 | * NOTE: since we'll have to modify some fields of the ide_pci_device_t |
| 1628 | * structure depending on the chip's revision, we'd better pass a local |
| 1629 | * copy down the call chain... |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1630 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1631 | static int __devinit hpt366_init_one(struct pci_dev *dev, const struct pci_device_id *id) |
| 1632 | { |
Sergei Shtylyov | 73d1dd9 | 2006-12-13 00:35:51 -0800 | [diff] [blame] | 1633 | ide_pci_device_t d = hpt366_chipsets[id->driver_data]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1634 | |
Sergei Shtylyov | 73d1dd9 | 2006-12-13 00:35:51 -0800 | [diff] [blame] | 1635 | return d.init_setup(dev, &d); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1636 | } |
| 1637 | |
Bartlomiej Zolnierkiewicz | 9cbcc5e | 2007-10-16 22:29:56 +0200 | [diff] [blame] | 1638 | static const struct pci_device_id hpt366_pci_tbl[] = { |
| 1639 | { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT366), 0 }, |
| 1640 | { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT372), 1 }, |
| 1641 | { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT302), 2 }, |
| 1642 | { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT371), 3 }, |
| 1643 | { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT374), 4 }, |
| 1644 | { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT372N), 5 }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1645 | { 0, }, |
| 1646 | }; |
| 1647 | MODULE_DEVICE_TABLE(pci, hpt366_pci_tbl); |
| 1648 | |
| 1649 | static struct pci_driver driver = { |
| 1650 | .name = "HPT366_IDE", |
| 1651 | .id_table = hpt366_pci_tbl, |
| 1652 | .probe = hpt366_init_one, |
| 1653 | }; |
| 1654 | |
Bartlomiej Zolnierkiewicz | 82ab1ee | 2007-01-27 13:46:56 +0100 | [diff] [blame] | 1655 | static int __init hpt366_ide_init(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1656 | { |
| 1657 | return ide_pci_register_driver(&driver); |
| 1658 | } |
| 1659 | |
| 1660 | module_init(hpt366_ide_init); |
| 1661 | |
| 1662 | MODULE_AUTHOR("Andre Hedrick"); |
| 1663 | MODULE_DESCRIPTION("PCI driver module for Highpoint HPT366 IDE"); |
| 1664 | MODULE_LICENSE("GPL"); |