blob: 43cd7c6d89a51e3007af9c4cc4c0aa90225343ce [file] [log] [blame]
Dipen Parmare548fd12014-01-19 23:15:14 +05301/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
Syed Rameez Mustafad3935822012-10-09 11:23:20 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "skeleton.dtsi"
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -070014
15/ {
16 model = "Qualcomm MSM 8610";
17 compatible = "qcom,msm8610";
18 interrupt-parent = <&intc>;
19
20 memory {
21 qsecom_mem: qsecom_region {
22 linux,contiguous-region;
23 reg = <0 0x100000>;
24 label = "qsecom_mem";
25 };
26 };
27
28 aliases {
29 sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
30 sdhc2 = &sdhc_2; /* SDC2 SD card slot */
Gilad Avidova460c472013-04-12 16:23:32 -060031 spi4 = &spi_4;
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -070032 };
33
34 soc: soc { };
35};
36
Lokesh Kumar Aakulu25213502013-05-07 17:43:03 -070037/include/ "msm8610-camera.dtsi"
Olav Haugan54166782013-01-28 16:59:51 -080038/include/ "msm-iommu-v0.dtsi"
Syed Rameez Mustafa3971c142013-01-09 19:04:53 -080039/include/ "msm8610-ion.dtsi"
Lokesh Batra8d55eec2013-02-26 11:31:21 -080040/include/ "msm8610-gpu.dtsi"
Matt Wagantall1bf56932012-11-29 15:03:29 -080041/include/ "msm-gdsc.dtsi"
Aparna Dasd16555b2013-03-06 15:46:38 -080042/include/ "msm8610-coresight.dtsi"
Jeff Hugo53dcf0f2013-03-20 12:37:50 -060043/include/ "msm8610-smp2p.dtsi"
Gagan Macbced3872013-02-04 19:18:04 -070044/include/ "msm8610-bus.dtsi"
Xiaoming Zhou5f37a252013-04-09 21:11:50 -040045/include/ "msm8610-mdss.dtsi"
Aparna Dasd4e0bf32013-06-07 17:56:52 -070046/include/ "msm-rdbg.dtsi"
Syed Rameez Mustafad3935822012-10-09 11:23:20 -070047
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -070048&soc {
49 #address-cells = <1>;
50 #size-cells = <1>;
51 ranges;
Syed Rameez Mustafad3935822012-10-09 11:23:20 -070052
53 intc: interrupt-controller@f9000000 {
54 compatible = "qcom,msm-qgic2";
55 interrupt-controller;
56 #interrupt-cells = <3>;
57 reg = <0xf9000000 0x1000>,
58 <0xf9002000 0x1000>;
59 };
60
61 msmgpio: gpio@fd510000 {
62 compatible = "qcom,msm-gpio";
63 interrupt-controller;
64 #interrupt-cells = <2>;
65 reg = <0xfd510000 0x4000>;
Syed Rameez Mustafa86cccfc2012-12-10 18:06:08 -080066 gpio-controller;
Syed Rameez Mustafad3935822012-10-09 11:23:20 -070067 #gpio-cells = <2>;
Rohit Vaswani341c2032012-11-08 18:49:29 -080068 ngpio = <102>;
Rohit Vaswanid2001522012-12-05 19:23:44 -080069 interrupts = <0 208 0>;
Rohit Vaswanied0a4ef2012-12-11 15:14:42 -080070 qcom,direct-connect-irqs = <8>;
Syed Rameez Mustafad3935822012-10-09 11:23:20 -070071 };
72
Bhalchandra Gajare8d1f1b82013-07-11 16:37:19 -070073 wcd9xxx_intc: wcd9xxx_irq {
74 compatible = "qcom,wcd9xxx-irq";
75 interrupt-controller;
76 #interrupt-cells = <1>;
77 interrupt-parent = <&intc>;
78 interrupts = <0 31 0>;
79 interrupt-names = "cdc-int";
80 };
81
Abhimanyu Kapur58d303a72013-04-30 16:13:41 -070082 qcom,mpm2-sleep-counter@fc4a3000 {
83 compatible = "qcom,mpm2-sleep-counter";
84 reg = <0xfc4a3000 0x1000>;
85 clock-frequency = <32768>;
86 };
87
Syed Rameez Mustafafd9ac032012-10-10 17:52:07 -070088 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -080089 compatible = "arm,armv7-timer";
Syed Rameez Mustafafd9ac032012-10-10 17:52:07 -070090 interrupts = <1 2 0 1 3 0>;
Syed Rameez Mustafad3935822012-10-09 11:23:20 -070091 clock-frequency = <19200000>;
92 };
93
Stephen Boyda61ac642013-04-10 14:20:27 -070094 timer@f9020000 {
95 #address-cells = <1>;
96 #size-cells = <1>;
97 ranges;
98 compatible = "arm,armv7-timer-mem";
99 reg = <0xf9020000 0x1000>;
100 clock-frequency = <19200000>;
101
102 frame@f9021000 {
103 frame-number = <0>;
104 interrupts = <0 8 0x4>,
105 <0 7 0x4>;
106 reg = <0xf9021000 0x1000>,
107 <0xf9022000 0x1000>;
108 };
109
110 frame@f9023000 {
111 frame-number = <1>;
112 interrupts = <0 9 0x4>;
113 reg = <0xf9023000 0x1000>;
114 status = "disabled";
115 };
116
117 frame@f9024000 {
118 frame-number = <2>;
119 interrupts = <0 10 0x4>;
120 reg = <0xf9024000 0x1000>;
121 status = "disabled";
122 };
123
124 frame@f9025000 {
125 frame-number = <3>;
126 interrupts = <0 11 0x4>;
127 reg = <0xf9025000 0x1000>;
128 status = "disabled";
129 };
130
131 frame@f9026000 {
132 frame-number = <4>;
133 interrupts = <0 12 0x4>;
134 reg = <0xf9026000 0x1000>;
135 status = "disabled";
136 };
137
138 frame@f9027000 {
139 frame-number = <5>;
140 interrupts = <0 13 0x4>;
141 reg = <0xf9027000 0x1000>;
142 status = "disabled";
143 };
144
145 frame@f9028000 {
146 frame-number = <6>;
147 interrupts = <0 14 0x4>;
148 reg = <0xf9028000 0x1000>;
149 status = "disabled";
150 };
151 };
152
Arun Menon2a7e3772013-01-17 12:06:59 -0800153 qcom,msm-adsp-loader {
154 compatible = "qcom,adsp-loader";
155 qcom,adsp-state = <0>;
156 };
157
Fred Ohe49386d2013-05-02 17:53:27 -0700158 qcom,msm-audio-ion {
159 compatible = "qcom,msm-audio-ion";
160 qcom,smmu-enabled;
161 };
162
Abhimanyu Kapur032b1f42013-01-18 00:10:50 -0800163 qcom,msm-imem@fe805000 {
164 compatible = "qcom,msm-imem";
165 reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
166 };
167
Syed Rameez Mustafad3935822012-10-09 11:23:20 -0700168 serial@f991f000 {
169 compatible = "qcom,msm-lsuart-v14";
170 reg = <0xf991f000 0x1000>;
171 interrupts = <0 109 0>;
172 status = "disabled";
173 };
Mayank Rana55db0cb2012-10-15 16:50:06 +0530174
Hanumant Singh6b346712013-04-09 16:26:09 -0700175 serial@f991e000 {
176 compatible = "qcom,msm-lsuart-v14";
177 reg = <0xf991e000 0x1000>;
178 interrupts = <0 108 0>;
179 status = "disabled";
180 };
181
Arun Menon8e25dd42013-01-11 14:11:54 -0800182 qcom,vidc@fdc00000 {
183 compatible = "qcom,msm-vidc";
Sachin Shah4e1c8fe2013-03-20 15:10:05 -0700184 qcom,vidc-ns-map = <0x40000000 0x40000000>;
Sachin Shah4e1c8fe2013-03-20 15:10:05 -0700185 qcom,buffer-type-tz-usage-map = <0x1 0x1>,
Cullum Baldwin673f9862013-10-25 17:39:47 -0700186 <0x7fe 0x2>;
Sachin Shah4e1c8fe2013-03-20 15:10:05 -0700187 qcom,hfi = "q6";
Rajeshwar Kurapaty6577d752013-07-31 19:15:38 +0530188 qcom,max-hw-load = <244800>; /* 1080p @ 30 * 1 */
Eric Hoa00e2da2013-06-20 17:41:57 -0700189 qcom,vidc-iommu-domains {
190 qcom,domain-ns {
191 qcom,vidc-domain-phandle = <&q6_domain_ns>;
192 qcom,vidc-partition-buffer-types = <0xfff>;
193 };
194 };
195};
Arun Menon8e25dd42013-01-11 14:11:54 -0800196
Vamsi Krishna872fbbc2013-04-09 18:04:52 -0700197 qcom,usbbam@f9a44000 {
198 compatible = "qcom,usb-bam-msm";
199 reg = <0xf9a44000 0x11000>;
200 reg-names = "hsusb";
201 interrupts = <0 135 0>;
202 interrupt-names = "hsusb";
203 qcom,usb-bam-num-pipes = <16>;
204 qcom,usb-bam-fifo-baseaddr = <0xfe803000>;
205 qcom,ignore-core-reset-ack;
206 qcom,disable-clk-gating;
207
208 qcom,pipe0 {
209 label = "hsusb-qdss-in-0";
210 qcom,usb-bam-mem-type = <3>;
211 qcom,bam-type = <1>;
212 qcom,dir = <1>;
213 qcom,pipe-num = <0>;
214 qcom,peer-bam = <1>;
215 qcom,src-bam-physical-address = <0xfc37c000>;
216 qcom,src-bam-pipe-index = <0>;
217 qcom,dst-bam-physical-address = <0xf9a44000>;
218 qcom,dst-bam-pipe-index = <2>;
219 qcom,data-fifo-offset = <0x0>;
220 qcom,data-fifo-size = <0x600>;
221 qcom,descriptor-fifo-offset = <0x600>;
222 qcom,descriptor-fifo-size = <0x200>;
223 };
224 };
225
Mayank Rana55db0cb2012-10-15 16:50:06 +0530226 usb@f9a55000 {
227 compatible = "qcom,hsusb-otg";
228 reg = <0xf9a55000 0x400>;
Mayank Rana33d26662013-01-17 10:22:25 +0530229 interrupts = <0 134 0>, <0 140 0>;
230 interrupt-names = "core_irq", "async_irq";
Mayank Rana1aedece2013-07-19 17:42:10 +0530231 hsusb_vdd_dig-supply = <&pm8110_s1_corner>;
Mayank Rana76c6ce22012-11-07 17:07:58 +0530232 HSUSB_1p8-supply = <&pm8110_l10>;
233 HSUSB_3p3-supply = <&pm8110_l20>;
Mayank Rana1aedece2013-07-19 17:42:10 +0530234 qcom,vdd-voltage-level = <1 5 7>;
Mayank Rana55db0cb2012-10-15 16:50:06 +0530235
Manu Gautam080001d2013-07-02 15:13:48 +0530236 qcom,hsusb-otg-phy-init-seq =
237 <0x44 0x80 0x68 0x81 0x24 0x82 0x13 0x83 0xffffffff>;
Mayank Rana55db0cb2012-10-15 16:50:06 +0530238 qcom,hsusb-otg-phy-type = <2>;
239 qcom,hsusb-otg-mode = <1>;
Mayank Rana29bb9f22013-04-04 18:25:12 +0530240 qcom,hsusb-otg-otg-control = <2>;
Mayank Rana55db0cb2012-10-15 16:50:06 +0530241 qcom,hsusb-otg-disable-reset;
Mayank Ranaa5491122013-04-04 18:32:25 +0530242 qcom,dp-manual-pullup;
Saket Saurabh0844d6e2013-11-26 11:49:06 +0530243 qcom,disable-retention-with-vdd-min;
Mayank Ranaf9295802013-04-04 18:36:44 +0530244
245 qcom,msm-bus,name = "usb2";
246 qcom,msm-bus,num-cases = <2>;
247 qcom,msm-bus,active-only = <0>;
248 qcom,msm-bus,num-paths = <1>;
249 qcom,msm-bus,vectors-KBps =
250 <87 512 0 0>,
251 <87 512 60000 960000>;
Mayank Rana55db0cb2012-10-15 16:50:06 +0530252 };
253
wujin3c6eaab2013-08-23 16:26:30 +0800254 android_usb: android_usb@fe8050c8 {
Mayank Rana55db0cb2012-10-15 16:50:06 +0530255 compatible = "qcom,android-usb";
Mayank Ranacc0c5452013-01-29 16:41:53 +0530256 reg = <0xfe8050c8 0xc8>;
Manu Gautamd4f33082013-06-12 14:24:01 +0530257 qcom,android-usb-swfi-latency = <1>;
Mayank Rana5f864fa2013-11-11 14:21:05 +0530258 qcom,streaming-func = "rndis";
Mayank Rana55db0cb2012-10-15 16:50:06 +0530259 };
260
Pratibhasagar Vc20526a2013-10-09 18:59:45 +0530261 rmtfs_sharedmem {
262 compatible = "qcom,sharedmem-uio";
263 reg = <0x0dc80000 0x00180000>;
264 reg-names = "rmtfs";
265 };
266
267 dsp_sharedmem {
268 compatible = "qcom,sharedmem-uio";
269 reg = <0x0dc60000 0x00020000>;
270 reg-names = "rfsa_dsp";
271 };
272
273 mdm_sharedmem {
274 compatible = "qcom,sharedmem-uio";
275 reg = <0x0dc60000 0x00020000>;
276 reg-names = "rfsa_mdm";
277 };
278
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700279 sdcc1: qcom,sdcc@f9824000 {
280 cell-index = <1>; /* SDC1 eMMC slot */
281 compatible = "qcom,msm-sdcc";
Oluwafemi Adeyemi4641e7f2012-11-28 16:12:56 -0800282 reg = <0xf9824000 0x800>,
283 <0xf9824800 0x100>,
284 <0xf9804000 0x7000>;
285 reg-names = "core_mem", "dml_mem", "bam_mem";
286 interrupts = <0 123 0>, <0 137 0>;
287 interrupt-names = "core_irq", "bam_irq";
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700288
Oluwafemi Adeyemid0035622012-11-02 12:07:06 -0700289 vdd-supply = <&pm8110_l17>;
Oluwafemi Adeyemid0035622012-11-02 12:07:06 -0700290 qcom,vdd-voltage-level = <2900000 2900000>;
291 qcom,vdd-current-level = <9000 400000>;
292
293 vdd-io-supply = <&pm8110_l6>;
294 qcom,vdd-io-always-on;
Oluwafemi Adeyemid0035622012-11-02 12:07:06 -0700295 qcom,vdd-io-voltage-level = <1800000 1800000>;
296 qcom,vdd-io-current-level = <9000 60000>;
297
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700298 qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
299 qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
Krishna Konda6c5d0f42013-04-12 16:44:26 -0700300 qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700301 qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700302
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700303 qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
Oluwafemi Adeyemid0035622012-11-02 12:07:06 -0700304 qcom,sup-voltages = <2900 2900>;
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700305 qcom,bus-width = <8>;
306 qcom,nonremovable;
307 qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
Venkat Gopalakrishnan587b2252013-04-05 12:16:50 -0700308
309 status = "disabled";
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700310 };
311
312 sdcc2: qcom,sdcc@f98a4000 {
313 cell-index = <2>; /* SDC2 SD card slot */
314 compatible = "qcom,msm-sdcc";
Oluwafemi Adeyemi4641e7f2012-11-28 16:12:56 -0800315 reg = <0xf98a4000 0x800>,
316 <0xf98a4800 0x100>,
317 <0xf9884000 0x7000>;
318 reg-names = "core_mem", "dml_mem", "bam_mem";
319 interrupts = <0 125 0>, <0 220 0>;
320 interrupt-names = "core_irq", "bam_irq";
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700321
Oluwafemi Adeyemid0035622012-11-02 12:07:06 -0700322 vdd-supply = <&pm8110_l18>;
323 qcom,vdd-voltage-level = <2950000 2950000>;
324 qcom,vdd-current-level = <9000 400000>;
325
326 vdd-io-supply = <&pm8110_l21>;
327 qcom,vdd-io-voltage-level = <1800000 2950000>;
328 qcom,vdd-io-current-level = <9000 50000>;
329
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700330 qcom,pad-pull-on = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
331 qcom,pad-pull-off = <0x0 0x3 0x3>; /* no-pull, pull-up, pull-up */
Krishna Konda6c5d0f42013-04-12 16:44:26 -0700332 qcom,pad-drv-on = <0x4 0x4 0x4>; /* 10mA, 10mA, 10mA */
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700333 qcom,pad-drv-off = <0x0 0x0 0x0>; /* 2mA, 2mA, 2mA */
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700334
Oluwafemi Adeyemi6cdfdb82012-11-02 13:36:29 -0700335 qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
336 qcom,sup-voltages = <2950 2950>;
337 qcom,bus-width = <4>;
338 qcom,xpc;
339 qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
340 qcom,current-limit = <800>;
Venkat Gopalakrishnan587b2252013-04-05 12:16:50 -0700341
342 status = "disabled";
Oluwafemi Adeyemi58289bf2012-10-16 17:24:33 -0700343 };
344
Venkat Gopalakrishnana6ce5f22013-04-04 14:24:57 -0700345 sdhc_1: sdhci@f9824900 {
346 compatible = "qcom,sdhci-msm";
347 reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
348 reg-names = "hc_mem", "core_mem";
349
350 interrupts = <0 123 0>, <0 138 0>;
351 interrupt-names = "hc_irq", "pwr_irq";
352
353 qcom,bus-width = <8>;
354 status = "disabled";
355 };
356
357 sdhc_2: sdhci@f98a4900 {
358 compatible = "qcom,sdhci-msm";
359 reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
360 reg-names = "hc_mem", "core_mem";
361
362 interrupts = <0 125 0>, <0 221 0>;
363 interrupt-names = "hc_irq", "pwr_irq";
364
365 qcom,bus-width = <4>;
366 status = "disabled";
367 };
368
Yan He6c7304c2012-11-09 22:07:08 -0800369 qcom,sps {
370 compatible = "qcom,msm_sps";
371 qcom,device-type = <3>;
372 };
373
Jeff Hugo4e20fda2013-04-10 12:40:19 -0600374 qcom,smem@d900000 {
Jeff Hugo818d0f72012-11-05 14:19:28 -0700375 compatible = "qcom,smem";
Jeff Hugoe1e30e72013-04-08 14:15:34 -0600376 reg = <0xd900000 0x100000>,
Stepan Moskovchenkod6ee8262013-02-06 11:26:05 -0800377 <0xf9011000 0x1000>,
Jeff Hugo818d0f72012-11-05 14:19:28 -0700378 <0xfc428000 0x4000>;
379 reg-names = "smem", "irq-reg-base", "aux-mem1";
380
381 qcom,smd-modem {
382 compatible = "qcom,smd";
383 qcom,smd-edge = <0>;
384 qcom,smd-irq-offset = <0x8>;
385 qcom,smd-irq-bitmask = <0x1000>;
386 qcom,pil-string = "modem";
387 interrupts = <0 25 1>;
388 };
389
390 qcom,smsm-modem {
391 compatible = "qcom,smsm";
392 qcom,smsm-edge = <0>;
393 qcom,smsm-irq-offset = <0x8>;
394 qcom,smsm-irq-bitmask = <0x2000>;
395 interrupts = <0 26 1>;
396 };
397
398 qcom,smd-adsp {
399 compatible = "qcom,smd";
400 qcom,smd-edge = <1>;
401 qcom,smd-irq-offset = <0x8>;
402 qcom,smd-irq-bitmask = <0x100>;
403 qcom,pil-string = "adsp";
404 interrupts = <0 156 1>;
405 };
406
407 qcom,smsm-adsp {
408 compatible = "qcom,smsm";
409 qcom,smsm-edge = <1>;
410 qcom,smsm-irq-offset = <0x8>;
411 qcom,smsm-irq-bitmask = <0x200>;
412 interrupts = <0 157 1>;
413 };
414
415 qcom,smd-wcnss {
416 compatible = "qcom,smd";
417 qcom,smd-edge = <6>;
418 qcom,smd-irq-offset = <0x8>;
419 qcom,smd-irq-bitmask = <0x20000>;
420 qcom,pil-string = "wcnss";
421 interrupts = <0 142 1>;
422 };
423
424 qcom,smsm-wcnss {
425 compatible = "qcom,smsm";
426 qcom,smsm-edge = <6>;
427 qcom,smsm-irq-offset = <0x8>;
428 qcom,smsm-irq-bitmask = <0x80000>;
429 interrupts = <0 144 1>;
430 };
431
432 qcom,smd-rpm {
433 compatible = "qcom,smd";
434 qcom,smd-edge = <15>;
435 qcom,smd-irq-offset = <0x8>;
436 qcom,smd-irq-bitmask = <0x1>;
437 interrupts = <0 168 1>;
438 qcom,irq-no-suspend;
439 };
David Ng5a3cb232012-12-03 16:42:53 -0800440 };
Hanumant Singh4e334c82012-11-14 10:16:39 -0800441
Praveen Chidambarama1f98282012-11-29 09:56:57 -0700442 rpm_bus: qcom,rpm-smd {
443 compatible = "qcom,rpm-smd";
444 rpm-channel-name = "rpm_requests";
445 rpm-channel-type = <15>; /* SMD_APPS_RPM */
Praveen Chidambarama1f98282012-11-29 09:56:57 -0700446 };
447
Jennifer Liuccb66f62013-06-06 10:46:51 -0700448 qcom,bcl {
449 compatible = "qcom,bcl";
450 };
451
Olav Haugan8340d932013-01-25 12:03:11 -0800452 qcom,msm-mem-hole {
453 compatible = "qcom,msm-mem-hole";
Neeti Desai8349e9c2013-07-17 11:29:33 -0700454 qcom,memblock-remove = <0x08800000 0x5600000>; /* Address and Size of Hole */
Olav Haugan8340d932013-01-25 12:03:11 -0800455 };
456
Hanumant Singh4e334c82012-11-14 10:16:39 -0800457 qcom,wdt@f9017000 {
458 compatible = "qcom,msm-watchdog";
459 reg = <0xf9017000 0x1000>;
460 interrupts = <0 3 0>, <0 4 0>;
461 qcom,bark-time = <11000>;
462 qcom,pet-time = <10000>;
Mitchel Humpherys1be23802012-11-16 15:52:32 -0800463 qcom,ipi-ping;
Jeff Hugo818d0f72012-11-05 14:19:28 -0700464 };
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700465
Patrick Dalyb86df502013-11-05 14:27:13 -0800466 qcom,clock-a7@f9011050 {
467 compatible = "qcom,clock-a7-8226";
Vikram Mulukutlaa3cebff2013-01-28 13:54:54 -0800468 reg = <0xf9011050 0x8>;
Patrick Dalyb86df502013-11-05 14:27:13 -0800469 reg-names = "rcg-base";
470 clock-names = "clk-4", "clk-5";
471 qcom,speed0-bin-v0 =
472 < 0 0>,
473 < 384000000 1>,
474 < 787200000 2>,
475 <1190400000 3>;
476
477 cpu-vdd-supply = <&apc_vreg_corner>;
478 };
479
480 qcom,cpubw {
481 compatible = "qcom,cpubw";
482 qcom,cpu-mem-ports = <1 512>;
483 qcom,bw-tbl =
484 < 762 /* 100 MHz */ >,
485 < 1525 /* 200 MHz */ >,
486 < 2540 /* 333 MHz */ >;
487 };
488
489 qcom,msm-cpufreq@0 {
490 reg = <0 4>;
491 compatible = "qcom,msm-cpufreq";
492 qcom,cpufreq-table =
493 < 300000 762 >,
494 < 384000 762 >,
495 < 600000 1525 >,
496 < 787200 1525 >,
497 < 998400 2540 >,
498 < 1190400 2540 >;
Vikram Mulukutlaa3cebff2013-01-28 13:54:54 -0800499 };
500
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700501 spmi_bus: qcom,spmi@fc4c0000 {
502 cell-index = <0>;
503 compatible = "qcom,spmi-pmic-arb";
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700504 reg-names = "core", "intr", "cnfg";
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700505 reg = <0xfc4cf000 0x1000>,
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700506 <0Xfc4cb000 0x1000>,
507 <0Xfc4ca000 0x1000>;
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700508 /* 190,ee0_krait_hlos_spmi_periph_irq */
509 /* 187,channel_0_krait_hlos_trans_done_irq */
510 interrupts = <0 190 0>, <0 187 0>;
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700511 qcom,pmic-arb-ee = <0>;
512 qcom,pmic-arb-channel = <0>;
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700513 };
514
Chun Zhangf39a0652013-05-01 15:57:54 -0700515 i2c@f9923000 { /* BLSP-1 QUP-1 */
516 cell-index = <1>;
Gilad Avidovf84f2792013-01-31 13:26:39 -0700517 compatible = "qcom,i2c-qup";
518 #address-cells = <1>;
519 #size-cells = <0>;
520 reg-names = "qup_phys_addr";
Chun Zhangf39a0652013-05-01 15:57:54 -0700521 reg = <0xf9923000 0x1000>;
Gilad Avidovf84f2792013-01-31 13:26:39 -0700522 interrupt-names = "qup_err_intr";
Chun Zhangf39a0652013-05-01 15:57:54 -0700523 interrupts = <0 95 0>;
Gilad Avidovf84f2792013-01-31 13:26:39 -0700524 qcom,i2c-bus-freq = <100000>;
Chun Zhangf39a0652013-05-01 15:57:54 -0700525 qcom,i2c-src-freq = <19200000>;
526 qcom,sda-gpio = <&msmgpio 2 0>;
527 qcom,scl-gpio = <&msmgpio 3 0>;
Mallesh Koujalagi07866832013-08-08 17:40:04 -0700528 qcom,master-id = <86>;
Gilad Avidovf84f2792013-01-31 13:26:39 -0700529 };
530
Kuirong Wangc6d072c2013-01-29 10:33:03 -0800531 i2c_cdc: i2c@f9927000 { /* BLSP1 QUP5 */
532 cell-index = <5>;
533 compatible = "qcom,i2c-qup";
534 #address-cells = <1>;
535 #size-cells = <0>;
536 reg-names = "qup_phys_addr";
537 reg = <0xf9927000 0x1000>;
538 interrupt-names = "qup_err_intr";
539 interrupts = <0 99 0>;
540 qcom,i2c-bus-freq = <100000>;
Mallesh Koujalagi07866832013-08-08 17:40:04 -0700541 qcom,i2c-src-freq = <19200000>;
542 qcom,master-id = <86>;
Kuirong Wangc6d072c2013-01-29 10:33:03 -0800543 };
544
Lokesh Kumar Aakulu25213502013-05-07 17:43:03 -0700545 i2c: i2c@f9928000 { /* BLSP1 QUP6 */
Kenneth Heitke0d4fbb12013-04-10 12:51:14 -0600546 cell-index = <6>;
547 compatible = "qcom,i2c-qup";
548 #address-cells = <1>;
549 #size-cells = <0>;
550 reg-names = "qup_phys_addr";
551 reg = <0xf9928000 0x1000>;
552 interrupt-names = "qup_err_intr";
553 interrupts = <0 100 0>;
554 qcom,i2c-bus-freq = <100000>;
555 qcom,i2c-src-freq = <19200000>;
556 qcom,sda-gpio = <&msmgpio 16 0>;
557 qcom,scl-gpio = <&msmgpio 17 0>;
Mallesh Koujalagi07866832013-08-08 17:40:04 -0700558 qcom,master-id = <86>;
Kenneth Heitke0d4fbb12013-04-10 12:51:14 -0600559 };
Gilad Avidovf58f1832013-01-09 17:31:28 -0700560
Houston Hoffman59c6b5d2013-11-14 05:28:34 -0800561
562 i2c@f9924000 { /* BLSP-1 QUP-3 */
563 cell-index = <2>;
564 compatible = "qcom,i2c-qup";
Houston Hoffmanc703cc22013-12-18 20:42:34 -0800565 #address-cells = <1>;
566 #size-cells = <0>;
Houston Hoffman59c6b5d2013-11-14 05:28:34 -0800567 reg-names = "qup_phys_addr";
568 reg = <0xf9924000 0x1000>;
569 interrupt-names = "qup_err_intr";
570 interrupts = <0 96 0>;
571 qcom,i2c-bus-freq = <100000>;
572 qcom,i2c-src-freq = <19200000>;
573 qcom,sda-gpio = <&msmgpio 8 0>;
574 qcom,scl-gpio = <&msmgpio 9 0>;
575 qcom,master-id = <86>;
576 };
577
Chun Zhangf39a0652013-05-01 15:57:54 -0700578 i2c@f9925000 { /* BLSP-1 QUP-3 */
579 cell-index = <0>;
580 compatible = "qcom,i2c-qup";
Gilad Avidovf58f1832013-01-09 17:31:28 -0700581 #address-cells = <1>;
582 #size-cells = <0>;
Chun Zhangf39a0652013-05-01 15:57:54 -0700583 reg-names = "qup_phys_addr";
584 reg = <0xf9925000 0x1000>;
585 interrupt-names = "qup_err_intr";
586 interrupts = <0 97 0>;
587 qcom,i2c-bus-freq = <100000>;
Mallesh Koujalagi07866832013-08-08 17:40:04 -0700588 qcom,i2c-src-freq = <19200000>;
589 qcom,sda-gpio = <&msmgpio 10 0>;
590 qcom,scl-gpio = <&msmgpio 11 0>;
591 qcom,master-id = <86>;
Gilad Avidovf58f1832013-01-09 17:31:28 -0700592 };
593
Gilad Avidova460c472013-04-12 16:23:32 -0600594 spi_4: spi@f9926000 { /* BLSP1 QUP4 */
595 compatible = "qcom,spi-qup-v2";
596 #address-cells = <1>;
597 #size-cells = <0>;
598 reg-names = "spi_physical", "spi_bam_physical";
599 reg = <0xf9926000 0x1000>,
600 <0xf9904000 0x15000>;
601 interrupt-names = "spi_irq", "spi_bam_irq";
602 interrupts = <0 98 0>, <0 238 0>;
603 spi-max-frequency = <50000000>;
604
Gilad Avidovcff4ca72013-07-01 17:35:36 -0600605 qcom,gpio-mosi = <&msmgpio 86 0>;
606 qcom,gpio-miso = <&msmgpio 87 0>;
607 qcom,gpio-clk = <&msmgpio 89 0>;
608 qcom,gpio-cs0 = <&msmgpio 88 0>;
Pavankumar Kondeti107b2ac2014-03-02 14:42:31 +0530609 qcom,gpio-cs2 = <&msmgpio 85 0>;
Gilad Avidova460c472013-04-12 16:23:32 -0600610
611 qcom,infinite-mode = <0>;
612 qcom,use-bam;
613 qcom,ver-reg-exists;
614 qcom,bam-consumer-pipe-index = <18>;
615 qcom,bam-producer-pipe-index = <19>;
Gilad Avidovcff4ca72013-07-01 17:35:36 -0600616 qcom,master-id = <86>;
Pavankumar Kondeti107b2ac2014-03-02 14:42:31 +0530617
618 lattice,spi-usb@2 {
619 compatible = "lattice,ice40-spi-usb";
620 reg = <2>;
621 spi-max-frequency = <50000000>;
622 spi-cpol = <1>;
623 spi-cpha = <1>;
624 core-vcc-supply = <&pm8110_l2>;
625 spi-vcc-supply = <&pm8110_l6>;
626 gpio-supply = <&pm8110_l22>;
627 lattice,reset-gpio = <&msmgpio 95 0>;
628 lattice,slave-select-gpio = <&msmgpio 85 0>;
629 lattice,config-done-gpio = <&msmgpio 94 0>;
630 lattice,vcc-en-gpio = <&msmgpio 96 0>;
631 };
Gilad Avidova460c472013-04-12 16:23:32 -0600632 };
633
Vikram Mulukutla1ac32fd2013-01-28 10:03:58 -0800634 qcom,pronto@fb21b000 {
635 compatible = "qcom,pil-pronto";
636 reg = <0xfb21b000 0x3000>,
637 <0xfc401700 0x4>,
638 <0xfd485300 0xc>;
639 reg-names = "pmu_base", "clk_base", "halt_base";
640 interrupts = <0 149 1>;
641 vdd_pronto_pll-supply = <&pm8110_l10>;
642
643 qcom,firmware-name = "wcnss";
Sameer Thalappil7abeb222013-04-02 11:13:42 -0700644
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700645 /* GPIO inputs from wcnss */
Sameer Thalappil7abeb222013-04-02 11:13:42 -0700646 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_4_in 0 0>;
Sameer Thalappilb1e03c02013-04-29 14:52:00 -0700647 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_4_in 1 0>;
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700648 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_4_in 2 0>;
Sameer Thalappil7abeb222013-04-02 11:13:42 -0700649
650 /* GPIO output to wcnss */
651 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_4_out 0 0>;
Vikram Mulukutla1ac32fd2013-01-28 10:03:58 -0800652 };
653
Sameer Thalappil1b65cd02013-04-03 16:42:34 -0700654 qcom,iris-fm {
655 compatible = "qcom,iris_fm";
656 };
657
Fred Oh92b18a02013-01-22 13:29:41 -0800658 sound {
659 compatible = "qcom,msm8x10-audio-codec";
660 qcom,model = "msm8x10-snd-card";
661 };
662
Krishnankutty Kolathappilly01a3f9b2013-12-12 17:00:15 -0800663 qti,msm-pcm {
664 compatible = "qti,msm-pcm-dsp";
665 qti,msm-pcm-dsp-id = <0>;
Fred Oh92b18a02013-01-22 13:29:41 -0800666 };
667
Krishnankutty Kolathappilly01a3f9b2013-12-12 17:00:15 -0800668 qti,msm-pcm-low-latency {
669 compatible = "qti,msm-pcm-dsp";
670 qti,msm-pcm-dsp-id = <1>;
671 qti,msm-pcm-low-latency;
Krishnankutty Kolathappilly22dc25b2013-11-25 12:11:07 -0800672 qti,latency-level = "ultra";
Mingming Yin8b92f9b2013-05-01 14:10:26 -0700673 };
674
Fred Oh92b18a02013-01-22 13:29:41 -0800675 qcom,msm-pcm-routing {
676 compatible = "qcom,msm-pcm-routing";
677 };
678
679 qcom,msm-pcm-lpa {
680 compatible = "qcom,msm-pcm-lpa";
681 };
682
683 qcom,msm-compr-dsp {
684 compatible = "qcom,msm-compr-dsp";
685 };
686
Haynes Mathew George1ccabc52013-09-17 14:36:48 -0700687 qcom,msm-compress-dsp {
688 compatible = "qcom,msm-compress-dsp";
689 };
690
Fred Oh92b18a02013-01-22 13:29:41 -0800691 qcom,msm-voip-dsp {
692 compatible = "qcom,msm-voip-dsp";
693 };
694
695 qcom,msm-pcm-voice {
696 compatible = "qcom,msm-pcm-voice";
697 };
698
699 qcom,msm-stub-codec {
700 compatible = "qcom,msm-stub-codec";
701 };
702
703 qcom,msm-dai-fe {
704 compatible = "qcom,msm-dai-fe";
705 };
706
707 qcom,msm-pcm-afe {
708 compatible = "qcom,msm-pcm-afe";
709 };
710
711 qcom,msm-dai-mi2s {
712 compatible = "qcom,msm-dai-mi2s";
713 qcom,msm-dai-q6-mi2s-prim {
714 compatible = "qcom,msm-dai-q6-mi2s";
715 qcom,msm-dai-q6-mi2s-dev-id = <0>;
Kuirong Wang16f52d62013-03-07 10:49:27 -0800716 qcom,msm-mi2s-rx-lines = <0>;
717 qcom,msm-mi2s-tx-lines = <3>;
Fred Oh92b18a02013-01-22 13:29:41 -0800718 };
719
720 qcom,msm-dai-q6-mi2s-sec {
721 compatible = "qcom,msm-dai-q6-mi2s";
722 qcom,msm-dai-q6-mi2s-dev-id = <1>;
Kuirong Wang16f52d62013-03-07 10:49:27 -0800723 qcom,msm-mi2s-rx-lines = <3>;
724 qcom,msm-mi2s-tx-lines = <0>;
Fred Oh92b18a02013-01-22 13:29:41 -0800725 };
726 };
727
728 qcom,msm-dai-q6 {
729 compatible = "qcom,msm-dai-q6";
730 qcom,msm-dai-q6-bt-sco-rx {
731 compatible = "qcom,msm-dai-q6-dev";
732 qcom,msm-dai-q6-dev-id = <12288>;
733 };
734
735 qcom,msm-dai-q6-bt-sco-tx {
736 compatible = "qcom,msm-dai-q6-dev";
737 qcom,msm-dai-q6-dev-id = <12289>;
738 };
739
740 qcom,msm-dai-q6-int-fm-rx {
741 compatible = "qcom,msm-dai-q6-dev";
742 qcom,msm-dai-q6-dev-id = <12292>;
743 };
744
745 qcom,msm-dai-q6-int-fm-tx {
746 compatible = "qcom,msm-dai-q6-dev";
747 qcom,msm-dai-q6-dev-id = <12293>;
748 };
749
750 qcom,msm-dai-q6-be-afe-pcm-rx {
751 compatible = "qcom,msm-dai-q6-dev";
752 qcom,msm-dai-q6-dev-id = <224>;
753 };
754
755 qcom,msm-dai-q6-be-afe-pcm-tx {
756 compatible = "qcom,msm-dai-q6-dev";
757 qcom,msm-dai-q6-dev-id = <225>;
758 };
759
760 qcom,msm-dai-q6-afe-proxy-rx {
761 compatible = "qcom,msm-dai-q6-dev";
762 qcom,msm-dai-q6-dev-id = <241>;
763 };
764
765 qcom,msm-dai-q6-afe-proxy-tx {
766 compatible = "qcom,msm-dai-q6-dev";
767 qcom,msm-dai-q6-dev-id = <240>;
768 };
Vicky Sehrawatfc8044f2013-04-18 11:34:32 -0700769
770 qcom,msm-dai-q6-incall-record-rx {
771 compatible = "qcom,msm-dai-q6-dev";
772 qcom,msm-dai-q6-dev-id = <32771>;
773 };
774
775 qcom,msm-dai-q6-incall-record-tx {
776 compatible = "qcom,msm-dai-q6-dev";
777 qcom,msm-dai-q6-dev-id = <32772>;
778 };
779
780 qcom,msm-dai-q6-incall-music-rx {
781 compatible = "qcom,msm-dai-q6-dev";
782 qcom,msm-dai-q6-dev-id = <32773>;
783 };
Avinash Vaishfb5a9eb2014-02-26 16:27:16 +0530784
785 qcom,msm-dai-q6-incall-music-2-rx {
786 compatible = "qcom,msm-dai-q6-dev";
787 qcom,msm-dai-q6-dev-id = <32770>;
788 };
Fred Oh92b18a02013-01-22 13:29:41 -0800789 };
790
791 qcom,msm-pcm-hostless {
792 compatible = "qcom,msm-pcm-hostless";
793 };
794
Sameer Thalappil3928fef2013-04-08 11:51:15 -0700795 qcom,wcnss-wlan@fb000000 {
796 compatible = "qcom,wcnss_wlan";
Sameer Thalappilb2b93672013-04-18 17:00:46 -0700797 reg = <0xfb000000 0x280000>,
798 <0xf9011008 0x04>;
799 reg-names = "wcnss_mmio", "wcnss_fiq";
Sameer Thalappil3928fef2013-04-08 11:51:15 -0700800 interrupts = <0 145 0>, <0 146 0>;
801 interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq";
802
803 qcom,pronto-vddmx-supply = <&pm8110_l3>;
804 qcom,pronto-vddcx-supply = <&pm8110_s1>;
805 qcom,pronto-vddpx-supply = <&pm8110_l6>;
806 qcom,iris-vddxo-supply = <&pm8110_l10>;
807 qcom,iris-vddrfa-supply = <&pm8110_l5>;
808 qcom,iris-vddpa-supply = <&pm8110_l16>;
809 qcom,iris-vdddig-supply = <&pm8110_l5>;
810
811 gpios = <&msmgpio 23 0>, <&msmgpio 24 0>, <&msmgpio 25 0>, <&msmgpio 26 0>, <&msmgpio 27 0>;
Sameer Thalappil820f87b2013-05-21 20:40:54 -0700812 qcom,has-pronto-hw;
Sameer Thalappilb56dc142013-05-21 14:23:46 -0700813 qcom,wlan-rx-buff-count = <256>;
Sameer Thalappild3d6dcf2013-07-03 15:03:42 -0700814 qcom,has-autodetect-xo;
Sameer Thalappil3928fef2013-04-08 11:51:15 -0700815 };
816
Vikram Mulukutla186edd62013-02-22 14:10:40 -0800817 qcom,mss@fc880000 {
818 compatible = "qcom,pil-q6v5-mss";
819 reg = <0xfc880000 0x100>,
820 <0xfd485000 0x400>,
821 <0xfc820000 0x020>,
822 <0xfc401680 0x004>,
Vikram Mulukutla186edd62013-02-22 14:10:40 -0800823 <0xfd485194 0x4>;
824 reg-names = "qdsp6_base", "halt_base", "rmb_base",
Matt Wagantall724b2bb2013-03-18 14:54:06 -0700825 "restart_reg", "cxrail_bhs_reg";
Vikram Mulukutla186edd62013-02-22 14:10:40 -0800826
827 interrupts = <0 24 1>;
Vikram Mulukutla186edd62013-02-22 14:10:40 -0800828 vdd_cx-supply = <&pm8110_s1_corner>;
829 vdd_mx-supply = <&pm8110_l3>;
830 vdd_pll-supply = <&pm8110_l10>;
831 qcom,vdd_pll = <1800000>;
832 qcom,is-loadable;
833 qcom,firmware-name = "mba";
834 qcom,pil-self-auth;
Vikram Mulukutla7268d9f2013-04-01 16:57:57 -0700835
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800836 /* GPIO inputs from mss */
Vikram Mulukutla7268d9f2013-04-01 16:57:57 -0700837 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>;
Seemanta Dutta9fb72ed2013-01-25 14:22:15 -0800838 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_1_in 1 0>;
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800839 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>;
Seemanta Dutta0adbbf02013-03-12 17:26:17 -0700840 qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_1_in 3 0>;
Vikram Mulukutla7268d9f2013-04-01 16:57:57 -0700841
842 /* GPIO output to mss */
843 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>;
Vikram Mulukutla186edd62013-02-22 14:10:40 -0800844 };
845
Vikram Mulukutla36d2dc42012-11-16 15:36:00 -0800846 qcom,lpass@fe200000 {
847 compatible = "qcom,pil-q6v5-lpass";
848 reg = <0xfe200000 0x00100>,
Matt Wagantall015b50af2013-03-05 18:51:16 -0800849 <0xfd485100 0x00010>,
850 <0xfc4016c0 0x00004>;
851 reg-names = "qdsp6_base", "halt_base", "restart_reg";
Vikram Mulukutla36d2dc42012-11-16 15:36:00 -0800852 interrupts = <0 162 1>;
Matt Wagantall6c515982013-01-29 14:58:43 -0800853 vdd_cx-supply = <&pm8110_s1_corner>;
Vikram Mulukutla36d2dc42012-11-16 15:36:00 -0800854 qcom,firmware-name = "adsp";
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700855
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700856 /* GPIO inputs from lpass */
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700857 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_2_in 0 0>;
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700858 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_2_in 2 0>;
Ravishankar Sarawadi7edc9d72013-04-09 18:15:03 -0700859 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_2_in 1 0>;
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700860
861 /* GPIO output to lpass */
862 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>;
Vikram Mulukutla36d2dc42012-11-16 15:36:00 -0800863 };
Siddartha Mohanadossf7d2f4d2013-03-11 22:10:15 -0700864
865 tsens: tsens@fc4a8000 {
866 compatible = "qcom,msm-tsens";
867 reg = <0xfc4a8000 0x2000>,
Siddartha Mohanadoss6ddc1922013-07-08 17:40:11 -0700868 <0xfc4bc000 0x1000>;
Siddartha Mohanadossf7d2f4d2013-03-11 22:10:15 -0700869 reg-names = "tsens_physical", "tsens_eeprom_physical";
870 interrupts = <0 184 0>;
871 qcom,sensors = <2>;
872 qcom,slope = <2901 2846>;
Siddartha Mohanadossb2f48982013-03-28 13:51:38 -0700873 qcom,calib-mode = "fuse_map3";
Siddartha Mohanadoss921f1f02013-04-04 16:30:03 -0700874 qcom,sensor-id = <0 5>;
Siddartha Mohanadossf7d2f4d2013-03-11 22:10:15 -0700875 };
876
Jennifer Liuf588d3a2013-04-05 10:11:48 -0700877 qcom,msm-thermal {
878 compatible = "qcom,msm-thermal";
Jennifer Liud17e9eb2013-04-17 11:56:58 -0700879 qcom,sensor-id = <5>;
Jennifer Liuf588d3a2013-04-05 10:11:48 -0700880 qcom,poll-ms = <250>;
881 qcom,limit-temp = <60>;
882 qcom,temp-hysteresis = <10>;
883 qcom,freq-step = <2>;
Praveen Chidambarama7435ce2013-05-03 12:52:42 -0600884 qcom,freq-control-mask = <0xf>;
Jennifer Liu1a70a9c2013-06-19 17:59:25 -0700885 qcom,core-limit-temp = <80>;
886 qcom,core-temp-hysteresis = <10>;
887 qcom,core-control-mask = <0xe>;
Jennifer Liu80a6a2e2013-09-24 18:31:58 -0700888 qcom,hotplug-temp = <110>;
889 qcom,hotplug-temp-hysteresis = <20>;
890 qcom,cpu-sensors = "tsens_tz_sensor5", "tsens_tz_sensor5",
891 "tsens_tz_sensor5", "tsens_tz_sensor5";
Jennifer Liu049780e2013-06-26 14:24:13 -0700892 qcom,vdd-restriction-temp = <5>;
893 qcom,vdd-restriction-temp-hysteresis = <10>;
Jennifer Liu9cddf2d2013-07-05 13:32:29 -0700894 vdd-dig-supply = <&pm8110_s1_floor_corner>;
Jennifer Liu049780e2013-06-26 14:24:13 -0700895
896 qcom,vdd-dig-rstr{
Jennifer Liu9cddf2d2013-07-05 13:32:29 -0700897 qcom,vdd-rstr-reg = "vdd-dig";
Jennifer Liu049780e2013-06-26 14:24:13 -0700898 qcom,levels = <5 7 7>; /* Nominal, Super Turbo, Super Turbo */
899 qcom,min-level = <1>; /* No Request */
900 };
901
902 qcom,vdd-apps-rstr{
Jennifer Liu9cddf2d2013-07-05 13:32:29 -0700903 qcom,vdd-rstr-reg = "vdd-apps";
Jennifer Liu049780e2013-06-26 14:24:13 -0700904 qcom,levels = <600000 787200 998400>;
905 qcom,freq-req;
906 };
Jennifer Liuf588d3a2013-04-05 10:11:48 -0700907 };
Jeff Hugoae4ab9f62013-04-08 13:43:08 -0600908
909 qcom,ipc-spinlock@fd484000 {
910 compatible = "qcom,ipc-spinlock-sfpb";
911 reg = <0xfd484000 0x400>;
912 qcom,num-locks = <8>;
913 };
Jeff Hugode2822a2013-04-08 14:09:38 -0600914
915 qcom,bam_dmux@fc834000 {
916 compatible = "qcom,bam_dmux";
917 reg = <0xfc834000 0x7000>;
918 interrupts = <0 29 1>;
919 };
Hariprasad Dhalinarasimha3a3e4e32013-04-14 16:18:30 -0700920
Neeti Desai8349e9c2013-07-17 11:29:33 -0700921 qcom,qseecom@da00000 {
Hariprasad Dhalinarasimha3a3e4e32013-04-14 16:18:30 -0700922 compatible = "qcom,qseecom";
Neeti Desai8349e9c2013-07-17 11:29:33 -0700923 reg = <0xda00000 0x100000>;
Hariprasad Dhalinarasimha3a3e4e32013-04-14 16:18:30 -0700924 reg-names = "secapp-region";
925 qcom,disk-encrypt-pipe-pair = <2>;
926 qcom,hlos-ce-hw-instance = <0>;
927 qcom,qsee-ce-hw-instance = <0>;
928 qcom,msm-bus,name = "qseecom-noc";
929 qcom,msm-bus,num-cases = <4>;
930 qcom,msm-bus,active-only = <0>;
931 qcom,msm-bus,num-paths = <1>;
932 qcom,msm-bus,vectors-KBps =
933 <55 512 0 0>,
934 <55 512 3936000 393600>,
935 <55 512 3936000 393600>,
936 <55 512 3936000 393600>;
937 };
Aparna Dase7cab2e2013-04-16 16:54:47 -0700938
Hariprasad Dhalinarasimhac8e0f312013-04-13 17:18:50 -0700939 qcom,msm-rng@f9bff000 {
940 compatible = "qcom,msm-rng";
941 reg = <0xf9bff000 0x200>;
942 qcom,msm-rng-iface-clk;
Hariprasad Dhalinarasimhae799fb72013-06-03 13:51:38 -0700943 qcom,msm-bus,name = "msm-rng-noc";
944 qcom,msm-bus,num-cases = <2>;
945 qcom,msm-bus,num-paths = <1>;
946 qcom,msm-bus,vectors-KBps =
Liam Fernandez9c08efa2013-11-07 15:06:26 -0800947 <54 618 0 0>,
948 <54 618 0 800>;
Hariprasad Dhalinarasimhac8e0f312013-04-13 17:18:50 -0700949 };
950
Aparna Das2948da92013-04-25 10:11:15 -0700951 qcom,msm-rtb {
952 compatible = "qcom,msm-rtb";
953 qcom,memory-reservation-type = "EBI1";
954 qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
955 };
956
Pratik Patel3a2f0922013-06-13 23:52:05 -0700957 jtag_fuse: jtagfuse@fc4be024 {
958 compatible = "qcom,jtag-fuse";
959 reg = <0xfc4be024 0x8>;
960 reg-names = "fuse-base";
961 };
962
Aparna Dase7cab2e2013-04-16 16:54:47 -0700963 jtag_mm0: jtagmm@fc34c000 {
964 compatible = "qcom,jtag-mm";
965 reg = <0xfc34c000 0x1000>,
966 <0xfc340000 0x1000>;
967 reg-names = "etm-base","debug-base";
968 };
969
970 jtag_mm1: jtagmm@fc34d000 {
971 compatible = "qcom,jtag-mm";
972 reg = <0xfc34d000 0x1000>,
973 <0xfc342000 0x1000>;
974 reg-names = "etm-base","debug-base";
975 };
976
977 jtag_mm2: jtagmm@fc34e000 {
978 compatible = "qcom,jtag-mm";
979 reg = <0xfc34e000 0x1000>,
980 <0xfc344000 0x1000>;
981 reg-names = "etm-base","debug-base";
982 };
983
984 jtag_mm3: jtagmm@fc34f000 {
985 compatible = "qcom,jtag-mm";
986 reg = <0xfc34f000 0x1000>,
987 <0xfc346000 0x1000>;
988 reg-names = "etm-base","debug-base";
989 };
Hariprasad Dhalinarasimha9d3638a2013-04-13 22:42:11 -0700990
991 qcom,tz-log@fe805720 {
992 compatible = "qcom,tz-log";
993 reg = <0x0fe805720 0x1000>;
994 };
Hariprasad Dhalinarasimha30af29a2013-05-07 17:48:04 -0700995
996 qcom,qcrypto@fd404000 {
997 compatible = "qcom,qcrypto";
998 reg = <0xfd400000 0x20000>,
999 <0xfd404000 0x8000>;
1000 reg-names = "crypto-base","crypto-bam-base";
1001 interrupts = <0 207 0>;
1002 qcom,bam-pipe-pair = <2>;
1003 qcom,ce-hw-instance = <1>;
1004 qcom,ce-hw-shared;
1005 qcom,msm-bus,name = "qcrypto-noc";
1006 qcom,msm-bus,num-cases = <2>;
1007 qcom,msm-bus,active-only = <0>;
1008 qcom,msm-bus,num-paths = <1>;
1009 qcom,msm-bus,vectors-KBps =
1010 <55 512 0 0>,
1011 <55 512 393600 3936000>;
1012 };
1013
1014 qcom,qcedev@fd400000 {
1015 compatible = "qcom,qcedev";
1016 reg = <0xfd400000 0x20000>,
1017 <0xfd404000 0x8000>;
1018 reg-names = "crypto-base","crypto-bam-base";
1019 interrupts = <0 207 0>;
1020 qcom,bam-pipe-pair = <1>;
1021 qcom,ce-hw-instance = <1>;
1022 qcom,ce-hw-shared;
1023 qcom,msm-bus,name = "qcedev-noc";
1024 qcom,msm-bus,num-cases = <2>;
1025 qcom,msm-bus,active-only = <0>;
1026 qcom,msm-bus,num-paths = <1>;
1027 qcom,msm-bus,vectors-KBps =
1028 <55 512 0 0>,
1029 <55 512 393600 3936000>;
1030 };
1031
Neil Leeder23b9fa42013-07-11 09:23:45 -04001032 cpu-pmu {
1033 compatible = "arm,cortex-a7-pmu";
1034 qcom,irq-is-percpu;
1035 interrupts = <1 7 0xf00>;
1036 };
Syed Rameez Mustafad3935822012-10-09 11:23:20 -07001037};
David Collinsc6b34832012-10-24 12:57:57 -07001038
Matt Wagantall1bf56932012-11-29 15:03:29 -08001039&gdsc_vfe {
Matt Wagantall831f0ff2013-08-16 13:29:55 -07001040 qcom,clock-names = "core_clk", "iface_clk", "bus_clk";
Matt Wagantall1bf56932012-11-29 15:03:29 -08001041 status = "ok";
1042};
1043
1044&gdsc_oxili_cx {
Matt Wagantallde70dbb2013-07-03 21:07:09 -07001045 qcom,clock-names = "core_clk", "iface_clk", "mem_clk";
Matt Wagantall1bf56932012-11-29 15:03:29 -08001046 status = "ok";
1047};
1048
Olav Haugan9c255522012-11-16 16:43:17 -08001049&lpass_iommu {
1050 status = "ok";
1051};
1052
1053&copss_iommu {
1054 status = "ok";
1055};
1056
1057&mdpe_iommu {
1058 status = "ok";
1059};
1060
1061&mdps_iommu {
1062 status = "ok";
1063};
1064
1065&gfx_iommu {
1066 status = "ok";
1067};
1068
1069&vfe_iommu {
1070 status = "ok";
1071};
1072
Syed Rameez Mustafa3971c142013-01-09 19:04:53 -08001073/include/ "msm8610-iommu-domains.dtsi"
Olav Haugan4bc4b692012-12-10 18:29:35 -08001074
Xiaozhe Shi350baa92013-04-09 18:13:50 -07001075/include/ "msm-pm8110-rpm-regulator.dtsi"
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -07001076/include/ "msm-pm8110.dtsi"
Xiaozhe Shi1581a7b2013-02-21 15:17:57 -08001077/include/ "msm8610-regulator.dtsi"
Siddartha Mohanadoss0f664a82013-03-11 22:52:01 -07001078
1079&pm8110_vadc {
1080 chan@0 {
1081 label = "usb_in";
1082 reg = <0>;
1083 qcom,decimation = <0>;
1084 qcom,pre-div-channel-scaling = <4>;
1085 qcom,calibration-type = "absolute";
1086 qcom,scale-function = <0>;
1087 qcom,hw-settle-time = <0>;
1088 qcom,fast-avg-setup = <0>;
1089 };
1090
1091 chan@2 {
1092 label = "vchg_sns";
1093 reg = <2>;
1094 qcom,decimation = <0>;
Dipen Parmare548fd12014-01-19 23:15:14 +05301095 qcom,pre-div-channel-scaling = <5>;
Siddartha Mohanadoss0f664a82013-03-11 22:52:01 -07001096 qcom,calibration-type = "absolute";
1097 qcom,scale-function = <0>;
1098 qcom,hw-settle-time = <0>;
1099 qcom,fast-avg-setup = <0>;
1100 };
1101
1102 chan@5 {
1103 label = "vcoin";
1104 reg = <5>;
1105 qcom,decimation = <0>;
1106 qcom,pre-div-channel-scaling = <1>;
1107 qcom,calibration-type = "absolute";
1108 qcom,scale-function = <0>;
1109 qcom,hw-settle-time = <0>;
1110 qcom,fast-avg-setup = <0>;
1111 };
1112
1113 chan@6 {
1114 label = "vbat_sns";
1115 reg = <6>;
1116 qcom,decimation = <0>;
1117 qcom,pre-div-channel-scaling = <1>;
1118 qcom,calibration-type = "absolute";
1119 qcom,scale-function = <0>;
1120 qcom,hw-settle-time = <0>;
1121 qcom,fast-avg-setup = <0>;
1122 };
1123
1124 chan@7 {
1125 label = "vph_pwr";
1126 reg = <7>;
1127 qcom,decimation = <0>;
1128 qcom,pre-div-channel-scaling = <1>;
1129 qcom,calibration-type = "absolute";
1130 qcom,scale-function = <0>;
1131 qcom,hw-settle-time = <0>;
1132 qcom,fast-avg-setup = <0>;
1133 };
1134
1135 chan@30 {
1136 label = "batt_therm";
1137 reg = <0x30>;
1138 qcom,decimation = <0>;
1139 qcom,pre-div-channel-scaling = <0>;
1140 qcom,calibration-type = "ratiometric";
1141 qcom,scale-function = <1>;
1142 qcom,hw-settle-time = <2>;
1143 qcom,fast-avg-setup = <0>;
1144 };
1145
1146 chan@31 {
1147 label = "batt_id";
1148 reg = <0x31>;
1149 qcom,decimation = <0>;
1150 qcom,pre-div-channel-scaling = <0>;
1151 qcom,calibration-type = "ratiometric";
1152 qcom,scale-function = <0>;
1153 qcom,hw-settle-time = <2>;
1154 qcom,fast-avg-setup = <0>;
1155 };
1156
1157 chan@b2 {
1158 label = "xo_therm_pu2";
1159 reg = <0xb2>;
1160 qcom,decimation = <0>;
1161 qcom,pre-div-channel-scaling = <0>;
1162 qcom,calibration-type = "ratiometric";
1163 qcom,scale-function = <4>;
1164 qcom,hw-settle-time = <2>;
1165 qcom,fast-avg-setup = <0>;
1166 };
Siddartha Mohanadoss984b11e2013-05-31 18:05:51 -07001167
1168 chan@13 {
1169 label = "pa_therm0";
1170 reg = <0x13>;
1171 qcom,decimation = <0>;
1172 qcom,pre-div-channel-scaling = <0>;
1173 qcom,calibration-type = "ratiometric";
1174 qcom,scale-function = <2>;
1175 qcom,hw-settle-time = <2>;
1176 qcom,fast-avg-setup = <0>;
1177 };
Siddartha Mohanadoss0f664a82013-03-11 22:52:01 -07001178};
1179
Siddartha Mohanadoss236e0952013-05-13 10:40:26 -07001180&pm8110_adc_tm {
1181 /* Channel Node */
1182 chan@30 {
1183 label = "batt_therm";
1184 reg = <0x30>;
1185 qcom,decimation = <0>;
1186 qcom,pre-div-channel-scaling = <0>;
1187 qcom,calibration-type = "ratiometric";
1188 qcom,scale-function = <1>;
1189 qcom,hw-settle-time = <2>;
1190 qcom,fast-avg-setup = <3>;
1191 qcom,btm-channel-number = <0x48>;
Siddartha Mohanadoss58ffe0e2014-02-11 17:40:13 -08001192 qcom,meas-interval-timer-idx = <2>;
Siddartha Mohanadoss236e0952013-05-13 10:40:26 -07001193 };
Siddartha Mohanadoss0f664a82013-03-11 22:52:01 -07001194
Siddartha Mohanadoss236e0952013-05-13 10:40:26 -07001195 chan@8 {
1196 label = "die_temp";
1197 reg = <8>;
1198 qcom,decimation = <0>;
1199 qcom,pre-div-channel-scaling = <0>;
1200 qcom,calibration-type = "absolute";
1201 qcom,scale-function = <3>;
1202 qcom,hw-settle-time = <0>;
1203 qcom,fast-avg-setup = <3>;
1204 qcom,btm-channel-number = <0x68>;
1205 };
1206
1207 chan@6 {
1208 label = "vbat_sns";
1209 reg = <6>;
1210 qcom,decimation = <0>;
1211 qcom,pre-div-channel-scaling = <1>;
1212 qcom,calibration-type = "absolute";
1213 qcom,scale-function = <0>;
1214 qcom,hw-settle-time = <0>;
1215 qcom,fast-avg-setup = <3>;
1216 qcom,btm-channel-number = <0x70>;
1217 };
Siddartha Mohanadoss984b11e2013-05-31 18:05:51 -07001218
1219 chan@13 {
1220 label = "pa_therm0";
1221 reg = <0x13>;
1222 qcom,decimation = <0>;
1223 qcom,pre-div-channel-scaling = <0>;
1224 qcom,calibration-type = "ratiometric";
1225 qcom,scale-function = <2>;
1226 qcom,hw-settle-time = <2>;
1227 qcom,fast-avg-setup = <0>;
1228 qcom,btm-channel-number = <0x78>;
1229 qcom,thermal-node;
1230 };
Siddartha Mohanadoss236e0952013-05-13 10:40:26 -07001231};