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gerrit-public.fairphone.software / fp2-dev / kernel / msm / 6aeaad51aaecc9ebc8c1e8f132655e2ae8141f8c / . / arch / arm / mach-s5pc100 / include / mach / map.h
blob: 88009549ab28fbf94607da59dbf528b9c5c1c307 [file] [log] [blame]
Byungho Minff54b452009-06-23 21:39:49 +0900[diff] [blame]1/* linux/arch/arm/mach-s5pc100/include/mach/map.h
2 *
3 * Copyright 2009 Samsung Electronics Co.
4 * Byungho Min <bhmin@samsung.com>
5 *
Marek Szyprowskiacc84702010-05-20 07:51:08 +0200[diff] [blame]6 * S5PC100 - Memory map definitions
Byungho Minff54b452009-06-23 21:39:49 +0900[diff] [blame]7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_MAP_H
14#define __ASM_ARCH_MAP_H __FILE__
15
16#include <plat/map-base.h>
Marek Szyprowskiacc84702010-05-20 07:51:08 +0200[diff] [blame]17#include <plat/map-s5p.h>
Byungho Minff54b452009-06-23 21:39:49 +0900[diff] [blame]18
Byungho Minff54b452009-06-23 21:39:49 +0900[diff] [blame]19#define S5PC100_PA_CHIPID (0xE0000000)
Marek Szyprowskiacc84702010-05-20 07:51:08 +0200[diff] [blame]20#define S5P_PA_CHIPID S5PC100_PA_CHIPID
Byungho Minff54b452009-06-23 21:39:49 +0900[diff] [blame]21
Marek Szyprowskiacc84702010-05-20 07:51:08 +0200[diff] [blame]22#define S5PC100_PA_SYSCON (0xE0100000)
23#define S5P_PA_SYSCON S5PC100_PA_SYSCON
Kyungmin Parkb0cc3032009-11-17 08:41:11 +0100[diff] [blame]24
Marek Szyprowskiacc84702010-05-20 07:51:08 +0200[diff] [blame]25#define S5PC100_PA_OTHERS (0xE0200000)
26#define S5PC100_VA_OTHERS (S3C_VA_SYS + 0x10000)
27
Kyungmin Parkb0cc3032009-11-17 08:41:11 +0100[diff] [blame]28#define S5PC100_PA_GPIO (0xE0300000)
Marek Szyprowskiacc84702010-05-20 07:51:08 +0200[diff] [blame]29#define S5P_PA_GPIO S5PC100_PA_GPIO
Byungho Minff54b452009-06-23 21:39:49 +0900[diff] [blame]30
Marek Szyprowskiacc84702010-05-20 07:51:08 +0200[diff] [blame]31#define S5PC100_PA_VIC0 (0xE4000000)
32#define S5P_PA_VIC0 S5PC100_PA_VIC0
Byungho Minff54b452009-06-23 21:39:49 +0900[diff] [blame]33
Marek Szyprowskiacc84702010-05-20 07:51:08 +0200[diff] [blame]34#define S5PC100_PA_VIC1 (0xE4100000)
35#define S5P_PA_VIC1 S5PC100_PA_VIC1
Kyungmin Parkb0cc3032009-11-17 08:41:11 +0100[diff] [blame]36
Marek Szyprowskiacc84702010-05-20 07:51:08 +0200[diff] [blame]37#define S5PC100_PA_VIC2 (0xE4200000)
38#define S5P_PA_VIC2 S5PC100_PA_VIC2
39
Byungho Minff54b452009-06-23 21:39:49 +0900[diff] [blame]40#define S5PC100_PA_TIMER (0xEA000000)
Marek Szyprowskiacc84702010-05-20 07:51:08 +0200[diff] [blame]41#define S5P_PA_TIMER S5PC100_PA_TIMER
Byungho Minff54b452009-06-23 21:39:49 +0900[diff] [blame]42
Marek Szyprowskiacc84702010-05-20 07:51:08 +0200[diff] [blame]43#define S5PC100_PA_SYSTIMER (0xEA100000)
Kyungmin Parkb0cc3032009-11-17 08:41:11 +0100[diff] [blame]44
Byungho Minff54b452009-06-23 21:39:49 +0900[diff] [blame]45#define S5PC100_PA_UART (0xEC000000)
Byungho Minff54b452009-06-23 21:39:49 +0900[diff] [blame]46
Marek Szyprowskiacc84702010-05-20 07:51:08 +0200[diff] [blame]47#define S5P_PA_UART0 (S5PC100_PA_UART + 0x0)
48#define S5P_PA_UART1 (S5PC100_PA_UART + 0x400)
49#define S5P_PA_UART2 (S5PC100_PA_UART + 0x800)
50#define S5P_PA_UART3 (S5PC100_PA_UART + 0xC00)
51#define S5P_SZ_UART SZ_256
Kyungmin Parkb0cc3032009-11-17 08:41:11 +0100[diff] [blame]52
Marek Szyprowskiacc84702010-05-20 07:51:08 +0200[diff] [blame]53#define S5PC100_PA_IIC0 (0xEC100000)
54#define S5PC100_PA_IIC1 (0xEC200000)
Kyungmin Parkb0cc3032009-11-17 08:41:11 +0100[diff] [blame]55
Jassi Brar7c3943f2010-05-18 16:43:34 +0900[diff] [blame]56/* SPI */
57#define S5PC100_PA_SPI0 0xEC300000
58#define S5PC100_PA_SPI1 0xEC400000
59#define S5PC100_PA_SPI2 0xEC500000
60
Kyungmin Parkb0cc3032009-11-17 08:41:11 +0100[diff] [blame]61/* USB HS OTG */
62#define S5PC100_PA_USB_HSOTG (0xED200000)
63#define S5PC100_PA_USB_HSPHY (0xED300000)
64
Kyungmin Parkb0cc3032009-11-17 08:41:11 +0100[diff] [blame]65#define S5PC100_PA_FB (0xEE000000)
66
Jassi Brar9e4ed5c32010-05-18 16:02:39 +0900[diff] [blame]67#define S5PC100_PA_AC97 0xF2300000
68
69/* PCM */
70#define S5PC100_PA_PCM0 0xF2400000
71#define S5PC100_PA_PCM1 0xF2500000
72
Kyungmin Parkb0cc3032009-11-17 08:41:11 +0100[diff] [blame]73/* KEYPAD */
74#define S5PC100_PA_KEYPAD (0xF3100000)
75
Marek Szyprowskiacc84702010-05-20 07:51:08 +0200[diff] [blame]76#define S5PC100_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000))
Kyungmin Parkb0cc3032009-11-17 08:41:11 +0100[diff] [blame]77
Byungho Minff54b452009-06-23 21:39:49 +0900[diff] [blame]78#define S5PC100_PA_SDRAM (0x20000000)
Marek Szyprowskiacc84702010-05-20 07:51:08 +0200[diff] [blame]79#define S5P_PA_SDRAM S5PC100_PA_SDRAM
Byungho Minff54b452009-06-23 21:39:49 +0900[diff] [blame]80
Marek Szyprowskiacc84702010-05-20 07:51:08 +0200[diff] [blame]81/* compatibiltiy defines. */
Byungho Minff54b452009-06-23 21:39:49 +0900[diff] [blame]82#define S3C_PA_UART S5PC100_PA_UART
Marek Szyprowskiacc84702010-05-20 07:51:08 +0200[diff] [blame]83#define S3C_PA_IIC S5PC100_PA_IIC0
84#define S3C_PA_IIC1 S5PC100_PA_IIC1
Kyungmin Parkb0cc3032009-11-17 08:41:11 +0100[diff] [blame]85#define S3C_PA_FB S5PC100_PA_FB
Marek Szyprowskiacc84702010-05-20 07:51:08 +0200[diff] [blame]86#define S3C_PA_HSMMC0 S5PC100_PA_HSMMC(0)
87#define S3C_PA_HSMMC1 S5PC100_PA_HSMMC(1)
88#define S3C_PA_HSMMC2 S5PC100_PA_HSMMC(2)
Byungho Minff54b452009-06-23 21:39:49 +0900[diff] [blame]89
Marek Szyprowskiacc84702010-05-20 07:51:08 +0200[diff] [blame]90#endif /* __ASM_ARCH_MAP_H */