blob: cf923477f5bd42b2c4755cf71c05939fd5968f14 [file] [log] [blame]
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -07001/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13#include <linux/kernel.h>
14#include <linux/platform_device.h>
Harini Jayaramaneba52672011-09-08 15:13:00 -060015#include <linux/i2c.h>
Kenneth Heitkeaf3d3cf2011-09-08 11:45:31 -070016#include <linux/msm_ssbi.h>
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -070017#include <asm/mach-types.h>
18#include <asm/mach/arch.h>
Krishna Kondadd794462011-10-01 00:19:29 -070019#include <asm/mach/mmc.h>
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -070020#include <mach/board.h>
21#include <mach/msm_iomap.h>
22#include <mach/gpio.h>
23#include <mach/gpiomux.h>
Harini Jayaraman738c9312011-09-08 15:22:38 -060024#include <mach/msm_spi.h>
Amit Blay5e4ec192011-10-20 09:16:54 +020025#include <linux/usb/android.h>
26#include <linux/usb/msm_hsusb.h>
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -070027#include "timer.h"
28#include "devices.h"
David Collinsfb88c432011-08-25 15:12:47 -070029#include "board-9615.h"
Maheshkumar Sivasubramanian4923db22011-09-15 09:28:15 -060030#include "cpuidle.h"
31#include "pm.h"
Vikram Mulukutlab5e1cda2011-10-04 16:17:22 -070032#include "acpuclock.h"
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -070033
David Collinsfb88c432011-08-25 15:12:47 -070034static struct pm8xxx_irq_platform_data pm8xxx_irq_pdata __devinitdata = {
35 .irq_base = PM8018_IRQ_BASE,
36 .devirq = MSM_GPIO_TO_INT(87),
37 .irq_trigger_flag = IRQF_TRIGGER_LOW,
38};
39
40static struct pm8xxx_gpio_platform_data pm8xxx_gpio_pdata __devinitdata = {
41 .gpio_base = PM8018_GPIO_PM_TO_SYS(1),
42};
43
44static struct pm8xxx_mpp_platform_data pm8xxx_mpp_pdata __devinitdata = {
45 .mpp_base = PM8018_MPP_PM_TO_SYS(1),
46};
47
48static struct pm8xxx_rtc_platform_data pm8xxx_rtc_pdata __devinitdata = {
49 .rtc_write_enable = false,
Ashay Jaiswaldb5e6dc2011-10-12 11:02:47 +053050 .rtc_alarm_powerup = false,
David Collinsfb88c432011-08-25 15:12:47 -070051};
52
53static struct pm8xxx_pwrkey_platform_data pm8xxx_pwrkey_pdata = {
54 .pull_up = 1,
55 .kpd_trigger_delay_us = 970,
56 .wakeup = 1,
57};
58
59static struct pm8xxx_misc_platform_data pm8xxx_misc_pdata = {
60 .priority = 0,
61};
62
63static struct pm8018_platform_data pm8018_platform_data __devinitdata = {
64 .irq_pdata = &pm8xxx_irq_pdata,
65 .gpio_pdata = &pm8xxx_gpio_pdata,
66 .mpp_pdata = &pm8xxx_mpp_pdata,
67 .rtc_pdata = &pm8xxx_rtc_pdata,
68 .pwrkey_pdata = &pm8xxx_pwrkey_pdata,
69 .misc_pdata = &pm8xxx_misc_pdata,
David Collins00b31e62011-08-31 20:00:10 -070070 .regulator_pdatas = msm_pm8018_regulator_pdata,
David Collinsfb88c432011-08-25 15:12:47 -070071};
72
Kenneth Heitkeaf3d3cf2011-09-08 11:45:31 -070073static struct msm_ssbi_platform_data msm9615_ssbi_pm8018_pdata __devinitdata = {
74 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
75 .slave = {
David Collinsfb88c432011-08-25 15:12:47 -070076 .name = PM8018_CORE_DEV_NAME,
77 .platform_data = &pm8018_platform_data,
Kenneth Heitkeaf3d3cf2011-09-08 11:45:31 -070078 },
79};
80
David Collinsbea297a2011-09-28 13:11:14 -070081static struct platform_device msm9615_device_rpm_regulator __devinitdata = {
82 .name = "rpm-regulator",
83 .id = -1,
84 .dev = {
85 .platform_data = &msm_rpm_regulator_9615_pdata,
86 },
87};
88
Rohit Vaswanif688fa62011-10-13 18:13:10 -070089static struct gpiomux_setting ps_hold = {
90 .func = GPIOMUX_FUNC_1,
91 .drv = GPIOMUX_DRV_8MA,
92 .pull = GPIOMUX_PULL_NONE,
93};
94
Rohit Vaswani09666872011-08-23 17:41:54 -070095static struct gpiomux_setting gsbi4 = {
96 .func = GPIOMUX_FUNC_1,
97 .drv = GPIOMUX_DRV_8MA,
98 .pull = GPIOMUX_PULL_NONE,
99};
100
Harini Jayaramaneba52672011-09-08 15:13:00 -0600101static struct gpiomux_setting gsbi5 = {
102 .func = GPIOMUX_FUNC_1,
103 .drv = GPIOMUX_DRV_8MA,
104 .pull = GPIOMUX_PULL_NONE,
105};
106
Harini Jayaraman738c9312011-09-08 15:22:38 -0600107static struct gpiomux_setting gsbi3 = {
108 .func = GPIOMUX_FUNC_1,
109 .drv = GPIOMUX_DRV_8MA,
110 .pull = GPIOMUX_PULL_NONE,
111};
112
113static struct gpiomux_setting gsbi3_cs1_config = {
114 .func = GPIOMUX_FUNC_4,
115 .drv = GPIOMUX_DRV_8MA,
116 .pull = GPIOMUX_PULL_NONE,
117};
118
Rohit Vaswanif688fa62011-10-13 18:13:10 -0700119struct msm_gpiomux_config msm9615_ps_hold_config[] __initdata = {
120 {
121 .gpio = 83,
122 .settings = {
123 [GPIOMUX_SUSPENDED] = &ps_hold,
124 },
125 },
126};
127
Rohit Vaswani09666872011-08-23 17:41:54 -0700128struct msm_gpiomux_config msm9615_gsbi_configs[] __initdata = {
129 {
Harini Jayaraman738c9312011-09-08 15:22:38 -0600130 .gpio = 8, /* GSBI3 QUP SPI_CLK */
131 .settings = {
132 [GPIOMUX_SUSPENDED] = &gsbi3,
133 },
134 },
135 {
136 .gpio = 9, /* GSBI3 QUP SPI_CS_N */
137 .settings = {
138 [GPIOMUX_SUSPENDED] = &gsbi3,
139 },
140 },
141 {
142 .gpio = 10, /* GSBI3 QUP SPI_DATA_MISO */
143 .settings = {
144 [GPIOMUX_SUSPENDED] = &gsbi3,
145 },
146 },
147 {
148 .gpio = 11, /* GSBI3 QUP SPI_DATA_MOSI */
149 .settings = {
150 [GPIOMUX_SUSPENDED] = &gsbi3,
151 },
152 },
153 {
Rohit Vaswani09666872011-08-23 17:41:54 -0700154 .gpio = 12, /* GSBI4 UART */
155 .settings = {
156 [GPIOMUX_SUSPENDED] = &gsbi4,
157 },
158 },
159 {
160 .gpio = 13, /* GSBI4 UART */
161 .settings = {
162 [GPIOMUX_SUSPENDED] = &gsbi4,
163 },
164 },
165 {
166 .gpio = 14, /* GSBI4 UART */
167 .settings = {
168 [GPIOMUX_SUSPENDED] = &gsbi4,
169 },
170 },
171 {
172 .gpio = 15, /* GSBI4 UART */
173 .settings = {
174 [GPIOMUX_SUSPENDED] = &gsbi4,
175 },
176 },
Harini Jayaramaneba52672011-09-08 15:13:00 -0600177 {
178 .gpio = 16, /* GSBI5 I2C QUP SCL */
179 .settings = {
180 [GPIOMUX_SUSPENDED] = &gsbi5,
181 },
182 },
183 {
184 .gpio = 17, /* GSBI5 I2C QUP SDA */
185 .settings = {
186 [GPIOMUX_SUSPENDED] = &gsbi5,
187 },
188 },
Harini Jayaraman738c9312011-09-08 15:22:38 -0600189 {
190 /* GPIO 19 can be used for I2C/UART on GSBI5 */
191 .gpio = 19, /* GSBI3 QUP SPI_CS_1 */
192 .settings = {
193 [GPIOMUX_SUSPENDED] = &gsbi3_cs1_config,
194 },
195 },
Rohit Vaswani09666872011-08-23 17:41:54 -0700196};
197
Krishna Kondadd794462011-10-01 00:19:29 -0700198#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
199 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT))
200
Krishna Konda7186bfe2011-10-17 15:36:54 -0700201#define GPIO_SDCARD_PWR_EN 18
202#define GPIO_SDC1_HW_DET 80
Krishna Kondadd794462011-10-01 00:19:29 -0700203
204/* MDM9x15 have 2 SDCC controllers */
205enum sdcc_controllers {
206 SDCC1,
207 SDCC2,
208 MAX_SDCC_CONTROLLER
209};
210
211#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
212/* SDC1 pad data */
213static struct msm_mmc_pad_drv sdc1_pad_drv_on_cfg[] = {
214 {TLMM_HDRV_SDC1_CLK, GPIO_CFG_16MA},
215 {TLMM_HDRV_SDC1_CMD, GPIO_CFG_10MA},
216 {TLMM_HDRV_SDC1_DATA, GPIO_CFG_10MA}
217};
218
219static struct msm_mmc_pad_drv sdc1_pad_drv_off_cfg[] = {
220 {TLMM_HDRV_SDC1_CLK, GPIO_CFG_2MA},
221 {TLMM_HDRV_SDC1_CMD, GPIO_CFG_2MA},
222 {TLMM_HDRV_SDC1_DATA, GPIO_CFG_2MA}
223};
224
225static struct msm_mmc_pad_pull sdc1_pad_pull_on_cfg[] = {
226 {TLMM_PULL_SDC1_CLK, GPIO_CFG_NO_PULL},
227 {TLMM_PULL_SDC1_CMD, GPIO_CFG_PULL_UP},
228 {TLMM_PULL_SDC1_DATA, GPIO_CFG_PULL_UP}
229};
230
231static struct msm_mmc_pad_pull sdc1_pad_pull_off_cfg[] = {
232 {TLMM_PULL_SDC1_CLK, GPIO_CFG_NO_PULL},
233 {TLMM_PULL_SDC1_CMD, GPIO_CFG_PULL_DOWN},
234 {TLMM_PULL_SDC1_DATA, GPIO_CFG_PULL_DOWN}
235};
236
237static struct msm_mmc_pad_pull_data mmc_pad_pull_data[MAX_SDCC_CONTROLLER] = {
238 [SDCC1] = {
239 .on = sdc1_pad_pull_on_cfg,
240 .off = sdc1_pad_pull_off_cfg,
241 .size = ARRAY_SIZE(sdc1_pad_pull_on_cfg)
242 },
243};
244
245static struct msm_mmc_pad_drv_data mmc_pad_drv_data[MAX_SDCC_CONTROLLER] = {
246 [SDCC1] = {
247 .on = sdc1_pad_drv_on_cfg,
248 .off = sdc1_pad_drv_off_cfg,
249 .size = ARRAY_SIZE(sdc1_pad_drv_on_cfg)
250 },
251};
252
253static struct msm_mmc_pad_data mmc_pad_data[MAX_SDCC_CONTROLLER] = {
254 [SDCC1] = {
255 .pull = &mmc_pad_pull_data[SDCC1],
256 .drv = &mmc_pad_drv_data[SDCC1]
257 },
258};
259#endif
260
Krishna Konda71aef182011-10-01 02:27:51 -0700261#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
262static struct gpiomux_setting sdcc2_clk_actv_cfg = {
263 .func = GPIOMUX_FUNC_1,
264 .drv = GPIOMUX_DRV_16MA,
265 .pull = GPIOMUX_PULL_NONE,
266};
267
268static struct gpiomux_setting sdcc2_cmd_data_0_3_actv_cfg = {
269 .func = GPIOMUX_FUNC_1,
270 .drv = GPIOMUX_DRV_8MA,
271 .pull = GPIOMUX_PULL_UP,
272};
273
274static struct gpiomux_setting sdcc2_suspend_cfg = {
275 .func = GPIOMUX_FUNC_1,
276 .drv = GPIOMUX_DRV_2MA,
277 .pull = GPIOMUX_PULL_DOWN,
278};
279
280static struct msm_gpiomux_config msm9615_sdcc2_configs[] __initdata = {
281 {
282 /* SDC2_DATA_0 */
283 .gpio = 25,
284 .settings = {
285 [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
286 [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
287 },
288 },
289 {
290 /* SDC2_DATA_1 */
291 .gpio = 26,
292 .settings = {
293 [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
294 [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
295 },
296 },
297 {
298 /* SDC2_DATA_2 */
299 .gpio = 27,
300 .settings = {
301 [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
302 [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
303 },
304 },
305 {
306 /* SDC2_DATA_3 */
307 .gpio = 28,
308 .settings = {
309 [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
310 [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
311 },
312 },
313 {
314 /* SDC2_CMD GSBI1 */
315 .gpio = 29,
316 .settings = {
317 [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
318 [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
319 },
320 },
321 {
322 /* SDC2_CLK GSBI1 */
323 .gpio = 30,
324 .settings = {
325 [GPIOMUX_ACTIVE] = &sdcc2_clk_actv_cfg,
326 [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
327 },
328 },
329};
330
331static struct msm_mmc_gpio sdc2_gpio_cfg[] = {
332 {25, "sdc2_dat_0"},
333 {26, "sdc2_dat_1"},
334 {27, "sdc2_dat_2"},
335 {28, "sdc2_dat_3"},
336 {29, "sdc2_cmd"},
337 {30, "sdc2_clk"},
338};
339
340static struct msm_mmc_gpio_data mmc_gpio_data[MAX_SDCC_CONTROLLER] = {
341 [SDCC2] = {
342 .gpio = sdc2_gpio_cfg,
343 .size = ARRAY_SIZE(sdc2_gpio_cfg),
344 },
345};
346#else
347static struct msm_gpiomux_config msm9615_sdcc2_configs[0];
348#endif
349
350static struct msm_mmc_pin_data mmc_slot_pin_data[MAX_SDCC_CONTROLLER] = {
Krishna Kondadd794462011-10-01 00:19:29 -0700351#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
352 [SDCC1] = {
353 .is_gpio = 0,
354 .pad_data = &mmc_pad_data[SDCC1],
355 },
356#endif
Krishna Konda71aef182011-10-01 02:27:51 -0700357#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
358 [SDCC2] = {
359 .is_gpio = 1,
360 .gpio_data = &mmc_gpio_data[SDCC2],
361 },
362#endif
Krishna Kondadd794462011-10-01 00:19:29 -0700363};
364
365#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
366static unsigned int sdc1_sup_clk_rates[] = {
367 400000, 24000000, 48000000
368};
369
370static struct mmc_platform_data sdc1_data = {
371 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
372 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
373 .sup_clk_table = sdc1_sup_clk_rates,
374 .sup_clk_cnt = ARRAY_SIZE(sdc1_sup_clk_rates),
375 .sdcc_v4_sup = true,
376 .pin_data = &mmc_slot_pin_data[SDCC1],
Krishna Konda7186bfe2011-10-17 15:36:54 -0700377#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
378 .status_gpio = GPIO_SDC1_HW_DET,
379 .status_irq = MSM_GPIO_TO_INT(GPIO_SDC1_HW_DET),
380 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
381#endif
Krishna Kondadd794462011-10-01 00:19:29 -0700382};
383static struct mmc_platform_data *msm9615_sdc1_pdata = &sdc1_data;
384#else
385static struct mmc_platform_data *msm9615_sdc1_pdata;
386#endif
387
Krishna Konda71aef182011-10-01 02:27:51 -0700388#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
389static unsigned int sdc2_sup_clk_rates[] = {
390 400000, 24000000, 48000000
391};
392
393static struct mmc_platform_data sdc2_data = {
394 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
395 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
396 .sup_clk_table = sdc2_sup_clk_rates,
397 .sup_clk_cnt = ARRAY_SIZE(sdc2_sup_clk_rates),
398 .sdcc_v4_sup = true,
399 .pin_data = &mmc_slot_pin_data[SDCC2],
400};
401static struct mmc_platform_data *msm9615_sdc2_pdata = &sdc2_data;
402#else
403static struct mmc_platform_data *msm9615_sdc2_pdata;
404#endif
405
Krishna Kondadd794462011-10-01 00:19:29 -0700406static void __init msm9615_init_mmc(void)
407{
408 int ret;
409
410 if (msm9615_sdc1_pdata) {
411 ret = gpio_request(GPIO_SDCARD_PWR_EN, "SDCARD_PWR_EN");
412
413 if (ret) {
414 pr_err("%s: sdcc1: Error requesting GPIO "
415 "SDCARD_PWR_EN:%d\n", __func__, ret);
416 } else {
417 ret = gpio_direction_output(GPIO_SDCARD_PWR_EN, 1);
418 if (ret) {
419 pr_err("%s: sdcc1: Error setting o/p direction"
420 " for GPIO SDCARD_PWR_EN:%d\n",
421 __func__, ret);
422 gpio_free(GPIO_SDCARD_PWR_EN);
423 } else {
424 msm_add_sdcc(1, msm9615_sdc1_pdata);
425 }
426 }
427 }
Krishna Konda71aef182011-10-01 02:27:51 -0700428
429 if (msm9615_sdc2_pdata) {
430 msm_gpiomux_install(msm9615_sdcc2_configs,
431 ARRAY_SIZE(msm9615_sdcc2_configs));
432
433 /* SDC2: External card slot */
434 msm_add_sdcc(2, msm9615_sdc2_pdata);
435 }
Krishna Kondadd794462011-10-01 00:19:29 -0700436}
437#else
438static void __init msm9615_init_mmc(void) { }
439#endif
Maheshkumar Sivasubramanian4923db22011-09-15 09:28:15 -0600440static struct msm_cpuidle_state msm_cstates[] __initdata = {
441 {0, 0, "C0", "WFI",
442 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
443
444 {0, 1, "C1", "STANDALONE_POWER_COLLAPSE",
445 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
446
447 {0, 2, "C2", "POWER_COLLAPSE",
448 MSM_PM_SLEEP_MODE_POWER_COLLAPSE},
449};
450static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR] = {
451 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
452 .idle_supported = 1,
453 .suspend_supported = 1,
454 .idle_enabled = 0,
455 .suspend_enabled = 0,
456 },
457 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
458 .idle_supported = 1,
459 .suspend_supported = 1,
460 .idle_enabled = 0,
461 .suspend_enabled = 0,
462 },
463 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
464 .idle_supported = 1,
465 .suspend_supported = 1,
466 .idle_enabled = 1,
467 .suspend_enabled = 1,
468 },
469};
Krishna Kondadd794462011-10-01 00:19:29 -0700470
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -0700471static int __init gpiomux_init(void)
472{
473 int rc;
474
475 rc = msm_gpiomux_init(NR_GPIO_IRQS);
476 if (rc) {
477 pr_err(KERN_ERR "msm_gpiomux_init failed %d\n", rc);
478 return rc;
479 }
Rohit Vaswani09666872011-08-23 17:41:54 -0700480 msm_gpiomux_install(msm9615_gsbi_configs,
481 ARRAY_SIZE(msm9615_gsbi_configs));
482
Rohit Vaswanif688fa62011-10-13 18:13:10 -0700483 msm_gpiomux_install(msm9615_ps_hold_config,
484 ARRAY_SIZE(msm9615_ps_hold_config));
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -0700485 return 0;
486}
487
Harini Jayaraman738c9312011-09-08 15:22:38 -0600488static struct msm_spi_platform_data msm9615_qup_spi_gsbi3_pdata = {
489 .max_clock_speed = 24000000,
490};
491
Harini Jayaramaneba52672011-09-08 15:13:00 -0600492static struct msm_i2c_platform_data msm9615_i2c_qup_gsbi5_pdata = {
493 .clk_freq = 100000,
494 .src_clk_rate = 24000000,
495};
496
Amit Blay5e4ec192011-10-20 09:16:54 +0200497static struct msm_otg_platform_data msm_otg_pdata = {
498 .mode = USB_PERIPHERAL,
499 .otg_control = OTG_NO_CONTROL,
500 .phy_type = SNPS_28NM_INTEGRATED_PHY,
501 .pclk_src_name = "dfab_usb_hs_clk",
502};
503
504static int usb_diag_update_pid_and_serial_num(uint32_t pid, const char *snum)
505{
506 return 0;
507}
508
509static struct android_usb_platform_data android_usb_pdata = {
510 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
511};
512
513static struct platform_device android_usb_device = {
514 .name = "android_usb",
515 .id = -1,
516 .dev = {
517 .platform_data = &android_usb_pdata,
518 },
519};
520
521static struct platform_device *common_devices[] = {
522 &msm9615_device_dmov,
523 &msm_device_smd,
524 &msm_device_otg,
525 &msm_device_gadget_peripheral,
526 &android_usb_device,
527 &msm9615_device_uart_gsbi4,
528 &msm9615_device_ssbi_pmic1,
529 &msm9615_device_qup_i2c_gsbi5,
530 &msm9615_device_qup_spi_gsbi3,
531 &msm_device_sps,
532 &msm9615_device_tsens,
533 &msm_device_nand,
534 &msm_rpm_device,
535#ifdef CONFIG_HW_RANDOM_MSM
536 &msm_device_rng,
537#endif
538
539#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
540 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
Ramesh Masavarapuaa28b5b2011-10-21 10:26:03 -0700541 &msm9615_qcrypto_device,
Amit Blay5e4ec192011-10-20 09:16:54 +0200542#endif
543
544#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
545 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
Ramesh Masavarapuaa28b5b2011-10-21 10:26:03 -0700546 &msm9615_qcedev_device,
Amit Blay5e4ec192011-10-20 09:16:54 +0200547#endif
548};
549
Harini Jayaramaneba52672011-09-08 15:13:00 -0600550static void __init msm9615_i2c_init(void)
551{
552 msm9615_device_qup_i2c_gsbi5.dev.platform_data =
553 &msm9615_i2c_qup_gsbi5_pdata;
554}
555
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -0700556static void __init msm9615_common_init(void)
557{
558 msm9615_device_init();
559 gpiomux_init();
Harini Jayaramaneba52672011-09-08 15:13:00 -0600560 msm9615_i2c_init();
David Collins00b31e62011-08-31 20:00:10 -0700561 regulator_suppress_info_printing();
David Collinsbea297a2011-09-28 13:11:14 -0700562 platform_device_register(&msm9615_device_rpm_regulator);
Harini Jayaraman738c9312011-09-08 15:22:38 -0600563 msm9615_device_qup_spi_gsbi3.dev.platform_data =
564 &msm9615_qup_spi_gsbi3_pdata;
Kenneth Heitkeaf3d3cf2011-09-08 11:45:31 -0700565 msm9615_device_ssbi_pmic1.dev.platform_data =
566 &msm9615_ssbi_pm8018_pdata;
David Collins00b31e62011-08-31 20:00:10 -0700567 pm8018_platform_data.num_regulators = msm_pm8018_regulator_pdata_len;
Amit Blay5e4ec192011-10-20 09:16:54 +0200568
569 msm_device_otg.dev.platform_data = &msm_otg_pdata;
570 msm_device_gadget_peripheral.dev.parent = &msm_device_otg.dev;
Rohit Vaswani09666872011-08-23 17:41:54 -0700571 platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
Krishna Kondadd794462011-10-01 00:19:29 -0700572
Vikram Mulukutlab5e1cda2011-10-04 16:17:22 -0700573 msm_clock_init(&msm9615_clock_init_data);
574 acpuclk_init(&acpuclk_9615_soc_data);
575
Krishna Kondadd794462011-10-01 00:19:29 -0700576 msm9615_init_mmc();
Maheshkumar Sivasubramanian4923db22011-09-15 09:28:15 -0600577 msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
578 msm_pm_set_rpm_wakeup_irq(RPM_APCC_CPU0_WAKE_UP_IRQ);
579 msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
580 msm_pm_data);
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -0700581}
582
583static void __init msm9615_cdp_init(void)
584{
585 msm9615_common_init();
586}
587
588static void __init msm9615_mtp_init(void)
589{
590 msm9615_common_init();
591}
592
593MACHINE_START(MSM9615_CDP, "QCT MSM9615 CDP")
594 .map_io = msm9615_map_io,
595 .init_irq = msm9615_init_irq,
596 .timer = &msm_timer,
597 .init_machine = msm9615_cdp_init,
598MACHINE_END
599
600MACHINE_START(MSM9615_MTP, "QCT MSM9615 MTP")
601 .map_io = msm9615_map_io,
602 .init_irq = msm9615_init_irq,
603 .timer = &msm_timer,
604 .init_machine = msm9615_mtp_init,
605MACHINE_END