blob: 8b091c170559e1cf6a1a2c7d64b5823d81323917 [file] [log] [blame]
Xiaozhe Shifaa942c2013-02-21 10:52:03 -08001/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13&spmi_bus {
14 #address-cells = <1>;
15 #size-cells = <0>;
16 interrupt-controller;
17 #interrupt-cells = <3>;
Xiaozhe Shifaa942c2013-02-21 10:52:03 -080018
19 qcom,pm8110@0 {
20 spmi-slave-container;
21 reg = <0x0>;
22 #address-cells = <1>;
23 #size-cells = <1>;
Siddartha Mohanadoss0f664a82013-03-11 22:52:01 -070024
Amy Malochee4aaca22013-04-01 20:34:09 -070025 qcom,power-on@800 {
26 compatible = "qcom,qpnp-power-on";
27 reg = <0x800 0x100>;
28 interrupts = <0x0 0x8 0x0>,
29 <0x0 0x8 0x1>,
30 <0x0 0x8 0x4>;
31 interrupt-names = "kpdpwr", "resin", "resin-bark";
32 qcom,pon-dbc-delay = <15625>;
33 qcom,system-reset;
34
35 qcom,pon_1 {
36 qcom,pon-type = <0>;
37 qcom,pull-up = <1>;
38 linux,code = <116>;
39 };
40
41 qcom,pon_2 {
42 qcom,pon-type = <1>;
43 qcom,pull-up = <1>;
44 linux,code = <114>;
45 };
46 };
47
Xiaozhe Shif7d9daf2013-04-08 15:29:55 -070048 pm8110_chg: qcom,charger {
49 spmi-dev-container;
50 compatible = "qcom,qpnp-charger";
51 #address-cells = <1>;
52 #size-cells = <1>;
53 status = "disabled";
54
Xiaozhe Shi8bc042a2013-04-18 15:44:08 -070055 qcom,vddmax-mv = <4200>;
56 qcom,vddsafe-mv = <4200>;
57 qcom,vinmin-mv = <4200>;
58 qcom,vbatdet-mv = <4100>;
59 qcom,ibatmax-ma = <1500>;
60 qcom,ibatterm-ma = <200>;
61 qcom,ibatsafe-ma = <1500>;
62 qcom,thermal-mitigation = <1500 700 600 325>;
Xiaozhe Shi8b502bc2013-04-18 15:55:56 -070063 qcom,vbatdet-delta-mv = <350>;
64 qcom,tchg-mins = <150>;
Xiaozhe Shif7d9daf2013-04-08 15:29:55 -070065
Xiaozhe Shi8bc042a2013-04-18 15:44:08 -070066 qcom,chgr@1000 {
Xiaozhe Shif7d9daf2013-04-08 15:29:55 -070067 status = "disabled";
68 reg = <0x1000 0x100>;
69 interrupts = <0x0 0x10 0x0>,
70 <0x0 0x10 0x1>,
71 <0x0 0x10 0x2>,
72 <0x0 0x10 0x3>,
73 <0x0 0x10 0x4>,
74 <0x0 0x10 0x5>,
75 <0x0 0x10 0x6>,
76 <0x0 0x10 0x7>;
77
78 interrupt-names = "vbat-det-lo",
79 "vbat-det-hi",
80 "chgwdog",
81 "state-change",
82 "trkl-chg-on",
83 "fast-chg-on",
84 "chg-failed",
85 "chg-done";
86 };
87
Xiaozhe Shi8bc042a2013-04-18 15:44:08 -070088 qcom,buck@1100 {
Xiaozhe Shif7d9daf2013-04-08 15:29:55 -070089 status = "disabled";
90 reg = <0x1100 0x100>;
91 interrupts = <0x0 0x11 0x0>,
92 <0x0 0x11 0x1>,
93 <0x0 0x11 0x2>,
94 <0x0 0x11 0x3>,
95 <0x0 0x11 0x4>,
96 <0x0 0x11 0x5>,
97 <0x0 0x11 0x6>;
98
99 interrupt-names = "vbat-ov",
100 "vreg-ov",
101 "overtemp",
102 "vchg-loop",
103 "ichg-loop",
104 "ibat-loop",
105 "vdd-loop";
106 };
107
Xiaozhe Shi8bc042a2013-04-18 15:44:08 -0700108 qcom,bat-if@1200 {
Xiaozhe Shif7d9daf2013-04-08 15:29:55 -0700109 status = "disabled";
110 reg = <0x1200 0x100>;
111 interrupts = <0x0 0x12 0x0>,
112 <0x0 0x12 0x1>,
113 <0x0 0x12 0x2>,
114 <0x0 0x12 0x3>,
115 <0x0 0x12 0x4>;
116
117 interrupt-names = "batt-pres",
118 "bat-temp-ok",
119 "bat-fet-on",
120 "vcp-on",
121 "psi";
122 };
123
Xiaozhe Shi8bc042a2013-04-18 15:44:08 -0700124 qcom,usb-chgpth@1300 {
Xiaozhe Shif7d9daf2013-04-08 15:29:55 -0700125 status = "disabled";
126 reg = <0x1300 0x100>;
127 interrupts = <0 0x13 0x0>,
128 <0 0x13 0x1>,
129 <0x0 0x13 0x2>;
130
131 interrupt-names = "coarse-det-usb",
132 "usbin-valid",
133 "chg-gone";
134 };
135
136 qcom,chg-misc@1600 {
137 status = "disabled";
138 reg = <0x1600 0x100>;
139 };
140 };
141
Xiaozhe Shi67ba76b2013-04-18 18:20:05 -0700142 pm8110_gpios: gpios {
143 spmi-dev-container;
144 compatible = "qcom,qpnp-pin";
145 gpio-controller;
146 #gpio-cells = <2>;
147 #address-cells = <1>;
148 #size-cells = <1>;
149 label = "pm8110-gpio";
150
151 gpio@c000 {
152 reg = <0xc000 0x100>;
153 qcom,pin-num = <1>;
154 };
155
156 gpio@c100 {
157 reg = <0xc100 0x100>;
158 qcom,pin-num = <2>;
159 };
160
161 gpio@c200 {
162 reg = <0xc200 0x100>;
163 qcom,pin-num = <3>;
164 };
165
166 gpio@c300 {
167 reg = <0xc300 0x100>;
168 qcom,pin-num = <4>;
169 };
170 };
171
172 pm8110_mpps: mpps {
173 spmi-dev-container;
174 compatible = "qcom,qpnp-pin";
175 gpio-controller;
176 #gpio-cells = <2>;
177 #address-cells = <1>;
178 #size-cells = <1>;
179 label = "pm8110-mpp";
180
181 mpp@a000 {
182 reg = <0xa000 0x100>;
183 qcom,pin-num = <1>;
184 };
185
186 mpp@a100 {
187 reg = <0xa100 0x100>;
188 qcom,pin-num = <2>;
189 };
190
191 mpp@a200 {
192 reg = <0xa200 0x100>;
193 qcom,pin-num = <3>;
194 };
195
196 mpp@a300 {
197 reg = <0xa300 0x100>;
198 qcom,pin-num = <4>;
199 };
200 };
201
Siddartha Mohanadoss0f664a82013-03-11 22:52:01 -0700202 pm8110_vadc: vadc@3100 {
203 compatible = "qcom,qpnp-vadc";
204 reg = <0x3100 0x100>;
205 #address-cells = <1>;
206 #size-cells = <0>;
207 interrupts = <0x0 0x31 0x0>;
208 interrupt-names = "eoc-int-en-set";
209 qcom,adc-bit-resolution = <15>;
210 qcom,adc-vdd-reference = <1800>;
211
212 chan@8 {
213 label = "die_temp";
214 reg = <8>;
215 qcom,decimation = <0>;
216 qcom,pre-div-channel-scaling = <0>;
217 qcom,calibration-type = "absolute";
218 qcom,scale-function = <3>;
219 qcom,hw-settle-time = <0>;
220 qcom,fast-avg-setup = <0>;
221 };
222
223 chan@9 {
224 label = "ref_625mv";
225 reg = <9>;
226 qcom,decimation = <0>;
227 qcom,pre-div-channel-scaling = <0>;
228 qcom,calibration-type = "absolute";
229 qcom,scale-function = <0>;
230 qcom,hw-settle-time = <0>;
231 qcom,fast-avg-setup = <0>;
232 };
233
234 chan@a {
235 label = "ref_1250v";
236 reg = <0xa>;
237 qcom,decimation = <0>;
238 qcom,pre-div-channel-scaling = <0>;
239 qcom,calibration-type = "absolute";
240 qcom,scale-function = <0>;
241 qcom,hw-settle-time = <0>;
242 qcom,fast-avg-setup = <0>;
243 };
244 };
245
246 iadc@3600 {
247 compatible = "qcom,qpnp-iadc";
248 reg = <0x3600 0x100>;
249 #address-cells = <1>;
250 #size-cells = <0>;
251 interrupts = <0x0 0x36 0x0>;
252 interrupt-names = "eoc-int-en-set";
253 qcom,adc-bit-resolution = <16>;
254 qcom,adc-vdd-reference = <1800>;
Siddartha Mohanadoss0f664a82013-03-11 22:52:01 -0700255
256 chan@0 {
257 label = "internal_rsense";
258 reg = <0>;
259 qcom,decimation = <0>;
260 qcom,pre-div-channel-scaling = <1>;
261 qcom,calibration-type = "absolute";
262 qcom,scale-function = <0>;
263 qcom,hw-settle-time = <0>;
264 qcom,fast-avg-setup = <0>;
265 };
266 };
Ashay Jaiswalad1db362013-04-01 11:11:41 +0530267
Siddartha Mohanadoss236e0952013-05-13 10:40:26 -0700268 pm8110_adc_tm: vadc@3400 {
269 compatible = "qcom,qpnp-adc-tm";
270 reg = <0x3400 0x100>;
271 #address-cells = <1>;
272 #size-cells = <0>;
273 interrupts = <0x0 0x34 0x0>,
274 <0x0 0x34 0x3>,
275 <0x0 0x34 0x4>;
276 interrupt-names = "eoc-int-en-set",
277 "high-thr-en-set",
278 "low-thr-en-set";
279 qcom,adc-bit-resolution = <15>;
280 qcom,adc-vdd-reference = <1800>;
281 };
282
David Collins77996352013-05-20 14:27:51 -0700283 qcom,temp-alarm@2400 {
284 compatible = "qcom,qpnp-temp-alarm";
285 reg = <0x2400 0x100>;
286 interrupts = <0x0 0x24 0x0>;
287 label = "pm8110_tz";
288 qcom,channel-num = <8>;
289 qcom,threshold-set = <0>;
290 };
291
Xiaozhe Shi294c7e22013-04-17 14:59:15 -0700292 pm8110_bms: qcom,bms {
293 spmi-dev-container;
294 compatible = "qcom,qpnp-bms";
295 #address-cells = <1>;
296 #size-cells = <1>;
297 status = "disabled";
298
299 qcom,r-sense-uohm = <10000>;
300 qcom,v-cutoff-uv = <3400000>;
301 qcom,max-voltage-uv = <4200000>;
302 qcom,r-conn-mohm = <0>;
303 qcom,shutdown-soc-valid-limit = <20>;
304 qcom,adjust-soc-low-threshold = <15>;
305 qcom,ocv-voltage-high-threshold-uv = <3750000>;
306 qcom,ocv-voltage-low-threshold-uv = <3650000>;
307 qcom,low-soc-calculate-soc-threshold = <15>;
308 qcom,low-soc-calculate-soc-ms = <5000>;
309 qcom,calculate-soc-ms = <20000>;
310 qcom,chg-term-ua = <100000>;
311 qcom,batt-type = <0>;
312 qcom,low-voltage-threshold = <3420000>;
Xiaozhe Shi535494d2013-04-05 12:27:51 -0700313 qcom,tm-temp-margin = <5000>;
Xiaozhe Shi294c7e22013-04-17 14:59:15 -0700314 qcom,low-ocv-correction-limit-uv = <100>;
315 qcom,high-ocv-correction-limit-uv = <50>;
316 qcom,hold-soc-est = <3>;
317
318 qcom,bms-iadc@3800 {
319 reg = <0x3800 0x100>;
320 };
321
322 qcom,bms-bms@4000 {
323 reg = <0x4000 0x100>;
324 interrupts = <0x0 0x40 0x0>,
325 <0x0 0x40 0x1>,
326 <0x0 0x40 0x2>,
327 <0x0 0x40 0x3>,
328 <0x0 0x40 0x4>,
329 <0x0 0x40 0x5>,
330 <0x0 0x40 0x6>,
331 <0x0 0x40 0x7>;
332
333 interrupt-names = "vsense_for_r",
334 "vsense_avg",
335 "sw_cc_thr",
336 "ocv_thr",
337 "charge_begin",
338 "good_ocv",
339 "ocv_for_r",
340 "cc_thr";
341 };
342 };
343
Ashay Jaiswalad1db362013-04-01 11:11:41 +0530344 qcom,pm8110_rtc {
345 spmi-dev-container;
346 compatible = "qcom,qpnp-rtc";
347 #address-cells = <1>;
348 #size-cells = <1>;
349 qcom,qpnp-rtc-write = <0>;
350 qcom,qpnp-rtc-alarm-pwrup = <0>;
351
352 qcom,pm8110_rtc_rw@6000 {
353 reg = <0x6000 0x100>;
354 };
355
356 qcom,pm8110_rtc_alarm@6100 {
357 reg = <0x6100 0x100>;
358 interrupts = <0x0 0x61 0x1>;
359 };
360 };
Amy Maloche9a113c12013-04-11 19:46:20 -0700361
Chun Zhang9e808b82013-04-18 15:38:18 -0700362 qcom,leds@a100 {
363 compatible = "qcom,leds-qpnp";
364 reg = <0xa100 0x100>;
365 label = "mpp";
366 };
367
Amy Maloche9a113c12013-04-11 19:46:20 -0700368 qcom,leds@a200 {
369 compatible = "qcom,leds-qpnp";
370 reg = <0xa200 0x100>;
371 label = "mpp";
372 };
Xiaozhe Shifaa942c2013-02-21 10:52:03 -0800373 };
374
375 qcom,pm8110@1 {
376 spmi-slave-container;
377 reg = <0x1>;
378 #address-cells = <1>;
379 #size-cells = <1>;
Xiaozhe Shia9571ca2013-02-21 10:52:03 -0800380
381 regulator@1400 {
382 compatible = "qcom,qpnp-regulator";
383 regulator-name = "8110_s1";
384 spmi-dev-container;
385 #address-cells = <1>;
386 #size-cells = <1>;
387 reg = <0x1400 0x300>;
388 status = "disabled";
389
390 qcom,ctl@1400 {
391 reg = <0x1400 0x100>;
392 };
393 qcom,ps@1500 {
394 reg = <0x1500 0x100>;
395 };
396 qcom,freq@1600 {
397 reg = <0x1600 0x100>;
398 };
399 };
400
401 regulator@1700 {
402 compatible = "qcom,qpnp-regulator";
403 regulator-name = "8110_s2";
404 spmi-dev-container;
405 #address-cells = <1>;
406 #size-cells = <1>;
407 reg = <0x1700 0x300>;
408 status = "disabled";
409
410 qcom,ctl@1700 {
411 reg = <0x1700 0x100>;
412 };
413 qcom,ps@1800 {
414 reg = <0x1800 0x100>;
415 };
416 qcom,freq@1900 {
417 reg = <0x1900 0x100>;
418 };
419 };
420
421 regulator@1a00 {
422 compatible = "qcom,qpnp-regulator";
423 regulator-name = "8110_s3";
424 spmi-dev-container;
425 #address-cells = <1>;
426 #size-cells = <1>;
427 reg = <0x1a00 0x300>;
428 status = "disabled";
429
430 qcom,ctl@1a00 {
431 reg = <0x1a00 0x100>;
432 };
433 qcom,ps@1b00 {
434 reg = <0x1b00 0x100>;
435 };
436 qcom,freq@1c00 {
437 reg = <0x1c00 0x100>;
438 };
439 };
440
441 regulator@1d00 {
442 compatible = "qcom,qpnp-regulator";
443 regulator-name = "8110_s4";
444 spmi-dev-container;
445 #address-cells = <1>;
446 #size-cells = <1>;
447 reg = <0x1d00 0x300>;
448 status = "disabled";
449
450 qcom,ctl@1d00 {
451 reg = <0x1d00 0x100>;
452 };
453 qcom,ps@1e00 {
454 reg = <0x1e00 0x100>;
455 };
456 qcom,freq@1f00 {
457 reg = <0x1f00 0x100>;
458 };
459 };
460
461 regulator@4000 {
462 compatible = "qcom,qpnp-regulator";
463 regulator-name = "8110_l1";
464 reg = <0x4000 0x100>;
465 status = "disabled";
466 };
467
468 regulator@4100 {
469 compatible = "qcom,qpnp-regulator";
470 regulator-name = "8110_l2";
471 reg = <0x4100 0x100>;
472 status = "disabled";
473 };
474
475 regulator@4200 {
476 compatible = "qcom,qpnp-regulator";
477 regulator-name = "8110_l3";
478 reg = <0x4200 0x100>;
479 status = "disabled";
480 };
481
482 regulator@4300 {
483 compatible = "qcom,qpnp-regulator";
484 regulator-name = "8110_l4";
485 reg = <0x4300 0x100>;
486 status = "disabled";
487 };
488
489 regulator@4400 {
490 compatible = "qcom,qpnp-regulator";
491 regulator-name = "8110_l5";
492 reg = <0x4400 0x100>;
493 status = "disabled";
494 };
495
496 regulator@4500 {
497 compatible = "qcom,qpnp-regulator";
498 regulator-name = "8110_l6";
499 reg = <0x4500 0x100>;
500 status = "disabled";
501 };
502
503 regulator@4600 {
504 compatible = "qcom,qpnp-regulator";
505 regulator-name = "8110_l7";
506 reg = <0x4600 0x100>;
507 status = "disabled";
508 };
509
510 regulator@4700 {
511 compatible = "qcom,qpnp-regulator";
512 regulator-name = "8110_l8";
513 reg = <0x4700 0x100>;
514 status = "disabled";
515 };
516
517 regulator@4800 {
518 compatible = "qcom,qpnp-regulator";
519 regulator-name = "8110_l9";
520 reg = <0x4800 0x100>;
521 status = "disabled";
522 };
523
524 regulator@4900 {
525 compatible = "qcom,qpnp-regulator";
526 regulator-name = "8110_l10";
527 reg = <0x4900 0x100>;
528 status = "disabled";
529 };
530
531 regulator@4b00 {
532 compatible = "qcom,qpnp-regulator";
533 regulator-name = "8110_l12";
534 reg = <0x4b00 0x100>;
535 status = "disabled";
536 };
537
538 regulator@4d00 {
539 compatible = "qcom,qpnp-regulator";
540 regulator-name = "8110_l14";
541 reg = <0x4d00 0x100>;
542 status = "disabled";
543 };
544
545 regulator@4e00 {
546 compatible = "qcom,qpnp-regulator";
547 regulator-name = "8110_l15";
548 reg = <0x4e00 0x100>;
549 status = "disabled";
550 };
551
552 regulator@4f00 {
553 compatible = "qcom,qpnp-regulator";
554 regulator-name = "8110_l16";
555 reg = <0x4f00 0x100>;
556 status = "disabled";
557 };
558
559 regulator@5000 {
560 compatible = "qcom,qpnp-regulator";
561 regulator-name = "8110_l17";
562 reg = <0x5000 0x100>;
563 status = "disabled";
564 };
565
566 regulator@5100 {
567 compatible = "qcom,qpnp-regulator";
568 regulator-name = "8110_l18";
569 reg = <0x5100 0x100>;
570 status = "disabled";
571 };
572
573 regulator@5200 {
574 compatible = "qcom,qpnp-regulator";
575 regulator-name = "8110_l19";
576 reg = <0x5200 0x100>;
577 status = "disabled";
578 };
579
580 regulator@5300 {
581 compatible = "qcom,qpnp-regulator";
582 regulator-name = "8110_l20";
583 reg = <0x5300 0x100>;
584 status = "disabled";
585 };
586
587 regulator@5400 {
588 compatible = "qcom,qpnp-regulator";
589 regulator-name = "8110_l21";
590 reg = <0x5400 0x100>;
591 status = "disabled";
592 };
593
594 regulator@5500 {
595 compatible = "qcom,qpnp-regulator";
596 regulator-name = "8110_l22";
597 reg = <0x5500 0x100>;
598 status = "disabled";
599 };
Chun Zhang3450f832013-04-15 11:46:29 -0700600
601 qcom,vibrator@c000 {
602 compatible = "qcom,qpnp-vibrator";
603 reg = <0xc000 0x100>;
604 label = "vibrator";
605 status = "disabled";
606 };
Xiaozhe Shifaa942c2013-02-21 10:52:03 -0800607 };
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700608};