blob: 3010227fe24313ccddc630068c9503aa77b7c409 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* $Id: init.c,v 1.209 2002/02/09 19:49:31 davem Exp $
2 * arch/sparc64/mm/init.c
3 *
4 * Copyright (C) 1996-1999 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1997-1999 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
6 */
7
David S. Millerc4bce902006-02-11 21:57:54 -08008#include <linux/module.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -07009#include <linux/kernel.h>
10#include <linux/sched.h>
11#include <linux/string.h>
12#include <linux/init.h>
13#include <linux/bootmem.h>
14#include <linux/mm.h>
15#include <linux/hugetlb.h>
16#include <linux/slab.h>
17#include <linux/initrd.h>
18#include <linux/swap.h>
19#include <linux/pagemap.h>
Randy Dunlapc9cf5522006-06-27 02:53:52 -070020#include <linux/poison.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070021#include <linux/fs.h>
22#include <linux/seq_file.h>
Prasanna S Panchamukhi05e14cb2005-09-06 15:19:30 -070023#include <linux/kprobes.h>
David S. Miller1ac4f5e2005-09-21 21:49:32 -070024#include <linux/cache.h>
David S. Miller13edad72005-09-29 17:58:26 -070025#include <linux/sort.h>
David S. Miller5cbc3072007-05-25 15:49:59 -070026#include <linux/percpu.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070027
28#include <asm/head.h>
29#include <asm/system.h>
30#include <asm/page.h>
31#include <asm/pgalloc.h>
32#include <asm/pgtable.h>
33#include <asm/oplib.h>
34#include <asm/iommu.h>
35#include <asm/io.h>
36#include <asm/uaccess.h>
37#include <asm/mmu_context.h>
38#include <asm/tlbflush.h>
39#include <asm/dma.h>
40#include <asm/starfire.h>
41#include <asm/tlb.h>
42#include <asm/spitfire.h>
43#include <asm/sections.h>
David S. Miller517af332006-02-01 15:55:21 -080044#include <asm/tsb.h>
David S. Miller481295f2006-02-07 21:51:08 -080045#include <asm/hypervisor.h>
David S. Miller372b07b2006-06-21 15:35:28 -070046#include <asm/prom.h>
David S. Miller22d6a1c2007-05-25 00:37:12 -070047#include <asm/sstate.h>
David S. Miller5cbc3072007-05-25 15:49:59 -070048#include <asm/mdesc.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070049
David S. Miller9cc3a1a2006-02-21 20:51:13 -080050#define MAX_PHYS_ADDRESS (1UL << 42UL)
51#define KPTE_BITMAP_CHUNK_SZ (256UL * 1024UL * 1024UL)
52#define KPTE_BITMAP_BYTES \
53 ((MAX_PHYS_ADDRESS / KPTE_BITMAP_CHUNK_SZ) / 8)
54
55unsigned long kern_linear_pte_xor[2] __read_mostly;
56
57/* A bitmap, one bit for every 256MB of physical memory. If the bit
58 * is clear, we should use a 4MB page (via kern_linear_pte_xor[0]) else
59 * if set we should use a 256MB page (via kern_linear_pte_xor[1]).
60 */
61unsigned long kpte_linear_bitmap[KPTE_BITMAP_BYTES / sizeof(unsigned long)];
62
David S. Millerd1acb422007-03-16 17:20:28 -070063#ifndef CONFIG_DEBUG_PAGEALLOC
David S. Miller2d9e2762007-05-29 01:58:31 -070064/* A special kernel TSB for 4MB and 256MB linear mappings.
65 * Space is allocated for this right after the trap table
66 * in arch/sparc64/kernel/head.S
67 */
68extern struct tsb swapper_4m_tsb[KERNEL_TSB4M_NENTRIES];
David S. Millerd1acb422007-03-16 17:20:28 -070069#endif
David S. Millerd7744a02006-02-21 22:31:11 -080070
David S. Miller13edad72005-09-29 17:58:26 -070071#define MAX_BANKS 32
David S. Miller10147572005-09-28 21:46:43 -070072
David S. Miller13edad72005-09-29 17:58:26 -070073static struct linux_prom64_registers pavail[MAX_BANKS] __initdata;
74static struct linux_prom64_registers pavail_rescan[MAX_BANKS] __initdata;
75static int pavail_ents __initdata;
76static int pavail_rescan_ents __initdata;
David S. Miller10147572005-09-28 21:46:43 -070077
David S. Miller13edad72005-09-29 17:58:26 -070078static int cmp_p64(const void *a, const void *b)
79{
80 const struct linux_prom64_registers *x = a, *y = b;
81
82 if (x->phys_addr > y->phys_addr)
83 return 1;
84 if (x->phys_addr < y->phys_addr)
85 return -1;
86 return 0;
87}
88
89static void __init read_obp_memory(const char *property,
90 struct linux_prom64_registers *regs,
91 int *num_ents)
92{
93 int node = prom_finddevice("/memory");
94 int prop_size = prom_getproplen(node, property);
95 int ents, ret, i;
96
97 ents = prop_size / sizeof(struct linux_prom64_registers);
98 if (ents > MAX_BANKS) {
99 prom_printf("The machine has more %s property entries than "
100 "this kernel can support (%d).\n",
101 property, MAX_BANKS);
102 prom_halt();
103 }
104
105 ret = prom_getproperty(node, property, (char *) regs, prop_size);
106 if (ret == -1) {
107 prom_printf("Couldn't get %s property from /memory.\n");
108 prom_halt();
109 }
110
David S. Miller13edad72005-09-29 17:58:26 -0700111 /* Sanitize what we got from the firmware, by page aligning
112 * everything.
113 */
114 for (i = 0; i < ents; i++) {
115 unsigned long base, size;
116
117 base = regs[i].phys_addr;
118 size = regs[i].reg_size;
119
120 size &= PAGE_MASK;
121 if (base & ~PAGE_MASK) {
122 unsigned long new_base = PAGE_ALIGN(base);
123
124 size -= new_base - base;
125 if ((long) size < 0L)
126 size = 0UL;
127 base = new_base;
128 }
David S. Miller0015d3d2007-03-15 00:06:34 -0700129 if (size == 0UL) {
130 /* If it is empty, simply get rid of it.
131 * This simplifies the logic of the other
132 * functions that process these arrays.
133 */
134 memmove(&regs[i], &regs[i + 1],
135 (ents - i - 1) * sizeof(regs[0]));
136 i--;
137 ents--;
138 continue;
139 }
David S. Miller13edad72005-09-29 17:58:26 -0700140 regs[i].phys_addr = base;
141 regs[i].reg_size = size;
142 }
David S. Miller486ad102006-06-22 00:00:00 -0700143
David S. Miller486ad102006-06-22 00:00:00 -0700144 *num_ents = ents;
145
David S. Millerc9c10832005-10-12 12:22:46 -0700146 sort(regs, ents, sizeof(struct linux_prom64_registers),
David S. Miller13edad72005-09-29 17:58:26 -0700147 cmp_p64, NULL);
148}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700149
David S. Miller2bdb3cb2005-09-22 01:08:57 -0700150unsigned long *sparc64_valid_addr_bitmap __read_mostly;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700151
David S. Millerd1112012006-03-08 02:16:07 -0800152/* Kernel physical address base and size in bytes. */
David S. Miller1ac4f5e2005-09-21 21:49:32 -0700153unsigned long kern_base __read_mostly;
154unsigned long kern_size __read_mostly;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700155
Linus Torvalds1da177e2005-04-16 15:20:36 -0700156/* Initial ramdisk setup */
157extern unsigned long sparc_ramdisk_image64;
158extern unsigned int sparc_ramdisk_image;
159extern unsigned int sparc_ramdisk_size;
160
David S. Miller1ac4f5e2005-09-21 21:49:32 -0700161struct page *mem_map_zero __read_mostly;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700162
David S. Miller0835ae02005-10-04 15:23:20 -0700163unsigned int sparc64_highest_unlocked_tlb_ent __read_mostly;
164
165unsigned long sparc64_kern_pri_context __read_mostly;
166unsigned long sparc64_kern_pri_nuc_bits __read_mostly;
167unsigned long sparc64_kern_sec_context __read_mostly;
168
Linus Torvalds1da177e2005-04-16 15:20:36 -0700169int bigkernel = 0;
170
Linus Torvalds1da177e2005-04-16 15:20:36 -0700171#ifdef CONFIG_DEBUG_DCFLUSH
172atomic_t dcpage_flushes = ATOMIC_INIT(0);
173#ifdef CONFIG_SMP
174atomic_t dcpage_flushes_xcall = ATOMIC_INIT(0);
175#endif
176#endif
177
David S. Miller7a591cf2006-02-26 19:44:50 -0800178inline void flush_dcache_page_impl(struct page *page)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700179{
David S. Miller7a591cf2006-02-26 19:44:50 -0800180 BUG_ON(tlb_type == hypervisor);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700181#ifdef CONFIG_DEBUG_DCFLUSH
182 atomic_inc(&dcpage_flushes);
183#endif
184
185#ifdef DCACHE_ALIASING_POSSIBLE
186 __flush_dcache_page(page_address(page),
187 ((tlb_type == spitfire) &&
188 page_mapping(page) != NULL));
189#else
190 if (page_mapping(page) != NULL &&
191 tlb_type == spitfire)
192 __flush_icache_page(__pa(page_address(page)));
193#endif
194}
195
196#define PG_dcache_dirty PG_arch_1
David S. Miller22adb352007-05-26 01:14:43 -0700197#define PG_dcache_cpu_shift 32UL
198#define PG_dcache_cpu_mask \
199 ((1UL<<ilog2(roundup_pow_of_two(NR_CPUS)))-1UL)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700200
201#define dcache_dirty_cpu(page) \
David S. Miller48b0e542005-07-27 16:08:44 -0700202 (((page)->flags >> PG_dcache_cpu_shift) & PG_dcache_cpu_mask)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700203
204static __inline__ void set_dcache_dirty(struct page *page, int this_cpu)
205{
206 unsigned long mask = this_cpu;
David S. Miller48b0e542005-07-27 16:08:44 -0700207 unsigned long non_cpu_bits;
208
209 non_cpu_bits = ~(PG_dcache_cpu_mask << PG_dcache_cpu_shift);
210 mask = (mask << PG_dcache_cpu_shift) | (1UL << PG_dcache_dirty);
211
Linus Torvalds1da177e2005-04-16 15:20:36 -0700212 __asm__ __volatile__("1:\n\t"
213 "ldx [%2], %%g7\n\t"
214 "and %%g7, %1, %%g1\n\t"
215 "or %%g1, %0, %%g1\n\t"
216 "casx [%2], %%g7, %%g1\n\t"
217 "cmp %%g7, %%g1\n\t"
David S. Millerb445e262005-06-27 15:42:04 -0700218 "membar #StoreLoad | #StoreStore\n\t"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700219 "bne,pn %%xcc, 1b\n\t"
David S. Millerb445e262005-06-27 15:42:04 -0700220 " nop"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700221 : /* no outputs */
222 : "r" (mask), "r" (non_cpu_bits), "r" (&page->flags)
223 : "g1", "g7");
224}
225
226static __inline__ void clear_dcache_dirty_cpu(struct page *page, unsigned long cpu)
227{
228 unsigned long mask = (1UL << PG_dcache_dirty);
229
230 __asm__ __volatile__("! test_and_clear_dcache_dirty\n"
231 "1:\n\t"
232 "ldx [%2], %%g7\n\t"
David S. Miller48b0e542005-07-27 16:08:44 -0700233 "srlx %%g7, %4, %%g1\n\t"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700234 "and %%g1, %3, %%g1\n\t"
235 "cmp %%g1, %0\n\t"
236 "bne,pn %%icc, 2f\n\t"
237 " andn %%g7, %1, %%g1\n\t"
238 "casx [%2], %%g7, %%g1\n\t"
239 "cmp %%g7, %%g1\n\t"
David S. Millerb445e262005-06-27 15:42:04 -0700240 "membar #StoreLoad | #StoreStore\n\t"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700241 "bne,pn %%xcc, 1b\n\t"
David S. Millerb445e262005-06-27 15:42:04 -0700242 " nop\n"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700243 "2:"
244 : /* no outputs */
245 : "r" (cpu), "r" (mask), "r" (&page->flags),
David S. Miller48b0e542005-07-27 16:08:44 -0700246 "i" (PG_dcache_cpu_mask),
247 "i" (PG_dcache_cpu_shift)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700248 : "g1", "g7");
249}
250
David S. Miller517af332006-02-01 15:55:21 -0800251static inline void tsb_insert(struct tsb *ent, unsigned long tag, unsigned long pte)
252{
253 unsigned long tsb_addr = (unsigned long) ent;
254
David S. Miller3b3ab2e2006-02-17 09:54:42 -0800255 if (tlb_type == cheetah_plus || tlb_type == hypervisor)
David S. Miller517af332006-02-01 15:55:21 -0800256 tsb_addr = __pa(tsb_addr);
257
258 __tsb_insert(tsb_addr, tag, pte);
259}
260
David S. Millerc4bce902006-02-11 21:57:54 -0800261unsigned long _PAGE_ALL_SZ_BITS __read_mostly;
262unsigned long _PAGE_SZBITS __read_mostly;
263
Linus Torvalds1da177e2005-04-16 15:20:36 -0700264void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t pte)
265{
David S. Millerbd407912006-01-31 18:31:38 -0800266 struct mm_struct *mm;
David S. Miller74ae9982006-03-05 18:26:24 -0800267 struct tsb *tsb;
David S. Miller7a1ac522006-03-16 02:02:32 -0800268 unsigned long tag, flags;
David S. Millerdcc1e8d2006-03-22 00:49:59 -0800269 unsigned long tsb_index, tsb_hash_shift;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700270
David S. Miller7a591cf2006-02-26 19:44:50 -0800271 if (tlb_type != hypervisor) {
272 unsigned long pfn = pte_pfn(pte);
273 unsigned long pg_flags;
274 struct page *page;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700275
David S. Miller7a591cf2006-02-26 19:44:50 -0800276 if (pfn_valid(pfn) &&
277 (page = pfn_to_page(pfn), page_mapping(page)) &&
278 ((pg_flags = page->flags) & (1UL << PG_dcache_dirty))) {
279 int cpu = ((pg_flags >> PG_dcache_cpu_shift) &
280 PG_dcache_cpu_mask);
281 int this_cpu = get_cpu();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700282
David S. Miller7a591cf2006-02-26 19:44:50 -0800283 /* This is just to optimize away some function calls
284 * in the SMP case.
285 */
286 if (cpu == this_cpu)
287 flush_dcache_page_impl(page);
288 else
289 smp_flush_dcache_page_impl(page, cpu);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700290
David S. Miller7a591cf2006-02-26 19:44:50 -0800291 clear_dcache_dirty_cpu(page, cpu);
292
293 put_cpu();
294 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700295 }
David S. Millerbd407912006-01-31 18:31:38 -0800296
297 mm = vma->vm_mm;
David S. Miller7a1ac522006-03-16 02:02:32 -0800298
David S. Millerdcc1e8d2006-03-22 00:49:59 -0800299 tsb_index = MM_TSB_BASE;
300 tsb_hash_shift = PAGE_SHIFT;
301
David S. Miller7a1ac522006-03-16 02:02:32 -0800302 spin_lock_irqsave(&mm->context.lock, flags);
303
David S. Millerdcc1e8d2006-03-22 00:49:59 -0800304#ifdef CONFIG_HUGETLB_PAGE
305 if (mm->context.tsb_block[MM_TSB_HUGE].tsb != NULL) {
306 if ((tlb_type == hypervisor &&
307 (pte_val(pte) & _PAGE_SZALL_4V) == _PAGE_SZHUGE_4V) ||
308 (tlb_type != hypervisor &&
309 (pte_val(pte) & _PAGE_SZALL_4U) == _PAGE_SZHUGE_4U)) {
310 tsb_index = MM_TSB_HUGE;
311 tsb_hash_shift = HPAGE_SHIFT;
312 }
313 }
314#endif
315
316 tsb = mm->context.tsb_block[tsb_index].tsb;
317 tsb += ((address >> tsb_hash_shift) &
318 (mm->context.tsb_block[tsb_index].tsb_nentries - 1UL));
David S. Miller74ae9982006-03-05 18:26:24 -0800319 tag = (address >> 22UL);
320 tsb_insert(tsb, tag, pte_val(pte));
David S. Miller7a1ac522006-03-16 02:02:32 -0800321
322 spin_unlock_irqrestore(&mm->context.lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700323}
324
325void flush_dcache_page(struct page *page)
326{
David S. Millera9546f52005-04-17 18:03:09 -0700327 struct address_space *mapping;
328 int this_cpu;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700329
David S. Miller7a591cf2006-02-26 19:44:50 -0800330 if (tlb_type == hypervisor)
331 return;
332
David S. Millera9546f52005-04-17 18:03:09 -0700333 /* Do not bother with the expensive D-cache flush if it
334 * is merely the zero page. The 'bigcore' testcase in GDB
335 * causes this case to run millions of times.
336 */
337 if (page == ZERO_PAGE(0))
338 return;
339
340 this_cpu = get_cpu();
341
342 mapping = page_mapping(page);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700343 if (mapping && !mapping_mapped(mapping)) {
David S. Millera9546f52005-04-17 18:03:09 -0700344 int dirty = test_bit(PG_dcache_dirty, &page->flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700345 if (dirty) {
David S. Millera9546f52005-04-17 18:03:09 -0700346 int dirty_cpu = dcache_dirty_cpu(page);
347
Linus Torvalds1da177e2005-04-16 15:20:36 -0700348 if (dirty_cpu == this_cpu)
349 goto out;
350 smp_flush_dcache_page_impl(page, dirty_cpu);
351 }
352 set_dcache_dirty(page, this_cpu);
353 } else {
354 /* We could delay the flush for the !page_mapping
355 * case too. But that case is for exec env/arg
356 * pages and those are %99 certainly going to get
357 * faulted into the tlb (and thus flushed) anyways.
358 */
359 flush_dcache_page_impl(page);
360 }
361
362out:
363 put_cpu();
364}
365
Prasanna S Panchamukhi05e14cb2005-09-06 15:19:30 -0700366void __kprobes flush_icache_range(unsigned long start, unsigned long end)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700367{
David S. Millera43fe0e2006-02-04 03:10:53 -0800368 /* Cheetah and Hypervisor platform cpus have coherent I-cache. */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700369 if (tlb_type == spitfire) {
370 unsigned long kaddr;
371
David S. Millera94aa252007-03-15 15:50:11 -0700372 /* This code only runs on Spitfire cpus so this is
373 * why we can assume _PAGE_PADDR_4U.
374 */
375 for (kaddr = start; kaddr < end; kaddr += PAGE_SIZE) {
376 unsigned long paddr, mask = _PAGE_PADDR_4U;
377
378 if (kaddr >= PAGE_OFFSET)
379 paddr = kaddr & mask;
380 else {
381 pgd_t *pgdp = pgd_offset_k(kaddr);
382 pud_t *pudp = pud_offset(pgdp, kaddr);
383 pmd_t *pmdp = pmd_offset(pudp, kaddr);
384 pte_t *ptep = pte_offset_kernel(pmdp, kaddr);
385
386 paddr = pte_val(*ptep) & mask;
387 }
388 __flush_icache_page(paddr);
389 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700390 }
391}
392
Linus Torvalds1da177e2005-04-16 15:20:36 -0700393void show_mem(void)
394{
David S. Miller5be4a962007-03-15 16:00:29 -0700395 unsigned long total = 0, reserved = 0;
396 unsigned long shared = 0, cached = 0;
397 pg_data_t *pgdat;
398
David S. Miller28256ca2007-03-15 15:56:07 -0700399 printk(KERN_INFO "Mem-info:\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700400 show_free_areas();
David S. Miller28256ca2007-03-15 15:56:07 -0700401 printk(KERN_INFO "Free swap: %6ldkB\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700402 nr_swap_pages << (PAGE_SHIFT-10));
David S. Miller5be4a962007-03-15 16:00:29 -0700403 for_each_online_pgdat(pgdat) {
404 unsigned long i, flags;
405
406 pgdat_resize_lock(pgdat, &flags);
407 for (i = 0; i < pgdat->node_spanned_pages; i++) {
408 struct page *page = pgdat_page_nr(pgdat, i);
409 total++;
410 if (PageReserved(page))
411 reserved++;
412 else if (PageSwapCache(page))
413 cached++;
414 else if (page_count(page))
415 shared += page_count(page) - 1;
416 }
417 pgdat_resize_unlock(pgdat, &flags);
418 }
419
420 printk(KERN_INFO "%lu pages of RAM\n", total);
421 printk(KERN_INFO "%lu reserved pages\n", reserved);
422 printk(KERN_INFO "%lu pages shared\n", shared);
423 printk(KERN_INFO "%lu pages swap cached\n", cached);
424
425 printk(KERN_INFO "%lu pages dirty\n",
426 global_page_state(NR_FILE_DIRTY));
427 printk(KERN_INFO "%lu pages writeback\n",
428 global_page_state(NR_WRITEBACK));
429 printk(KERN_INFO "%lu pages mapped\n",
430 global_page_state(NR_FILE_MAPPED));
431 printk(KERN_INFO "%lu pages slab\n",
432 global_page_state(NR_SLAB_RECLAIMABLE) +
433 global_page_state(NR_SLAB_UNRECLAIMABLE));
434 printk(KERN_INFO "%lu pages pagetables\n",
435 global_page_state(NR_PAGETABLE));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700436}
437
438void mmu_info(struct seq_file *m)
439{
440 if (tlb_type == cheetah)
441 seq_printf(m, "MMU Type\t: Cheetah\n");
442 else if (tlb_type == cheetah_plus)
443 seq_printf(m, "MMU Type\t: Cheetah+\n");
444 else if (tlb_type == spitfire)
445 seq_printf(m, "MMU Type\t: Spitfire\n");
David S. Millera43fe0e2006-02-04 03:10:53 -0800446 else if (tlb_type == hypervisor)
447 seq_printf(m, "MMU Type\t: Hypervisor (sun4v)\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700448 else
449 seq_printf(m, "MMU Type\t: ???\n");
450
451#ifdef CONFIG_DEBUG_DCFLUSH
452 seq_printf(m, "DCPageFlushes\t: %d\n",
453 atomic_read(&dcpage_flushes));
454#ifdef CONFIG_SMP
455 seq_printf(m, "DCPageFlushesXC\t: %d\n",
456 atomic_read(&dcpage_flushes_xcall));
457#endif /* CONFIG_SMP */
458#endif /* CONFIG_DEBUG_DCFLUSH */
459}
460
David S. Millera94aa252007-03-15 15:50:11 -0700461struct linux_prom_translation {
462 unsigned long virt;
463 unsigned long size;
464 unsigned long data;
465};
466
467/* Exported for kernel TLB miss handling in ktlb.S */
468struct linux_prom_translation prom_trans[512] __read_mostly;
469unsigned int prom_trans_ents __read_mostly;
470
Linus Torvalds1da177e2005-04-16 15:20:36 -0700471/* Exported for SMP bootup purposes. */
472unsigned long kern_locked_tte_data;
473
David S. Miller405599b2005-09-22 00:12:35 -0700474/* The obp translations are saved based on 8k pagesize, since obp can
475 * use a mixture of pagesizes. Misses to the LOW_OBP_ADDRESS ->
David S. Miller74bf4312006-01-31 18:29:18 -0800476 * HI_OBP_ADDRESS range are handled in ktlb.S.
David S. Miller405599b2005-09-22 00:12:35 -0700477 */
David S. Miller5085b4a2005-09-22 00:45:41 -0700478static inline int in_obp_range(unsigned long vaddr)
479{
480 return (vaddr >= LOW_OBP_ADDRESS &&
481 vaddr < HI_OBP_ADDRESS);
482}
483
David S. Millerc9c10832005-10-12 12:22:46 -0700484static int cmp_ptrans(const void *a, const void *b)
David S. Miller405599b2005-09-22 00:12:35 -0700485{
David S. Millerc9c10832005-10-12 12:22:46 -0700486 const struct linux_prom_translation *x = a, *y = b;
David S. Miller405599b2005-09-22 00:12:35 -0700487
David S. Millerc9c10832005-10-12 12:22:46 -0700488 if (x->virt > y->virt)
489 return 1;
490 if (x->virt < y->virt)
491 return -1;
492 return 0;
David S. Miller405599b2005-09-22 00:12:35 -0700493}
494
David S. Millerc9c10832005-10-12 12:22:46 -0700495/* Read OBP translations property into 'prom_trans[]'. */
David S. Miller9ad98c52005-10-05 15:12:00 -0700496static void __init read_obp_translations(void)
David S. Miller405599b2005-09-22 00:12:35 -0700497{
David S. Millerc9c10832005-10-12 12:22:46 -0700498 int n, node, ents, first, last, i;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700499
500 node = prom_finddevice("/virtual-memory");
501 n = prom_getproplen(node, "translations");
David S. Miller405599b2005-09-22 00:12:35 -0700502 if (unlikely(n == 0 || n == -1)) {
David S. Millerb206fc42005-09-21 22:31:13 -0700503 prom_printf("prom_mappings: Couldn't get size.\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700504 prom_halt();
505 }
David S. Miller405599b2005-09-22 00:12:35 -0700506 if (unlikely(n > sizeof(prom_trans))) {
507 prom_printf("prom_mappings: Size %Zd is too big.\n", n);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700508 prom_halt();
509 }
David S. Miller405599b2005-09-22 00:12:35 -0700510
David S. Millerb206fc42005-09-21 22:31:13 -0700511 if ((n = prom_getproperty(node, "translations",
David S. Miller405599b2005-09-22 00:12:35 -0700512 (char *)&prom_trans[0],
513 sizeof(prom_trans))) == -1) {
David S. Millerb206fc42005-09-21 22:31:13 -0700514 prom_printf("prom_mappings: Couldn't get property.\n");
515 prom_halt();
516 }
David S. Miller9ad98c52005-10-05 15:12:00 -0700517
David S. Millerb206fc42005-09-21 22:31:13 -0700518 n = n / sizeof(struct linux_prom_translation);
David S. Miller9ad98c52005-10-05 15:12:00 -0700519
David S. Millerc9c10832005-10-12 12:22:46 -0700520 ents = n;
521
522 sort(prom_trans, ents, sizeof(struct linux_prom_translation),
523 cmp_ptrans, NULL);
524
525 /* Now kick out all the non-OBP entries. */
526 for (i = 0; i < ents; i++) {
527 if (in_obp_range(prom_trans[i].virt))
528 break;
529 }
530 first = i;
531 for (; i < ents; i++) {
532 if (!in_obp_range(prom_trans[i].virt))
533 break;
534 }
535 last = i;
536
537 for (i = 0; i < (last - first); i++) {
538 struct linux_prom_translation *src = &prom_trans[i + first];
539 struct linux_prom_translation *dest = &prom_trans[i];
540
541 *dest = *src;
542 }
543 for (; i < ents; i++) {
544 struct linux_prom_translation *dest = &prom_trans[i];
545 dest->virt = dest->size = dest->data = 0x0UL;
546 }
547
548 prom_trans_ents = last - first;
549
550 if (tlb_type == spitfire) {
551 /* Clear diag TTE bits. */
552 for (i = 0; i < prom_trans_ents; i++)
553 prom_trans[i].data &= ~0x0003fe0000000000UL;
554 }
David S. Miller405599b2005-09-22 00:12:35 -0700555}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700556
David S. Millerd82ace72006-02-09 02:52:44 -0800557static void __init hypervisor_tlb_lock(unsigned long vaddr,
558 unsigned long pte,
559 unsigned long mmu)
560{
David S. Miller7db35f32007-05-29 02:22:14 -0700561 unsigned long ret = sun4v_mmu_map_perm_addr(vaddr, 0, pte, mmu);
David S. Millerd82ace72006-02-09 02:52:44 -0800562
David S. Miller7db35f32007-05-29 02:22:14 -0700563 if (ret != 0) {
David S. Miller12e126a2006-02-17 14:40:30 -0800564 prom_printf("hypervisor_tlb_lock[%lx:%lx:%lx:%lx]: "
David S. Miller7db35f32007-05-29 02:22:14 -0700565 "errors with %lx\n", vaddr, 0, pte, mmu, ret);
David S. Miller12e126a2006-02-17 14:40:30 -0800566 prom_halt();
567 }
David S. Millerd82ace72006-02-09 02:52:44 -0800568}
569
David S. Millerc4bce902006-02-11 21:57:54 -0800570static unsigned long kern_large_tte(unsigned long paddr);
571
David S. Miller898cf0e2005-09-23 11:59:44 -0700572static void __init remap_kernel(void)
David S. Miller405599b2005-09-22 00:12:35 -0700573{
574 unsigned long phys_page, tte_vaddr, tte_data;
David S. Miller405599b2005-09-22 00:12:35 -0700575 int tlb_ent = sparc64_highest_locked_tlbent();
576
Linus Torvalds1da177e2005-04-16 15:20:36 -0700577 tte_vaddr = (unsigned long) KERNBASE;
David S. Millerbff06d52005-09-22 20:11:33 -0700578 phys_page = (prom_boot_mapping_phys_low >> 22UL) << 22UL;
David S. Millerc4bce902006-02-11 21:57:54 -0800579 tte_data = kern_large_tte(phys_page);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700580
581 kern_locked_tte_data = tte_data;
582
David S. Millerd82ace72006-02-09 02:52:44 -0800583 /* Now lock us into the TLBs via Hypervisor or OBP. */
584 if (tlb_type == hypervisor) {
585 hypervisor_tlb_lock(tte_vaddr, tte_data, HV_MMU_DMMU);
586 hypervisor_tlb_lock(tte_vaddr, tte_data, HV_MMU_IMMU);
587 if (bigkernel) {
588 tte_vaddr += 0x400000;
589 tte_data += 0x400000;
590 hypervisor_tlb_lock(tte_vaddr, tte_data, HV_MMU_DMMU);
591 hypervisor_tlb_lock(tte_vaddr, tte_data, HV_MMU_IMMU);
592 }
593 } else {
594 prom_dtlb_load(tlb_ent, tte_data, tte_vaddr);
595 prom_itlb_load(tlb_ent, tte_data, tte_vaddr);
596 if (bigkernel) {
597 tlb_ent -= 1;
598 prom_dtlb_load(tlb_ent,
599 tte_data + 0x400000,
600 tte_vaddr + 0x400000);
601 prom_itlb_load(tlb_ent,
602 tte_data + 0x400000,
603 tte_vaddr + 0x400000);
604 }
605 sparc64_highest_unlocked_tlb_ent = tlb_ent - 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700606 }
David S. Miller0835ae02005-10-04 15:23:20 -0700607 if (tlb_type == cheetah_plus) {
608 sparc64_kern_pri_context = (CTX_CHEETAH_PLUS_CTX0 |
609 CTX_CHEETAH_PLUS_NUC);
610 sparc64_kern_pri_nuc_bits = CTX_CHEETAH_PLUS_NUC;
611 sparc64_kern_sec_context = CTX_CHEETAH_PLUS_CTX0;
612 }
David S. Miller405599b2005-09-22 00:12:35 -0700613}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700614
David S. Miller405599b2005-09-22 00:12:35 -0700615
David S. Millerc9c10832005-10-12 12:22:46 -0700616static void __init inherit_prom_mappings(void)
David S. Miller9ad98c52005-10-05 15:12:00 -0700617{
618 read_obp_translations();
David S. Miller405599b2005-09-22 00:12:35 -0700619
620 /* Now fixup OBP's idea about where we really are mapped. */
621 prom_printf("Remapping the kernel... ");
622 remap_kernel();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700623 prom_printf("done.\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700624}
625
Linus Torvalds1da177e2005-04-16 15:20:36 -0700626void prom_world(int enter)
627{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700628 if (!enter)
629 set_fs((mm_segment_t) { get_thread_current_ds() });
630
David S. Miller3487d1d2006-01-31 18:33:25 -0800631 __asm__ __volatile__("flushw");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700632}
633
634#ifdef DCACHE_ALIASING_POSSIBLE
635void __flush_dcache_range(unsigned long start, unsigned long end)
636{
637 unsigned long va;
638
639 if (tlb_type == spitfire) {
640 int n = 0;
641
642 for (va = start; va < end; va += 32) {
643 spitfire_put_dcache_tag(va & 0x3fe0, 0x0);
644 if (++n >= 512)
645 break;
646 }
David S. Millera43fe0e2006-02-04 03:10:53 -0800647 } else if (tlb_type == cheetah || tlb_type == cheetah_plus) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700648 start = __pa(start);
649 end = __pa(end);
650 for (va = start; va < end; va += 32)
651 __asm__ __volatile__("stxa %%g0, [%0] %1\n\t"
652 "membar #Sync"
653 : /* no outputs */
654 : "r" (va),
655 "i" (ASI_DCACHE_INVALIDATE));
656 }
657}
658#endif /* DCACHE_ALIASING_POSSIBLE */
659
David S. Miller85f1e1f2007-03-15 17:51:26 -0700660/* get_new_mmu_context() uses "cache + 1". */
661DEFINE_SPINLOCK(ctx_alloc_lock);
662unsigned long tlb_context_cache = CTX_FIRST_VERSION - 1;
663#define MAX_CTX_NR (1UL << CTX_NR_BITS)
664#define CTX_BMAP_SLOTS BITS_TO_LONGS(MAX_CTX_NR)
665DECLARE_BITMAP(mmu_context_bmap, MAX_CTX_NR);
666
Linus Torvalds1da177e2005-04-16 15:20:36 -0700667/* Caller does TLB context flushing on local CPU if necessary.
668 * The caller also ensures that CTX_VALID(mm->context) is false.
669 *
670 * We must be careful about boundary cases so that we never
671 * let the user have CTX 0 (nucleus) or we ever use a CTX
672 * version of zero (and thus NO_CONTEXT would not be caught
673 * by version mis-match tests in mmu_context.h).
David S. Millera0663a72006-02-23 14:19:28 -0800674 *
675 * Always invoked with interrupts disabled.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700676 */
677void get_new_mmu_context(struct mm_struct *mm)
678{
679 unsigned long ctx, new_ctx;
680 unsigned long orig_pgsz_bits;
David S. Millera77754b2006-03-06 19:59:50 -0800681 unsigned long flags;
David S. Millera0663a72006-02-23 14:19:28 -0800682 int new_version;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700683
David S. Millera77754b2006-03-06 19:59:50 -0800684 spin_lock_irqsave(&ctx_alloc_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700685 orig_pgsz_bits = (mm->context.sparc64_ctx_val & CTX_PGSZ_MASK);
686 ctx = (tlb_context_cache + 1) & CTX_NR_MASK;
687 new_ctx = find_next_zero_bit(mmu_context_bmap, 1 << CTX_NR_BITS, ctx);
David S. Millera0663a72006-02-23 14:19:28 -0800688 new_version = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700689 if (new_ctx >= (1 << CTX_NR_BITS)) {
690 new_ctx = find_next_zero_bit(mmu_context_bmap, ctx, 1);
691 if (new_ctx >= ctx) {
692 int i;
693 new_ctx = (tlb_context_cache & CTX_VERSION_MASK) +
694 CTX_FIRST_VERSION;
695 if (new_ctx == 1)
696 new_ctx = CTX_FIRST_VERSION;
697
698 /* Don't call memset, for 16 entries that's just
699 * plain silly...
700 */
701 mmu_context_bmap[0] = 3;
702 mmu_context_bmap[1] = 0;
703 mmu_context_bmap[2] = 0;
704 mmu_context_bmap[3] = 0;
705 for (i = 4; i < CTX_BMAP_SLOTS; i += 4) {
706 mmu_context_bmap[i + 0] = 0;
707 mmu_context_bmap[i + 1] = 0;
708 mmu_context_bmap[i + 2] = 0;
709 mmu_context_bmap[i + 3] = 0;
710 }
David S. Millera0663a72006-02-23 14:19:28 -0800711 new_version = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700712 goto out;
713 }
714 }
715 mmu_context_bmap[new_ctx>>6] |= (1UL << (new_ctx & 63));
716 new_ctx |= (tlb_context_cache & CTX_VERSION_MASK);
717out:
718 tlb_context_cache = new_ctx;
719 mm->context.sparc64_ctx_val = new_ctx | orig_pgsz_bits;
David S. Millera77754b2006-03-06 19:59:50 -0800720 spin_unlock_irqrestore(&ctx_alloc_lock, flags);
David S. Millera0663a72006-02-23 14:19:28 -0800721
722 if (unlikely(new_version))
723 smp_new_mmu_context_version();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700724}
725
David S. Millerd1112012006-03-08 02:16:07 -0800726/* Find a free area for the bootmem map, avoiding the kernel image
727 * and the initial ramdisk.
728 */
729static unsigned long __init choose_bootmap_pfn(unsigned long start_pfn,
730 unsigned long end_pfn)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700731{
David S. Millerd1112012006-03-08 02:16:07 -0800732 unsigned long avoid_start, avoid_end, bootmap_size;
733 int i;
734
David S. Miller39964652007-03-15 19:36:53 -0700735 bootmap_size = bootmem_bootmap_pages(end_pfn - start_pfn);
736 bootmap_size <<= PAGE_SHIFT;
David S. Millerd1112012006-03-08 02:16:07 -0800737
738 avoid_start = avoid_end = 0;
739#ifdef CONFIG_BLK_DEV_INITRD
740 avoid_start = initrd_start;
741 avoid_end = PAGE_ALIGN(initrd_end);
742#endif
743
744#ifdef CONFIG_DEBUG_BOOTMEM
745 prom_printf("choose_bootmap_pfn: kern[%lx:%lx] avoid[%lx:%lx]\n",
746 kern_base, PAGE_ALIGN(kern_base + kern_size),
747 avoid_start, avoid_end);
748#endif
749 for (i = 0; i < pavail_ents; i++) {
750 unsigned long start, end;
751
752 start = pavail[i].phys_addr;
753 end = start + pavail[i].reg_size;
754
755 while (start < end) {
756 if (start >= kern_base &&
757 start < PAGE_ALIGN(kern_base + kern_size)) {
758 start = PAGE_ALIGN(kern_base + kern_size);
759 continue;
760 }
761 if (start >= avoid_start && start < avoid_end) {
762 start = avoid_end;
763 continue;
764 }
765
766 if ((end - start) < bootmap_size)
767 break;
768
769 if (start < kern_base &&
770 (start + bootmap_size) > kern_base) {
771 start = PAGE_ALIGN(kern_base + kern_size);
772 continue;
773 }
774
775 if (start < avoid_start &&
776 (start + bootmap_size) > avoid_start) {
777 start = avoid_end;
778 continue;
779 }
780
781 /* OK, it doesn't overlap anything, use it. */
782#ifdef CONFIG_DEBUG_BOOTMEM
783 prom_printf("choose_bootmap_pfn: Using %lx [%lx]\n",
784 start >> PAGE_SHIFT, start);
785#endif
786 return start >> PAGE_SHIFT;
787 }
788 }
789
790 prom_printf("Cannot find free area for bootmap, aborting.\n");
791 prom_halt();
792}
793
David S. Miller6fc5bae2006-12-28 21:00:23 -0800794static void __init trim_pavail(unsigned long *cur_size_p,
795 unsigned long *end_of_phys_p)
796{
797 unsigned long to_trim = *cur_size_p - cmdline_memory_size;
798 unsigned long avoid_start, avoid_end;
799 int i;
800
801 to_trim = PAGE_ALIGN(to_trim);
802
803 avoid_start = avoid_end = 0;
804#ifdef CONFIG_BLK_DEV_INITRD
805 avoid_start = initrd_start;
806 avoid_end = PAGE_ALIGN(initrd_end);
807#endif
808
809 /* Trim some pavail[] entries in order to satisfy the
810 * requested "mem=xxx" kernel command line specification.
811 *
812 * We must not trim off the kernel image area nor the
813 * initial ramdisk range (if any). Also, we must not trim
814 * any pavail[] entry down to zero in order to preserve
815 * the invariant that all pavail[] entries have a non-zero
816 * size which is assumed by all of the code in here.
817 */
818 for (i = 0; i < pavail_ents; i++) {
819 unsigned long start, end, kern_end;
820 unsigned long trim_low, trim_high, n;
821
822 kern_end = PAGE_ALIGN(kern_base + kern_size);
823
824 trim_low = start = pavail[i].phys_addr;
825 trim_high = end = start + pavail[i].reg_size;
826
827 if (kern_base >= start &&
828 kern_base < end) {
829 trim_low = kern_base;
830 if (kern_end >= end)
831 continue;
832 }
833 if (kern_end >= start &&
834 kern_end < end) {
835 trim_high = kern_end;
836 }
837 if (avoid_start &&
838 avoid_start >= start &&
839 avoid_start < end) {
840 if (trim_low > avoid_start)
841 trim_low = avoid_start;
842 if (avoid_end >= end)
843 continue;
844 }
845 if (avoid_end &&
846 avoid_end >= start &&
847 avoid_end < end) {
848 if (trim_high < avoid_end)
849 trim_high = avoid_end;
850 }
851
852 if (trim_high <= trim_low)
853 continue;
854
855 if (trim_low == start && trim_high == end) {
856 /* Whole chunk is available for trimming.
857 * Trim all except one page, in order to keep
858 * entry non-empty.
859 */
860 n = (end - start) - PAGE_SIZE;
861 if (n > to_trim)
862 n = to_trim;
863
864 if (n) {
865 pavail[i].phys_addr += n;
866 pavail[i].reg_size -= n;
867 to_trim -= n;
868 }
869 } else {
870 n = (trim_low - start);
871 if (n > to_trim)
872 n = to_trim;
873
874 if (n) {
875 pavail[i].phys_addr += n;
876 pavail[i].reg_size -= n;
877 to_trim -= n;
878 }
879 if (to_trim) {
880 n = end - trim_high;
881 if (n > to_trim)
882 n = to_trim;
883 if (n) {
884 pavail[i].reg_size -= n;
885 to_trim -= n;
886 }
887 }
888 }
889
890 if (!to_trim)
891 break;
892 }
893
894 /* Recalculate. */
895 *cur_size_p = 0UL;
896 for (i = 0; i < pavail_ents; i++) {
897 *end_of_phys_p = pavail[i].phys_addr +
898 pavail[i].reg_size;
899 *cur_size_p += pavail[i].reg_size;
900 }
901}
902
David S. Millerf1cfdb52007-03-15 22:52:18 -0700903/* About pages_avail, this is the value we will use to calculate
904 * the zholes_size[] argument given to free_area_init_node(). The
905 * page allocator uses this to calculate nr_kernel_pages,
906 * nr_all_pages and zone->present_pages. On NUMA it is used
907 * to calculate zone->min_unmapped_pages and zone->min_slab_pages.
908 *
909 * So this number should really be set to what the page allocator
910 * actually ends up with. This means:
911 * 1) It should include bootmem map pages, we'll release those.
912 * 2) It should not include the kernel image, except for the
913 * __init sections which we will also release.
914 * 3) It should include the initrd image, since we'll release
915 * that too.
916 */
David S. Millerd1112012006-03-08 02:16:07 -0800917static unsigned long __init bootmem_init(unsigned long *pages_avail,
918 unsigned long phys_base)
919{
920 unsigned long bootmap_size, end_pfn;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700921 unsigned long end_of_phys_memory = 0UL;
922 unsigned long bootmap_pfn, bytes_avail, size;
923 int i;
924
925#ifdef CONFIG_DEBUG_BOOTMEM
David S. Miller13edad72005-09-29 17:58:26 -0700926 prom_printf("bootmem_init: Scan pavail, ");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700927#endif
928
929 bytes_avail = 0UL;
David S. Miller13edad72005-09-29 17:58:26 -0700930 for (i = 0; i < pavail_ents; i++) {
931 end_of_phys_memory = pavail[i].phys_addr +
932 pavail[i].reg_size;
933 bytes_avail += pavail[i].reg_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700934 }
935
David S. Miller6fc5bae2006-12-28 21:00:23 -0800936 /* Determine the location of the initial ramdisk before trying
937 * to honor the "mem=xxx" command line argument. We must know
938 * where the kernel image and the ramdisk image are so that we
939 * do not trim those two areas from the physical memory map.
940 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700941
942#ifdef CONFIG_BLK_DEV_INITRD
943 /* Now have to check initial ramdisk, so that bootmap does not overwrite it */
944 if (sparc_ramdisk_image || sparc_ramdisk_image64) {
945 unsigned long ramdisk_image = sparc_ramdisk_image ?
946 sparc_ramdisk_image : sparc_ramdisk_image64;
David S. Miller715a0ec2006-09-26 23:14:21 -0700947 ramdisk_image -= KERNBASE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700948 initrd_start = ramdisk_image + phys_base;
949 initrd_end = initrd_start + sparc_ramdisk_size;
950 if (initrd_end > end_of_phys_memory) {
951 printk(KERN_CRIT "initrd extends beyond end of memory "
952 "(0x%016lx > 0x%016lx)\ndisabling initrd\n",
953 initrd_end, end_of_phys_memory);
954 initrd_start = 0;
David S. Millerd1112012006-03-08 02:16:07 -0800955 initrd_end = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700956 }
957 }
958#endif
David S. Miller6fc5bae2006-12-28 21:00:23 -0800959
960 if (cmdline_memory_size &&
961 bytes_avail > cmdline_memory_size)
962 trim_pavail(&bytes_avail,
963 &end_of_phys_memory);
964
965 *pages_avail = bytes_avail >> PAGE_SHIFT;
966
967 end_pfn = end_of_phys_memory >> PAGE_SHIFT;
968
Linus Torvalds1da177e2005-04-16 15:20:36 -0700969 /* Initialize the boot-time allocator. */
970 max_pfn = max_low_pfn = end_pfn;
David S. Millerd1112012006-03-08 02:16:07 -0800971 min_low_pfn = (phys_base >> PAGE_SHIFT);
972
973 bootmap_pfn = choose_bootmap_pfn(min_low_pfn, end_pfn);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700974
975#ifdef CONFIG_DEBUG_BOOTMEM
976 prom_printf("init_bootmem(min[%lx], bootmap[%lx], max[%lx])\n",
977 min_low_pfn, bootmap_pfn, max_low_pfn);
978#endif
David S. Millerd1112012006-03-08 02:16:07 -0800979 bootmap_size = init_bootmem_node(NODE_DATA(0), bootmap_pfn,
David S. Miller17b0e192006-03-08 15:57:03 -0800980 min_low_pfn, end_pfn);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700981
Linus Torvalds1da177e2005-04-16 15:20:36 -0700982 /* Now register the available physical memory with the
983 * allocator.
984 */
David S. Miller13edad72005-09-29 17:58:26 -0700985 for (i = 0; i < pavail_ents; i++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700986#ifdef CONFIG_DEBUG_BOOTMEM
David S. Miller13edad72005-09-29 17:58:26 -0700987 prom_printf("free_bootmem(pavail:%d): base[%lx] size[%lx]\n",
988 i, pavail[i].phys_addr, pavail[i].reg_size);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700989#endif
David S. Miller13edad72005-09-29 17:58:26 -0700990 free_bootmem(pavail[i].phys_addr, pavail[i].reg_size);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700991 }
992
993#ifdef CONFIG_BLK_DEV_INITRD
994 if (initrd_start) {
995 size = initrd_end - initrd_start;
996
Simon Arlotte5dd42e2007-05-11 13:52:08 -0700997 /* Reserve the initrd image area. */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700998#ifdef CONFIG_DEBUG_BOOTMEM
999 prom_printf("reserve_bootmem(initrd): base[%llx] size[%lx]\n",
1000 initrd_start, initrd_end);
1001#endif
1002 reserve_bootmem(initrd_start, size);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001003
1004 initrd_start += PAGE_OFFSET;
1005 initrd_end += PAGE_OFFSET;
1006 }
1007#endif
1008 /* Reserve the kernel text/data/bss. */
1009#ifdef CONFIG_DEBUG_BOOTMEM
1010 prom_printf("reserve_bootmem(kernel): base[%lx] size[%lx]\n", kern_base, kern_size);
1011#endif
1012 reserve_bootmem(kern_base, kern_size);
1013 *pages_avail -= PAGE_ALIGN(kern_size) >> PAGE_SHIFT;
1014
David S. Millerf1cfdb52007-03-15 22:52:18 -07001015 /* Add back in the initmem pages. */
1016 size = ((unsigned long)(__init_end) & PAGE_MASK) -
1017 PAGE_ALIGN((unsigned long)__init_begin);
1018 *pages_avail += size >> PAGE_SHIFT;
1019
Linus Torvalds1da177e2005-04-16 15:20:36 -07001020 /* Reserve the bootmem map. We do not account for it
1021 * in pages_avail because we will release that memory
1022 * in free_all_bootmem.
1023 */
1024 size = bootmap_size;
1025#ifdef CONFIG_DEBUG_BOOTMEM
1026 prom_printf("reserve_bootmem(bootmap): base[%lx] size[%lx]\n",
1027 (bootmap_pfn << PAGE_SHIFT), size);
1028#endif
1029 reserve_bootmem((bootmap_pfn << PAGE_SHIFT), size);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001030
David S. Millerd1112012006-03-08 02:16:07 -08001031 for (i = 0; i < pavail_ents; i++) {
1032 unsigned long start_pfn, end_pfn;
1033
1034 start_pfn = pavail[i].phys_addr >> PAGE_SHIFT;
1035 end_pfn = (start_pfn + (pavail[i].reg_size >> PAGE_SHIFT));
1036#ifdef CONFIG_DEBUG_BOOTMEM
1037 prom_printf("memory_present(0, %lx, %lx)\n",
1038 start_pfn, end_pfn);
1039#endif
1040 memory_present(0, start_pfn, end_pfn);
1041 }
1042
1043 sparse_init();
1044
Linus Torvalds1da177e2005-04-16 15:20:36 -07001045 return end_pfn;
1046}
1047
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001048static struct linux_prom64_registers pall[MAX_BANKS] __initdata;
1049static int pall_ents __initdata;
1050
David S. Miller56425302005-09-25 16:46:57 -07001051#ifdef CONFIG_DEBUG_PAGEALLOC
1052static unsigned long kernel_map_range(unsigned long pstart, unsigned long pend, pgprot_t prot)
1053{
1054 unsigned long vstart = PAGE_OFFSET + pstart;
1055 unsigned long vend = PAGE_OFFSET + pend;
1056 unsigned long alloc_bytes = 0UL;
1057
1058 if ((vstart & ~PAGE_MASK) || (vend & ~PAGE_MASK)) {
David S. Miller13edad72005-09-29 17:58:26 -07001059 prom_printf("kernel_map: Unaligned physmem[%lx:%lx]\n",
David S. Miller56425302005-09-25 16:46:57 -07001060 vstart, vend);
1061 prom_halt();
1062 }
1063
1064 while (vstart < vend) {
1065 unsigned long this_end, paddr = __pa(vstart);
1066 pgd_t *pgd = pgd_offset_k(vstart);
1067 pud_t *pud;
1068 pmd_t *pmd;
1069 pte_t *pte;
1070
1071 pud = pud_offset(pgd, vstart);
1072 if (pud_none(*pud)) {
1073 pmd_t *new;
1074
1075 new = __alloc_bootmem(PAGE_SIZE, PAGE_SIZE, PAGE_SIZE);
1076 alloc_bytes += PAGE_SIZE;
1077 pud_populate(&init_mm, pud, new);
1078 }
1079
1080 pmd = pmd_offset(pud, vstart);
1081 if (!pmd_present(*pmd)) {
1082 pte_t *new;
1083
1084 new = __alloc_bootmem(PAGE_SIZE, PAGE_SIZE, PAGE_SIZE);
1085 alloc_bytes += PAGE_SIZE;
1086 pmd_populate_kernel(&init_mm, pmd, new);
1087 }
1088
1089 pte = pte_offset_kernel(pmd, vstart);
1090 this_end = (vstart + PMD_SIZE) & PMD_MASK;
1091 if (this_end > vend)
1092 this_end = vend;
1093
1094 while (vstart < this_end) {
1095 pte_val(*pte) = (paddr | pgprot_val(prot));
1096
1097 vstart += PAGE_SIZE;
1098 paddr += PAGE_SIZE;
1099 pte++;
1100 }
1101 }
1102
1103 return alloc_bytes;
1104}
1105
David S. Miller56425302005-09-25 16:46:57 -07001106extern unsigned int kvmap_linear_patch[1];
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001107#endif /* CONFIG_DEBUG_PAGEALLOC */
1108
1109static void __init mark_kpte_bitmap(unsigned long start, unsigned long end)
1110{
1111 const unsigned long shift_256MB = 28;
1112 const unsigned long mask_256MB = ((1UL << shift_256MB) - 1UL);
1113 const unsigned long size_256MB = (1UL << shift_256MB);
1114
1115 while (start < end) {
1116 long remains;
1117
David S. Millerf7c00332006-03-05 22:18:50 -08001118 remains = end - start;
1119 if (remains < size_256MB)
1120 break;
1121
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001122 if (start & mask_256MB) {
1123 start = (start + size_256MB) & ~mask_256MB;
1124 continue;
1125 }
1126
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001127 while (remains >= size_256MB) {
1128 unsigned long index = start >> shift_256MB;
1129
1130 __set_bit(index, kpte_linear_bitmap);
1131
1132 start += size_256MB;
1133 remains -= size_256MB;
1134 }
1135 }
1136}
David S. Miller56425302005-09-25 16:46:57 -07001137
1138static void __init kernel_physical_mapping_init(void)
1139{
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001140 unsigned long i;
1141#ifdef CONFIG_DEBUG_PAGEALLOC
1142 unsigned long mem_alloced = 0UL;
1143#endif
David S. Miller56425302005-09-25 16:46:57 -07001144
David S. Miller13edad72005-09-29 17:58:26 -07001145 read_obp_memory("reg", &pall[0], &pall_ents);
1146
1147 for (i = 0; i < pall_ents; i++) {
David S. Miller56425302005-09-25 16:46:57 -07001148 unsigned long phys_start, phys_end;
1149
David S. Miller13edad72005-09-29 17:58:26 -07001150 phys_start = pall[i].phys_addr;
1151 phys_end = phys_start + pall[i].reg_size;
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001152
1153 mark_kpte_bitmap(phys_start, phys_end);
1154
1155#ifdef CONFIG_DEBUG_PAGEALLOC
David S. Miller56425302005-09-25 16:46:57 -07001156 mem_alloced += kernel_map_range(phys_start, phys_end,
1157 PAGE_KERNEL);
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001158#endif
David S. Miller56425302005-09-25 16:46:57 -07001159 }
1160
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001161#ifdef CONFIG_DEBUG_PAGEALLOC
David S. Miller56425302005-09-25 16:46:57 -07001162 printk("Allocated %ld bytes for kernel page tables.\n",
1163 mem_alloced);
1164
1165 kvmap_linear_patch[0] = 0x01000000; /* nop */
1166 flushi(&kvmap_linear_patch[0]);
1167
1168 __flush_tlb_all();
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001169#endif
David S. Miller56425302005-09-25 16:46:57 -07001170}
1171
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001172#ifdef CONFIG_DEBUG_PAGEALLOC
David S. Miller56425302005-09-25 16:46:57 -07001173void kernel_map_pages(struct page *page, int numpages, int enable)
1174{
1175 unsigned long phys_start = page_to_pfn(page) << PAGE_SHIFT;
1176 unsigned long phys_end = phys_start + (numpages * PAGE_SIZE);
1177
1178 kernel_map_range(phys_start, phys_end,
1179 (enable ? PAGE_KERNEL : __pgprot(0)));
1180
David S. Miller74bf4312006-01-31 18:29:18 -08001181 flush_tsb_kernel_range(PAGE_OFFSET + phys_start,
1182 PAGE_OFFSET + phys_end);
1183
David S. Miller56425302005-09-25 16:46:57 -07001184 /* we should perform an IPI and flush all tlbs,
1185 * but that can deadlock->flush only current cpu.
1186 */
1187 __flush_tlb_kernel_range(PAGE_OFFSET + phys_start,
1188 PAGE_OFFSET + phys_end);
1189}
1190#endif
1191
David S. Miller10147572005-09-28 21:46:43 -07001192unsigned long __init find_ecache_flush_span(unsigned long size)
1193{
David S. Miller13edad72005-09-29 17:58:26 -07001194 int i;
David S. Miller10147572005-09-28 21:46:43 -07001195
David S. Miller13edad72005-09-29 17:58:26 -07001196 for (i = 0; i < pavail_ents; i++) {
1197 if (pavail[i].reg_size >= size)
1198 return pavail[i].phys_addr;
David S. Miller10147572005-09-28 21:46:43 -07001199 }
1200
1201 return ~0UL;
1202}
1203
David S. Miller517af332006-02-01 15:55:21 -08001204static void __init tsb_phys_patch(void)
1205{
David S. Millerd257d5d2006-02-06 23:44:37 -08001206 struct tsb_ldquad_phys_patch_entry *pquad;
David S. Miller517af332006-02-01 15:55:21 -08001207 struct tsb_phys_patch_entry *p;
1208
David S. Millerd257d5d2006-02-06 23:44:37 -08001209 pquad = &__tsb_ldquad_phys_patch;
1210 while (pquad < &__tsb_ldquad_phys_patch_end) {
1211 unsigned long addr = pquad->addr;
1212
1213 if (tlb_type == hypervisor)
1214 *(unsigned int *) addr = pquad->sun4v_insn;
1215 else
1216 *(unsigned int *) addr = pquad->sun4u_insn;
1217 wmb();
1218 __asm__ __volatile__("flush %0"
1219 : /* no outputs */
1220 : "r" (addr));
1221
1222 pquad++;
1223 }
1224
David S. Miller517af332006-02-01 15:55:21 -08001225 p = &__tsb_phys_patch;
1226 while (p < &__tsb_phys_patch_end) {
1227 unsigned long addr = p->addr;
1228
1229 *(unsigned int *) addr = p->insn;
1230 wmb();
1231 __asm__ __volatile__("flush %0"
1232 : /* no outputs */
1233 : "r" (addr));
1234
1235 p++;
1236 }
1237}
1238
David S. Miller490384e2006-02-11 14:41:18 -08001239/* Don't mark as init, we give this to the Hypervisor. */
David S. Millerd1acb422007-03-16 17:20:28 -07001240#ifndef CONFIG_DEBUG_PAGEALLOC
1241#define NUM_KTSB_DESCR 2
1242#else
1243#define NUM_KTSB_DESCR 1
1244#endif
1245static struct hv_tsb_descr ktsb_descr[NUM_KTSB_DESCR];
David S. Miller490384e2006-02-11 14:41:18 -08001246extern struct tsb swapper_tsb[KERNEL_TSB_NENTRIES];
1247
1248static void __init sun4v_ktsb_init(void)
1249{
1250 unsigned long ktsb_pa;
1251
David S. Millerd7744a02006-02-21 22:31:11 -08001252 /* First KTSB for PAGE_SIZE mappings. */
David S. Miller490384e2006-02-11 14:41:18 -08001253 ktsb_pa = kern_base + ((unsigned long)&swapper_tsb[0] - KERNBASE);
1254
1255 switch (PAGE_SIZE) {
1256 case 8 * 1024:
1257 default:
1258 ktsb_descr[0].pgsz_idx = HV_PGSZ_IDX_8K;
1259 ktsb_descr[0].pgsz_mask = HV_PGSZ_MASK_8K;
1260 break;
1261
1262 case 64 * 1024:
1263 ktsb_descr[0].pgsz_idx = HV_PGSZ_IDX_64K;
1264 ktsb_descr[0].pgsz_mask = HV_PGSZ_MASK_64K;
1265 break;
1266
1267 case 512 * 1024:
1268 ktsb_descr[0].pgsz_idx = HV_PGSZ_IDX_512K;
1269 ktsb_descr[0].pgsz_mask = HV_PGSZ_MASK_512K;
1270 break;
1271
1272 case 4 * 1024 * 1024:
1273 ktsb_descr[0].pgsz_idx = HV_PGSZ_IDX_4MB;
1274 ktsb_descr[0].pgsz_mask = HV_PGSZ_MASK_4MB;
1275 break;
1276 };
1277
David S. Miller3f19a842006-02-17 12:03:20 -08001278 ktsb_descr[0].assoc = 1;
David S. Miller490384e2006-02-11 14:41:18 -08001279 ktsb_descr[0].num_ttes = KERNEL_TSB_NENTRIES;
1280 ktsb_descr[0].ctx_idx = 0;
1281 ktsb_descr[0].tsb_base = ktsb_pa;
1282 ktsb_descr[0].resv = 0;
1283
David S. Millerd1acb422007-03-16 17:20:28 -07001284#ifndef CONFIG_DEBUG_PAGEALLOC
David S. Millerd7744a02006-02-21 22:31:11 -08001285 /* Second KTSB for 4MB/256MB mappings. */
1286 ktsb_pa = (kern_base +
1287 ((unsigned long)&swapper_4m_tsb[0] - KERNBASE));
1288
1289 ktsb_descr[1].pgsz_idx = HV_PGSZ_IDX_4MB;
1290 ktsb_descr[1].pgsz_mask = (HV_PGSZ_MASK_4MB |
1291 HV_PGSZ_MASK_256MB);
1292 ktsb_descr[1].assoc = 1;
1293 ktsb_descr[1].num_ttes = KERNEL_TSB4M_NENTRIES;
1294 ktsb_descr[1].ctx_idx = 0;
1295 ktsb_descr[1].tsb_base = ktsb_pa;
1296 ktsb_descr[1].resv = 0;
David S. Millerd1acb422007-03-16 17:20:28 -07001297#endif
David S. Miller490384e2006-02-11 14:41:18 -08001298}
1299
1300void __cpuinit sun4v_ktsb_register(void)
1301{
David S. Miller7db35f32007-05-29 02:22:14 -07001302 unsigned long pa, ret;
David S. Miller490384e2006-02-11 14:41:18 -08001303
1304 pa = kern_base + ((unsigned long)&ktsb_descr[0] - KERNBASE);
1305
David S. Miller7db35f32007-05-29 02:22:14 -07001306 ret = sun4v_mmu_tsb_ctx0(NUM_KTSB_DESCR, pa);
1307 if (ret != 0) {
1308 prom_printf("hypervisor_mmu_tsb_ctx0[%lx]: "
1309 "errors with %lx\n", pa, ret);
1310 prom_halt();
1311 }
David S. Miller490384e2006-02-11 14:41:18 -08001312}
1313
Linus Torvalds1da177e2005-04-16 15:20:36 -07001314/* paging_init() sets up the page tables */
1315
1316extern void cheetah_ecache_flush_init(void);
David S. Millerd257d5d2006-02-06 23:44:37 -08001317extern void sun4v_patch_tlb_handlers(void);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001318
David S. Miller5cbc3072007-05-25 15:49:59 -07001319extern void cpu_probe(void);
1320extern void central_probe(void);
1321
Linus Torvalds1da177e2005-04-16 15:20:36 -07001322static unsigned long last_valid_pfn;
David S. Miller56425302005-09-25 16:46:57 -07001323pgd_t swapper_pg_dir[2048];
Linus Torvalds1da177e2005-04-16 15:20:36 -07001324
David S. Millerc4bce902006-02-11 21:57:54 -08001325static void sun4u_pgprot_init(void);
1326static void sun4v_pgprot_init(void);
1327
Linus Torvalds1da177e2005-04-16 15:20:36 -07001328void __init paging_init(void)
1329{
David S. Millerd1112012006-03-08 02:16:07 -08001330 unsigned long end_pfn, pages_avail, shift, phys_base;
David S. Miller0836a0e2005-09-28 21:38:08 -07001331 unsigned long real_end, i;
1332
David S. Miller22adb352007-05-26 01:14:43 -07001333 /* These build time checkes make sure that the dcache_dirty_cpu()
1334 * page->flags usage will work.
1335 *
1336 * When a page gets marked as dcache-dirty, we store the
1337 * cpu number starting at bit 32 in the page->flags. Also,
1338 * functions like clear_dcache_dirty_cpu use the cpu mask
1339 * in 13-bit signed-immediate instruction fields.
1340 */
1341 BUILD_BUG_ON(FLAGS_RESERVED != 32);
1342 BUILD_BUG_ON(SECTIONS_WIDTH + NODES_WIDTH + ZONES_WIDTH +
1343 ilog2(roundup_pow_of_two(NR_CPUS)) > FLAGS_RESERVED);
1344 BUILD_BUG_ON(NR_CPUS > 4096);
1345
David S. Miller481295f2006-02-07 21:51:08 -08001346 kern_base = (prom_boot_mapping_phys_low >> 22UL) << 22UL;
1347 kern_size = (unsigned long)&_end - (unsigned long)KERNBASE;
1348
David S. Miller22d6a1c2007-05-25 00:37:12 -07001349 sstate_booting();
1350
David S. Millerd7744a02006-02-21 22:31:11 -08001351 /* Invalidate both kernel TSBs. */
David S. Miller8b234272006-02-17 18:01:02 -08001352 memset(swapper_tsb, 0x40, sizeof(swapper_tsb));
David S. Millerd1acb422007-03-16 17:20:28 -07001353#ifndef CONFIG_DEBUG_PAGEALLOC
David S. Millerd7744a02006-02-21 22:31:11 -08001354 memset(swapper_4m_tsb, 0x40, sizeof(swapper_4m_tsb));
David S. Millerd1acb422007-03-16 17:20:28 -07001355#endif
David S. Miller8b234272006-02-17 18:01:02 -08001356
David S. Millerc4bce902006-02-11 21:57:54 -08001357 if (tlb_type == hypervisor)
1358 sun4v_pgprot_init();
1359 else
1360 sun4u_pgprot_init();
1361
David S. Millerd257d5d2006-02-06 23:44:37 -08001362 if (tlb_type == cheetah_plus ||
1363 tlb_type == hypervisor)
David S. Miller517af332006-02-01 15:55:21 -08001364 tsb_phys_patch();
1365
David S. Miller490384e2006-02-11 14:41:18 -08001366 if (tlb_type == hypervisor) {
David S. Millerd257d5d2006-02-06 23:44:37 -08001367 sun4v_patch_tlb_handlers();
David S. Miller490384e2006-02-11 14:41:18 -08001368 sun4v_ktsb_init();
1369 }
David S. Millerd257d5d2006-02-06 23:44:37 -08001370
David S. Miller13edad72005-09-29 17:58:26 -07001371 /* Find available physical memory... */
1372 read_obp_memory("available", &pavail[0], &pavail_ents);
David S. Miller0836a0e2005-09-28 21:38:08 -07001373
1374 phys_base = 0xffffffffffffffffUL;
David S. Miller13edad72005-09-29 17:58:26 -07001375 for (i = 0; i < pavail_ents; i++)
1376 phys_base = min(phys_base, pavail[i].phys_addr);
David S. Miller0836a0e2005-09-28 21:38:08 -07001377
Linus Torvalds1da177e2005-04-16 15:20:36 -07001378 set_bit(0, mmu_context_bmap);
1379
David S. Miller2bdb3cb2005-09-22 01:08:57 -07001380 shift = kern_base + PAGE_OFFSET - ((unsigned long)KERNBASE);
1381
Linus Torvalds1da177e2005-04-16 15:20:36 -07001382 real_end = (unsigned long)_end;
1383 if ((real_end > ((unsigned long)KERNBASE + 0x400000)))
1384 bigkernel = 1;
David S. Miller2bdb3cb2005-09-22 01:08:57 -07001385 if ((real_end > ((unsigned long)KERNBASE + 0x800000))) {
1386 prom_printf("paging_init: Kernel > 8MB, too large.\n");
1387 prom_halt();
Linus Torvalds1da177e2005-04-16 15:20:36 -07001388 }
David S. Miller2bdb3cb2005-09-22 01:08:57 -07001389
1390 /* Set kernel pgd to upper alias so physical page computations
Linus Torvalds1da177e2005-04-16 15:20:36 -07001391 * work.
1392 */
1393 init_mm.pgd += ((shift) / (sizeof(pgd_t)));
1394
David S. Miller56425302005-09-25 16:46:57 -07001395 memset(swapper_low_pmd_dir, 0, sizeof(swapper_low_pmd_dir));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001396
1397 /* Now can init the kernel/bad page tables. */
1398 pud_set(pud_offset(&swapper_pg_dir[0], 0),
David S. Miller56425302005-09-25 16:46:57 -07001399 swapper_low_pmd_dir + (shift / sizeof(pgd_t)));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001400
David S. Millerc9c10832005-10-12 12:22:46 -07001401 inherit_prom_mappings();
David S. Miller5085b4a2005-09-22 00:45:41 -07001402
David S. Millera8b900d2006-01-31 18:33:37 -08001403 /* Ok, we can use our TLB miss and window trap handlers safely. */
1404 setup_tba();
Linus Torvalds1da177e2005-04-16 15:20:36 -07001405
David S. Millerc9c10832005-10-12 12:22:46 -07001406 __flush_tlb_all();
David S. Miller9ad98c52005-10-05 15:12:00 -07001407
David S. Miller490384e2006-02-11 14:41:18 -08001408 if (tlb_type == hypervisor)
1409 sun4v_ktsb_register();
1410
David S. Miller2bdb3cb2005-09-22 01:08:57 -07001411 /* Setup bootmem... */
1412 pages_avail = 0;
David S. Millerd1112012006-03-08 02:16:07 -08001413 last_valid_pfn = end_pfn = bootmem_init(&pages_avail, phys_base);
1414
David S. Miller17b0e192006-03-08 15:57:03 -08001415 max_mapnr = last_valid_pfn;
David S. Miller2bdb3cb2005-09-22 01:08:57 -07001416
David S. Miller56425302005-09-25 16:46:57 -07001417 kernel_physical_mapping_init();
David S. Miller56425302005-09-25 16:46:57 -07001418
David S. Miller5cbc3072007-05-25 15:49:59 -07001419 real_setup_per_cpu_areas();
1420
David S. Miller372b07b2006-06-21 15:35:28 -07001421 prom_build_devicetree();
1422
David S. Miller5cbc3072007-05-25 15:49:59 -07001423 if (tlb_type == hypervisor)
1424 sun4v_mdesc_init();
1425
Linus Torvalds1da177e2005-04-16 15:20:36 -07001426 {
1427 unsigned long zones_size[MAX_NR_ZONES];
1428 unsigned long zholes_size[MAX_NR_ZONES];
Linus Torvalds1da177e2005-04-16 15:20:36 -07001429 int znum;
1430
1431 for (znum = 0; znum < MAX_NR_ZONES; znum++)
1432 zones_size[znum] = zholes_size[znum] = 0;
1433
David S. Miller1b51d3a2007-02-12 00:13:31 -08001434 zones_size[ZONE_NORMAL] = end_pfn;
1435 zholes_size[ZONE_NORMAL] = end_pfn - pages_avail;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001436
1437 free_area_init_node(0, &contig_page_data, zones_size,
David S. Miller17b0e192006-03-08 15:57:03 -08001438 __pa(PAGE_OFFSET) >> PAGE_SHIFT,
1439 zholes_size);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001440 }
1441
David S. Miller5cbc3072007-05-25 15:49:59 -07001442 prom_printf("Booting Linux...\n");
1443
1444 central_probe();
1445 cpu_probe();
Linus Torvalds1da177e2005-04-16 15:20:36 -07001446}
1447
Linus Torvalds1da177e2005-04-16 15:20:36 -07001448static void __init taint_real_pages(void)
1449{
Linus Torvalds1da177e2005-04-16 15:20:36 -07001450 int i;
1451
David S. Miller13edad72005-09-29 17:58:26 -07001452 read_obp_memory("available", &pavail_rescan[0], &pavail_rescan_ents);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001453
David S. Miller13edad72005-09-29 17:58:26 -07001454 /* Find changes discovered in the physmem available rescan and
Linus Torvalds1da177e2005-04-16 15:20:36 -07001455 * reserve the lost portions in the bootmem maps.
1456 */
David S. Miller13edad72005-09-29 17:58:26 -07001457 for (i = 0; i < pavail_ents; i++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001458 unsigned long old_start, old_end;
1459
David S. Miller13edad72005-09-29 17:58:26 -07001460 old_start = pavail[i].phys_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001461 old_end = old_start +
David S. Miller13edad72005-09-29 17:58:26 -07001462 pavail[i].reg_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001463 while (old_start < old_end) {
1464 int n;
1465
David S. Millerc2a5a462006-06-22 00:01:56 -07001466 for (n = 0; n < pavail_rescan_ents; n++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001467 unsigned long new_start, new_end;
1468
David S. Miller13edad72005-09-29 17:58:26 -07001469 new_start = pavail_rescan[n].phys_addr;
1470 new_end = new_start +
1471 pavail_rescan[n].reg_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001472
1473 if (new_start <= old_start &&
1474 new_end >= (old_start + PAGE_SIZE)) {
David S. Miller13edad72005-09-29 17:58:26 -07001475 set_bit(old_start >> 22,
1476 sparc64_valid_addr_bitmap);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001477 goto do_next_page;
1478 }
1479 }
1480 reserve_bootmem(old_start, PAGE_SIZE);
1481
1482 do_next_page:
1483 old_start += PAGE_SIZE;
1484 }
1485 }
1486}
1487
David S. Millerc2a5a462006-06-22 00:01:56 -07001488int __init page_in_phys_avail(unsigned long paddr)
1489{
1490 int i;
1491
1492 paddr &= PAGE_MASK;
1493
1494 for (i = 0; i < pavail_rescan_ents; i++) {
1495 unsigned long start, end;
1496
1497 start = pavail_rescan[i].phys_addr;
1498 end = start + pavail_rescan[i].reg_size;
1499
1500 if (paddr >= start && paddr < end)
1501 return 1;
1502 }
1503 if (paddr >= kern_base && paddr < (kern_base + kern_size))
1504 return 1;
1505#ifdef CONFIG_BLK_DEV_INITRD
1506 if (paddr >= __pa(initrd_start) &&
1507 paddr < __pa(PAGE_ALIGN(initrd_end)))
1508 return 1;
1509#endif
1510
1511 return 0;
1512}
1513
Linus Torvalds1da177e2005-04-16 15:20:36 -07001514void __init mem_init(void)
1515{
1516 unsigned long codepages, datapages, initpages;
1517 unsigned long addr, last;
1518 int i;
1519
1520 i = last_valid_pfn >> ((22 - PAGE_SHIFT) + 6);
1521 i += 1;
David S. Miller2bdb3cb2005-09-22 01:08:57 -07001522 sparc64_valid_addr_bitmap = (unsigned long *) alloc_bootmem(i << 3);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001523 if (sparc64_valid_addr_bitmap == NULL) {
1524 prom_printf("mem_init: Cannot alloc valid_addr_bitmap.\n");
1525 prom_halt();
1526 }
1527 memset(sparc64_valid_addr_bitmap, 0, i << 3);
1528
1529 addr = PAGE_OFFSET + kern_base;
1530 last = PAGE_ALIGN(kern_size) + addr;
1531 while (addr < last) {
1532 set_bit(__pa(addr) >> 22, sparc64_valid_addr_bitmap);
1533 addr += PAGE_SIZE;
1534 }
1535
1536 taint_real_pages();
1537
Linus Torvalds1da177e2005-04-16 15:20:36 -07001538 high_memory = __va(last_valid_pfn << PAGE_SHIFT);
1539
1540#ifdef CONFIG_DEBUG_BOOTMEM
1541 prom_printf("mem_init: Calling free_all_bootmem().\n");
1542#endif
David S. Millerf1cfdb52007-03-15 22:52:18 -07001543
1544 /* We subtract one to account for the mem_map_zero page
1545 * allocated below.
1546 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001547 totalram_pages = num_physpages = free_all_bootmem() - 1;
1548
1549 /*
1550 * Set up the zero page, mark it reserved, so that page count
1551 * is not manipulated when freeing the page from user ptes.
1552 */
1553 mem_map_zero = alloc_pages(GFP_KERNEL|__GFP_ZERO, 0);
1554 if (mem_map_zero == NULL) {
1555 prom_printf("paging_init: Cannot alloc zero page.\n");
1556 prom_halt();
1557 }
1558 SetPageReserved(mem_map_zero);
1559
1560 codepages = (((unsigned long) _etext) - ((unsigned long) _start));
1561 codepages = PAGE_ALIGN(codepages) >> PAGE_SHIFT;
1562 datapages = (((unsigned long) _edata) - ((unsigned long) _etext));
1563 datapages = PAGE_ALIGN(datapages) >> PAGE_SHIFT;
1564 initpages = (((unsigned long) __init_end) - ((unsigned long) __init_begin));
1565 initpages = PAGE_ALIGN(initpages) >> PAGE_SHIFT;
1566
Christoph Lameter96177292007-02-10 01:43:03 -08001567 printk("Memory: %luk available (%ldk kernel code, %ldk data, %ldk init) [%016lx,%016lx]\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -07001568 nr_free_pages() << (PAGE_SHIFT-10),
1569 codepages << (PAGE_SHIFT-10),
1570 datapages << (PAGE_SHIFT-10),
1571 initpages << (PAGE_SHIFT-10),
1572 PAGE_OFFSET, (last_valid_pfn << PAGE_SHIFT));
1573
1574 if (tlb_type == cheetah || tlb_type == cheetah_plus)
1575 cheetah_ecache_flush_init();
1576}
1577
David S. Miller898cf0e2005-09-23 11:59:44 -07001578void free_initmem(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001579{
1580 unsigned long addr, initend;
1581
1582 /*
1583 * The init section is aligned to 8k in vmlinux.lds. Page align for >8k pagesizes.
1584 */
1585 addr = PAGE_ALIGN((unsigned long)(__init_begin));
1586 initend = (unsigned long)(__init_end) & PAGE_MASK;
1587 for (; addr < initend; addr += PAGE_SIZE) {
1588 unsigned long page;
1589 struct page *p;
1590
1591 page = (addr +
1592 ((unsigned long) __va(kern_base)) -
1593 ((unsigned long) KERNBASE));
Randy Dunlapc9cf5522006-06-27 02:53:52 -07001594 memset((void *)addr, POISON_FREE_INITMEM, PAGE_SIZE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001595 p = virt_to_page(page);
1596
1597 ClearPageReserved(p);
Nick Piggin7835e982006-03-22 00:08:40 -08001598 init_page_count(p);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001599 __free_page(p);
1600 num_physpages++;
1601 totalram_pages++;
1602 }
1603}
1604
1605#ifdef CONFIG_BLK_DEV_INITRD
1606void free_initrd_mem(unsigned long start, unsigned long end)
1607{
1608 if (start < end)
1609 printk ("Freeing initrd memory: %ldk freed\n", (end - start) >> 10);
1610 for (; start < end; start += PAGE_SIZE) {
1611 struct page *p = virt_to_page(start);
1612
1613 ClearPageReserved(p);
Nick Piggin7835e982006-03-22 00:08:40 -08001614 init_page_count(p);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001615 __free_page(p);
1616 num_physpages++;
1617 totalram_pages++;
1618 }
1619}
1620#endif
David S. Millerc4bce902006-02-11 21:57:54 -08001621
David S. Millerc4bce902006-02-11 21:57:54 -08001622#define _PAGE_CACHE_4U (_PAGE_CP_4U | _PAGE_CV_4U)
1623#define _PAGE_CACHE_4V (_PAGE_CP_4V | _PAGE_CV_4V)
1624#define __DIRTY_BITS_4U (_PAGE_MODIFIED_4U | _PAGE_WRITE_4U | _PAGE_W_4U)
1625#define __DIRTY_BITS_4V (_PAGE_MODIFIED_4V | _PAGE_WRITE_4V | _PAGE_W_4V)
1626#define __ACCESS_BITS_4U (_PAGE_ACCESSED_4U | _PAGE_READ_4U | _PAGE_R)
1627#define __ACCESS_BITS_4V (_PAGE_ACCESSED_4V | _PAGE_READ_4V | _PAGE_R)
1628
1629pgprot_t PAGE_KERNEL __read_mostly;
1630EXPORT_SYMBOL(PAGE_KERNEL);
1631
1632pgprot_t PAGE_KERNEL_LOCKED __read_mostly;
1633pgprot_t PAGE_COPY __read_mostly;
David S. Miller0f159522006-02-18 12:43:16 -08001634
1635pgprot_t PAGE_SHARED __read_mostly;
1636EXPORT_SYMBOL(PAGE_SHARED);
1637
David S. Millerc4bce902006-02-11 21:57:54 -08001638pgprot_t PAGE_EXEC __read_mostly;
1639unsigned long pg_iobits __read_mostly;
1640
1641unsigned long _PAGE_IE __read_mostly;
David S. Miller987c74f2006-06-25 01:34:43 -07001642EXPORT_SYMBOL(_PAGE_IE);
David S. Millerb2bef442006-02-23 01:55:55 -08001643
David S. Millerc4bce902006-02-11 21:57:54 -08001644unsigned long _PAGE_E __read_mostly;
David S. Millerb2bef442006-02-23 01:55:55 -08001645EXPORT_SYMBOL(_PAGE_E);
1646
David S. Millerc4bce902006-02-11 21:57:54 -08001647unsigned long _PAGE_CACHE __read_mostly;
David S. Millerb2bef442006-02-23 01:55:55 -08001648EXPORT_SYMBOL(_PAGE_CACHE);
David S. Millerc4bce902006-02-11 21:57:54 -08001649
1650static void prot_init_common(unsigned long page_none,
1651 unsigned long page_shared,
1652 unsigned long page_copy,
1653 unsigned long page_readonly,
1654 unsigned long page_exec_bit)
1655{
1656 PAGE_COPY = __pgprot(page_copy);
David S. Miller0f159522006-02-18 12:43:16 -08001657 PAGE_SHARED = __pgprot(page_shared);
David S. Millerc4bce902006-02-11 21:57:54 -08001658
1659 protection_map[0x0] = __pgprot(page_none);
1660 protection_map[0x1] = __pgprot(page_readonly & ~page_exec_bit);
1661 protection_map[0x2] = __pgprot(page_copy & ~page_exec_bit);
1662 protection_map[0x3] = __pgprot(page_copy & ~page_exec_bit);
1663 protection_map[0x4] = __pgprot(page_readonly);
1664 protection_map[0x5] = __pgprot(page_readonly);
1665 protection_map[0x6] = __pgprot(page_copy);
1666 protection_map[0x7] = __pgprot(page_copy);
1667 protection_map[0x8] = __pgprot(page_none);
1668 protection_map[0x9] = __pgprot(page_readonly & ~page_exec_bit);
1669 protection_map[0xa] = __pgprot(page_shared & ~page_exec_bit);
1670 protection_map[0xb] = __pgprot(page_shared & ~page_exec_bit);
1671 protection_map[0xc] = __pgprot(page_readonly);
1672 protection_map[0xd] = __pgprot(page_readonly);
1673 protection_map[0xe] = __pgprot(page_shared);
1674 protection_map[0xf] = __pgprot(page_shared);
1675}
1676
1677static void __init sun4u_pgprot_init(void)
1678{
1679 unsigned long page_none, page_shared, page_copy, page_readonly;
1680 unsigned long page_exec_bit;
1681
1682 PAGE_KERNEL = __pgprot (_PAGE_PRESENT_4U | _PAGE_VALID |
1683 _PAGE_CACHE_4U | _PAGE_P_4U |
1684 __ACCESS_BITS_4U | __DIRTY_BITS_4U |
1685 _PAGE_EXEC_4U);
1686 PAGE_KERNEL_LOCKED = __pgprot (_PAGE_PRESENT_4U | _PAGE_VALID |
1687 _PAGE_CACHE_4U | _PAGE_P_4U |
1688 __ACCESS_BITS_4U | __DIRTY_BITS_4U |
1689 _PAGE_EXEC_4U | _PAGE_L_4U);
1690 PAGE_EXEC = __pgprot(_PAGE_EXEC_4U);
1691
1692 _PAGE_IE = _PAGE_IE_4U;
1693 _PAGE_E = _PAGE_E_4U;
1694 _PAGE_CACHE = _PAGE_CACHE_4U;
1695
1696 pg_iobits = (_PAGE_VALID | _PAGE_PRESENT_4U | __DIRTY_BITS_4U |
1697 __ACCESS_BITS_4U | _PAGE_E_4U);
1698
David S. Millerd1acb422007-03-16 17:20:28 -07001699#ifdef CONFIG_DEBUG_PAGEALLOC
1700 kern_linear_pte_xor[0] = (_PAGE_VALID | _PAGE_SZBITS_4U) ^
1701 0xfffff80000000000;
1702#else
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001703 kern_linear_pte_xor[0] = (_PAGE_VALID | _PAGE_SZ4MB_4U) ^
David S. Millerc4bce902006-02-11 21:57:54 -08001704 0xfffff80000000000;
David S. Millerd1acb422007-03-16 17:20:28 -07001705#endif
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001706 kern_linear_pte_xor[0] |= (_PAGE_CP_4U | _PAGE_CV_4U |
1707 _PAGE_P_4U | _PAGE_W_4U);
1708
1709 /* XXX Should use 256MB on Panther. XXX */
1710 kern_linear_pte_xor[1] = kern_linear_pte_xor[0];
David S. Millerc4bce902006-02-11 21:57:54 -08001711
1712 _PAGE_SZBITS = _PAGE_SZBITS_4U;
1713 _PAGE_ALL_SZ_BITS = (_PAGE_SZ4MB_4U | _PAGE_SZ512K_4U |
1714 _PAGE_SZ64K_4U | _PAGE_SZ8K_4U |
1715 _PAGE_SZ32MB_4U | _PAGE_SZ256MB_4U);
1716
1717
1718 page_none = _PAGE_PRESENT_4U | _PAGE_ACCESSED_4U | _PAGE_CACHE_4U;
1719 page_shared = (_PAGE_VALID | _PAGE_PRESENT_4U | _PAGE_CACHE_4U |
1720 __ACCESS_BITS_4U | _PAGE_WRITE_4U | _PAGE_EXEC_4U);
1721 page_copy = (_PAGE_VALID | _PAGE_PRESENT_4U | _PAGE_CACHE_4U |
1722 __ACCESS_BITS_4U | _PAGE_EXEC_4U);
1723 page_readonly = (_PAGE_VALID | _PAGE_PRESENT_4U | _PAGE_CACHE_4U |
1724 __ACCESS_BITS_4U | _PAGE_EXEC_4U);
1725
1726 page_exec_bit = _PAGE_EXEC_4U;
1727
1728 prot_init_common(page_none, page_shared, page_copy, page_readonly,
1729 page_exec_bit);
1730}
1731
1732static void __init sun4v_pgprot_init(void)
1733{
1734 unsigned long page_none, page_shared, page_copy, page_readonly;
1735 unsigned long page_exec_bit;
1736
1737 PAGE_KERNEL = __pgprot (_PAGE_PRESENT_4V | _PAGE_VALID |
1738 _PAGE_CACHE_4V | _PAGE_P_4V |
1739 __ACCESS_BITS_4V | __DIRTY_BITS_4V |
1740 _PAGE_EXEC_4V);
1741 PAGE_KERNEL_LOCKED = PAGE_KERNEL;
1742 PAGE_EXEC = __pgprot(_PAGE_EXEC_4V);
1743
1744 _PAGE_IE = _PAGE_IE_4V;
1745 _PAGE_E = _PAGE_E_4V;
1746 _PAGE_CACHE = _PAGE_CACHE_4V;
1747
David S. Millerd1acb422007-03-16 17:20:28 -07001748#ifdef CONFIG_DEBUG_PAGEALLOC
1749 kern_linear_pte_xor[0] = (_PAGE_VALID | _PAGE_SZBITS_4V) ^
1750 0xfffff80000000000;
1751#else
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001752 kern_linear_pte_xor[0] = (_PAGE_VALID | _PAGE_SZ4MB_4V) ^
David S. Millerc4bce902006-02-11 21:57:54 -08001753 0xfffff80000000000;
David S. Millerd1acb422007-03-16 17:20:28 -07001754#endif
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001755 kern_linear_pte_xor[0] |= (_PAGE_CP_4V | _PAGE_CV_4V |
1756 _PAGE_P_4V | _PAGE_W_4V);
1757
David S. Millerd1acb422007-03-16 17:20:28 -07001758#ifdef CONFIG_DEBUG_PAGEALLOC
1759 kern_linear_pte_xor[1] = (_PAGE_VALID | _PAGE_SZBITS_4V) ^
1760 0xfffff80000000000;
1761#else
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001762 kern_linear_pte_xor[1] = (_PAGE_VALID | _PAGE_SZ256MB_4V) ^
1763 0xfffff80000000000;
David S. Millerd1acb422007-03-16 17:20:28 -07001764#endif
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001765 kern_linear_pte_xor[1] |= (_PAGE_CP_4V | _PAGE_CV_4V |
1766 _PAGE_P_4V | _PAGE_W_4V);
David S. Millerc4bce902006-02-11 21:57:54 -08001767
1768 pg_iobits = (_PAGE_VALID | _PAGE_PRESENT_4V | __DIRTY_BITS_4V |
1769 __ACCESS_BITS_4V | _PAGE_E_4V);
1770
1771 _PAGE_SZBITS = _PAGE_SZBITS_4V;
1772 _PAGE_ALL_SZ_BITS = (_PAGE_SZ16GB_4V | _PAGE_SZ2GB_4V |
1773 _PAGE_SZ256MB_4V | _PAGE_SZ32MB_4V |
1774 _PAGE_SZ4MB_4V | _PAGE_SZ512K_4V |
1775 _PAGE_SZ64K_4V | _PAGE_SZ8K_4V);
1776
1777 page_none = _PAGE_PRESENT_4V | _PAGE_ACCESSED_4V | _PAGE_CACHE_4V;
1778 page_shared = (_PAGE_VALID | _PAGE_PRESENT_4V | _PAGE_CACHE_4V |
1779 __ACCESS_BITS_4V | _PAGE_WRITE_4V | _PAGE_EXEC_4V);
1780 page_copy = (_PAGE_VALID | _PAGE_PRESENT_4V | _PAGE_CACHE_4V |
1781 __ACCESS_BITS_4V | _PAGE_EXEC_4V);
1782 page_readonly = (_PAGE_VALID | _PAGE_PRESENT_4V | _PAGE_CACHE_4V |
1783 __ACCESS_BITS_4V | _PAGE_EXEC_4V);
1784
1785 page_exec_bit = _PAGE_EXEC_4V;
1786
1787 prot_init_common(page_none, page_shared, page_copy, page_readonly,
1788 page_exec_bit);
1789}
1790
1791unsigned long pte_sz_bits(unsigned long sz)
1792{
1793 if (tlb_type == hypervisor) {
1794 switch (sz) {
1795 case 8 * 1024:
1796 default:
1797 return _PAGE_SZ8K_4V;
1798 case 64 * 1024:
1799 return _PAGE_SZ64K_4V;
1800 case 512 * 1024:
1801 return _PAGE_SZ512K_4V;
1802 case 4 * 1024 * 1024:
1803 return _PAGE_SZ4MB_4V;
1804 };
1805 } else {
1806 switch (sz) {
1807 case 8 * 1024:
1808 default:
1809 return _PAGE_SZ8K_4U;
1810 case 64 * 1024:
1811 return _PAGE_SZ64K_4U;
1812 case 512 * 1024:
1813 return _PAGE_SZ512K_4U;
1814 case 4 * 1024 * 1024:
1815 return _PAGE_SZ4MB_4U;
1816 };
1817 }
1818}
1819
1820pte_t mk_pte_io(unsigned long page, pgprot_t prot, int space, unsigned long page_size)
1821{
1822 pte_t pte;
David S. Millercf627152006-02-12 21:10:07 -08001823
1824 pte_val(pte) = page | pgprot_val(pgprot_noncached(prot));
David S. Millerc4bce902006-02-11 21:57:54 -08001825 pte_val(pte) |= (((unsigned long)space) << 32);
1826 pte_val(pte) |= pte_sz_bits(page_size);
David S. Millercf627152006-02-12 21:10:07 -08001827
David S. Millerc4bce902006-02-11 21:57:54 -08001828 return pte;
1829}
1830
David S. Millerc4bce902006-02-11 21:57:54 -08001831static unsigned long kern_large_tte(unsigned long paddr)
1832{
1833 unsigned long val;
1834
1835 val = (_PAGE_VALID | _PAGE_SZ4MB_4U |
1836 _PAGE_CP_4U | _PAGE_CV_4U | _PAGE_P_4U |
1837 _PAGE_EXEC_4U | _PAGE_L_4U | _PAGE_W_4U);
1838 if (tlb_type == hypervisor)
1839 val = (_PAGE_VALID | _PAGE_SZ4MB_4V |
1840 _PAGE_CP_4V | _PAGE_CV_4V | _PAGE_P_4V |
1841 _PAGE_EXEC_4V | _PAGE_W_4V);
1842
1843 return val | paddr;
1844}
1845
David S. Millerc4bce902006-02-11 21:57:54 -08001846/* If not locked, zap it. */
1847void __flush_tlb_all(void)
1848{
1849 unsigned long pstate;
1850 int i;
1851
1852 __asm__ __volatile__("flushw\n\t"
1853 "rdpr %%pstate, %0\n\t"
1854 "wrpr %0, %1, %%pstate"
1855 : "=r" (pstate)
1856 : "i" (PSTATE_IE));
1857 if (tlb_type == spitfire) {
1858 for (i = 0; i < 64; i++) {
1859 /* Spitfire Errata #32 workaround */
1860 /* NOTE: Always runs on spitfire, so no
1861 * cheetah+ page size encodings.
1862 */
1863 __asm__ __volatile__("stxa %0, [%1] %2\n\t"
1864 "flush %%g6"
1865 : /* No outputs */
1866 : "r" (0),
1867 "r" (PRIMARY_CONTEXT), "i" (ASI_DMMU));
1868
1869 if (!(spitfire_get_dtlb_data(i) & _PAGE_L_4U)) {
1870 __asm__ __volatile__("stxa %%g0, [%0] %1\n\t"
1871 "membar #Sync"
1872 : /* no outputs */
1873 : "r" (TLB_TAG_ACCESS), "i" (ASI_DMMU));
1874 spitfire_put_dtlb_data(i, 0x0UL);
1875 }
1876
1877 /* Spitfire Errata #32 workaround */
1878 /* NOTE: Always runs on spitfire, so no
1879 * cheetah+ page size encodings.
1880 */
1881 __asm__ __volatile__("stxa %0, [%1] %2\n\t"
1882 "flush %%g6"
1883 : /* No outputs */
1884 : "r" (0),
1885 "r" (PRIMARY_CONTEXT), "i" (ASI_DMMU));
1886
1887 if (!(spitfire_get_itlb_data(i) & _PAGE_L_4U)) {
1888 __asm__ __volatile__("stxa %%g0, [%0] %1\n\t"
1889 "membar #Sync"
1890 : /* no outputs */
1891 : "r" (TLB_TAG_ACCESS), "i" (ASI_IMMU));
1892 spitfire_put_itlb_data(i, 0x0UL);
1893 }
1894 }
1895 } else if (tlb_type == cheetah || tlb_type == cheetah_plus) {
1896 cheetah_flush_dtlb_all();
1897 cheetah_flush_itlb_all();
1898 }
1899 __asm__ __volatile__("wrpr %0, 0, %%pstate"
1900 : : "r" (pstate));
1901}
David S. Miller88d70792006-03-18 19:16:23 -08001902
1903#ifdef CONFIG_MEMORY_HOTPLUG
1904
1905void online_page(struct page *page)
1906{
1907 ClearPageReserved(page);
Nick Pigginfcab1e52006-03-23 07:48:16 +01001908 init_page_count(page);
1909 __free_page(page);
David S. Miller88d70792006-03-18 19:16:23 -08001910 totalram_pages++;
1911 num_physpages++;
1912}
1913
1914int remove_memory(u64 start, u64 size)
1915{
1916 return -EINVAL;
1917}
1918
1919#endif /* CONFIG_MEMORY_HOTPLUG */