blob: c5e5f07b5f5ea52a06630b6c45a6f2d11c835192 [file] [log] [blame]
Catalin Marinas8ad68bb2005-10-31 14:25:02 +00001/*
2 * linux/arch/arm/mach-realview/realview_eb.c
3 *
4 * Copyright (C) 2004 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000022#include <linux/init.h>
Russell King1be72282005-10-31 16:57:06 +000023#include <linux/platform_device.h>
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000024#include <linux/sysdev.h>
Russell Kinga62c80e2006-01-07 13:52:45 +000025#include <linux/amba/bus.h>
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000026
27#include <asm/hardware.h>
28#include <asm/io.h>
29#include <asm/irq.h>
30#include <asm/leds.h>
31#include <asm/mach-types.h>
32#include <asm/hardware/gic.h>
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000033#include <asm/hardware/icst307.h>
Catalin Marinas7770bdd2007-02-05 14:48:24 +010034#include <asm/hardware/cache-l2x0.h>
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000035
36#include <asm/mach/arch.h>
37#include <asm/mach/map.h>
38#include <asm/mach/mmc.h>
Catalin Marinas8cc4c542008-02-04 17:43:02 +010039#include <asm/mach/time.h>
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000040
Catalin Marinas356cb472008-02-04 17:34:58 +010041#include <asm/arch/board-eb.h>
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000042#include <asm/arch/irqs.h>
43
44#include "core.h"
45#include "clock.h"
46
47static struct map_desc realview_eb_io_desc[] __initdata = {
Russell King1ffedce2005-11-02 14:14:37 +000048 {
49 .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
50 .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
51 .length = SZ_4K,
52 .type = MT_DEVICE,
53 }, {
Catalin Marinas073b6ff2008-04-18 22:43:09 +010054 .virtual = IO_ADDRESS(REALVIEW_EB_GIC_CPU_BASE),
55 .pfn = __phys_to_pfn(REALVIEW_EB_GIC_CPU_BASE),
Russell King1ffedce2005-11-02 14:14:37 +000056 .length = SZ_4K,
57 .type = MT_DEVICE,
58 }, {
Catalin Marinas073b6ff2008-04-18 22:43:09 +010059 .virtual = IO_ADDRESS(REALVIEW_EB_GIC_DIST_BASE),
60 .pfn = __phys_to_pfn(REALVIEW_EB_GIC_DIST_BASE),
Russell King1ffedce2005-11-02 14:14:37 +000061 .length = SZ_4K,
62 .type = MT_DEVICE,
63 }, {
64 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
65 .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
66 .length = SZ_4K,
67 .type = MT_DEVICE,
68 }, {
Catalin Marinas80192732008-04-18 22:43:11 +010069 .virtual = IO_ADDRESS(REALVIEW_EB_TIMER0_1_BASE),
70 .pfn = __phys_to_pfn(REALVIEW_EB_TIMER0_1_BASE),
Russell King1ffedce2005-11-02 14:14:37 +000071 .length = SZ_4K,
72 .type = MT_DEVICE,
73 }, {
Catalin Marinas80192732008-04-18 22:43:11 +010074 .virtual = IO_ADDRESS(REALVIEW_EB_TIMER2_3_BASE),
75 .pfn = __phys_to_pfn(REALVIEW_EB_TIMER2_3_BASE),
Russell King1ffedce2005-11-02 14:14:37 +000076 .length = SZ_4K,
77 .type = MT_DEVICE,
78 },
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000079#ifdef CONFIG_DEBUG_LL
Russell King1ffedce2005-11-02 14:14:37 +000080 {
81 .virtual = IO_ADDRESS(REALVIEW_UART0_BASE),
82 .pfn = __phys_to_pfn(REALVIEW_UART0_BASE),
83 .length = SZ_4K,
84 .type = MT_DEVICE,
85 }
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000086#endif
87};
88
Catalin Marinas7dd19e72008-02-04 17:39:00 +010089static struct map_desc realview_eb11mp_io_desc[] __initdata = {
90 {
91 .virtual = IO_ADDRESS(REALVIEW_EB11MP_GIC_CPU_BASE),
92 .pfn = __phys_to_pfn(REALVIEW_EB11MP_GIC_CPU_BASE),
93 .length = SZ_4K,
94 .type = MT_DEVICE,
95 }, {
96 .virtual = IO_ADDRESS(REALVIEW_EB11MP_GIC_DIST_BASE),
97 .pfn = __phys_to_pfn(REALVIEW_EB11MP_GIC_DIST_BASE),
98 .length = SZ_4K,
99 .type = MT_DEVICE,
100 }, {
101 .virtual = IO_ADDRESS(REALVIEW_EB11MP_L220_BASE),
102 .pfn = __phys_to_pfn(REALVIEW_EB11MP_L220_BASE),
103 .length = SZ_8K,
104 .type = MT_DEVICE,
105 }
106};
107
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000108static void __init realview_eb_map_io(void)
109{
110 iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc));
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100111 if (core_tile_eb11mp())
112 iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc));
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000113}
114
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100115/*
116 * RealView EB AMBA devices
117 */
118
119/*
120 * These devices are connected via the core APB bridge
121 */
122#define GPIO2_IRQ { IRQ_EB_GPIO2, NO_IRQ }
123#define GPIO2_DMA { 0, 0 }
124#define GPIO3_IRQ { IRQ_EB_GPIO3, NO_IRQ }
125#define GPIO3_DMA { 0, 0 }
126
127#define AACI_IRQ { IRQ_EB_AACI, NO_IRQ }
128#define AACI_DMA { 0x80, 0x81 }
129#define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B }
130#define MMCI0_DMA { 0x84, 0 }
131#define KMI0_IRQ { IRQ_EB_KMI0, NO_IRQ }
132#define KMI0_DMA { 0, 0 }
133#define KMI1_IRQ { IRQ_EB_KMI1, NO_IRQ }
134#define KMI1_DMA { 0, 0 }
135
136/*
137 * These devices are connected directly to the multi-layer AHB switch
138 */
139#define SMC_IRQ { NO_IRQ, NO_IRQ }
140#define SMC_DMA { 0, 0 }
141#define MPMC_IRQ { NO_IRQ, NO_IRQ }
142#define MPMC_DMA { 0, 0 }
143#define CLCD_IRQ { IRQ_EB_CLCD, NO_IRQ }
144#define CLCD_DMA { 0, 0 }
145#define DMAC_IRQ { IRQ_EB_DMA, NO_IRQ }
146#define DMAC_DMA { 0, 0 }
147
148/*
149 * These devices are connected via the core APB bridge
150 */
151#define SCTL_IRQ { NO_IRQ, NO_IRQ }
152#define SCTL_DMA { 0, 0 }
153#define WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ }
154#define WATCHDOG_DMA { 0, 0 }
155#define GPIO0_IRQ { IRQ_EB_GPIO0, NO_IRQ }
156#define GPIO0_DMA { 0, 0 }
157#define GPIO1_IRQ { IRQ_EB_GPIO1, NO_IRQ }
158#define GPIO1_DMA { 0, 0 }
159#define RTC_IRQ { IRQ_EB_RTC, NO_IRQ }
160#define RTC_DMA { 0, 0 }
161
162/*
163 * These devices are connected via the DMA APB bridge
164 */
165#define SCI_IRQ { IRQ_EB_SCI, NO_IRQ }
166#define SCI_DMA { 7, 6 }
167#define UART0_IRQ { IRQ_EB_UART0, NO_IRQ }
168#define UART0_DMA { 15, 14 }
169#define UART1_IRQ { IRQ_EB_UART1, NO_IRQ }
170#define UART1_DMA { 13, 12 }
171#define UART2_IRQ { IRQ_EB_UART2, NO_IRQ }
172#define UART2_DMA { 11, 10 }
173#define UART3_IRQ { IRQ_EB_UART3, NO_IRQ }
174#define UART3_DMA { 0x86, 0x87 }
175#define SSP_IRQ { IRQ_EB_SSP, NO_IRQ }
176#define SSP_DMA { 9, 8 }
177
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000178/* FPGA Primecells */
179AMBA_DEVICE(aaci, "fpga:04", AACI, NULL);
180AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &realview_mmc0_plat_data);
181AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL);
182AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL);
183AMBA_DEVICE(uart3, "fpga:09", UART3, NULL);
184
185/* DevChip Primecells */
186AMBA_DEVICE(smc, "dev:00", SMC, NULL);
187AMBA_DEVICE(clcd, "dev:20", CLCD, &clcd_plat_data);
188AMBA_DEVICE(dmac, "dev:30", DMAC, NULL);
189AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL);
190AMBA_DEVICE(wdog, "dev:e1", WATCHDOG, NULL);
191AMBA_DEVICE(gpio0, "dev:e4", GPIO0, NULL);
192AMBA_DEVICE(gpio1, "dev:e5", GPIO1, NULL);
193AMBA_DEVICE(gpio2, "dev:e6", GPIO2, NULL);
194AMBA_DEVICE(rtc, "dev:e8", RTC, NULL);
195AMBA_DEVICE(sci0, "dev:f0", SCI, NULL);
196AMBA_DEVICE(uart0, "dev:f1", UART0, NULL);
197AMBA_DEVICE(uart1, "dev:f2", UART1, NULL);
198AMBA_DEVICE(uart2, "dev:f3", UART2, NULL);
199AMBA_DEVICE(ssp0, "dev:f4", SSP, NULL);
200
201static struct amba_device *amba_devs[] __initdata = {
202 &dmac_device,
203 &uart0_device,
204 &uart1_device,
205 &uart2_device,
206 &uart3_device,
207 &smc_device,
208 &clcd_device,
209 &sctl_device,
210 &wdog_device,
211 &gpio0_device,
212 &gpio1_device,
213 &gpio2_device,
214 &rtc_device,
215 &sci0_device,
216 &ssp0_device,
217 &aaci_device,
218 &mmc0_device,
219 &kmi0_device,
220 &kmi1_device,
221};
222
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100223/*
224 * RealView EB platform devices
225 */
Catalin Marinasa44ddfd2008-04-18 22:43:10 +0100226static struct resource realview_eb_flash_resource = {
227 .start = REALVIEW_EB_FLASH_BASE,
228 .end = REALVIEW_EB_FLASH_BASE + REALVIEW_EB_FLASH_SIZE - 1,
229 .flags = IORESOURCE_MEM,
230};
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100231
Catalin Marinasbe4f3c82008-04-18 22:43:09 +0100232static struct resource realview_eb_eth_resources[] = {
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100233 [0] = {
234 .start = REALVIEW_ETH_BASE,
235 .end = REALVIEW_ETH_BASE + SZ_64K - 1,
236 .flags = IORESOURCE_MEM,
237 },
238 [1] = {
239 .start = IRQ_EB_ETH,
240 .end = IRQ_EB_ETH,
241 .flags = IORESOURCE_IRQ,
242 },
243};
244
Catalin Marinasbe4f3c82008-04-18 22:43:09 +0100245static struct platform_device realview_eb_eth_device = {
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100246 .id = 0,
Catalin Marinasbe4f3c82008-04-18 22:43:09 +0100247 .num_resources = ARRAY_SIZE(realview_eb_eth_resources),
248 .resource = realview_eb_eth_resources,
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100249};
250
Catalin Marinasbe4f3c82008-04-18 22:43:09 +0100251/*
252 * Detect and register the correct Ethernet device. RealView/EB rev D
253 * platforms use the newer SMSC LAN9118 Ethernet chip
254 */
255static int eth_device_register(void)
256{
257 void __iomem *eth_addr = ioremap(REALVIEW_ETH_BASE, SZ_4K);
258 u32 idrev;
259
260 if (!eth_addr)
261 return -ENOMEM;
262
263 idrev = readl(eth_addr + 0x50);
264 if ((idrev & 0xFFFF0000) == 0x01180000)
265 /* SMSC LAN9118 chip present */
266 realview_eb_eth_device.name = "smc911x";
267 else
268 /* SMSC 91C111 chip present */
269 realview_eb_eth_device.name = "smc91x";
270
271 iounmap(eth_addr);
272 return platform_device_register(&realview_eb_eth_device);
273}
274
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000275static void __init gic_init_irq(void)
276{
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100277 if (core_tile_eb11mp()) {
278 unsigned int pldctrl;
279
280 /* new irq mode */
281 writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
282 pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
283 pldctrl |= 0x00800000;
284 writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
285 writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
286
287 /* core tile GIC, primary */
Catalin Marinasc4057f52008-02-04 17:41:01 +0100288 gic_cpu_base_addr = __io_address(REALVIEW_EB11MP_GIC_CPU_BASE);
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100289 gic_dist_init(0, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE), 29);
Catalin Marinasc4057f52008-02-04 17:41:01 +0100290 gic_cpu_init(0, gic_cpu_base_addr);
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100291
Catalin Marinas41579f42008-02-04 17:47:04 +0100292#ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100293 /* board GIC, secondary */
Catalin Marinas073b6ff2008-04-18 22:43:09 +0100294 gic_dist_init(1, __io_address(REALVIEW_EB_GIC_DIST_BASE), 64);
295 gic_cpu_init(1, __io_address(REALVIEW_EB_GIC_CPU_BASE));
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100296 gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1);
Russell King9b1283b2005-11-07 21:01:06 +0000297#endif
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100298 } else {
299 /* board GIC, primary */
Catalin Marinas073b6ff2008-04-18 22:43:09 +0100300 gic_cpu_base_addr = __io_address(REALVIEW_EB_GIC_CPU_BASE);
301 gic_dist_init(0, __io_address(REALVIEW_EB_GIC_DIST_BASE), 29);
Catalin Marinasc4057f52008-02-04 17:41:01 +0100302 gic_cpu_init(0, gic_cpu_base_addr);
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100303 }
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000304}
305
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100306/*
307 * Fix up the IRQ numbers for the RealView EB/ARM11MPCore tile
308 */
309static void realview_eb11mp_fixup(void)
310{
311 /* AMBA devices */
312 dmac_device.irq[0] = IRQ_EB11MP_DMA;
313 uart0_device.irq[0] = IRQ_EB11MP_UART0;
314 uart1_device.irq[0] = IRQ_EB11MP_UART1;
315 uart2_device.irq[0] = IRQ_EB11MP_UART2;
316 uart3_device.irq[0] = IRQ_EB11MP_UART3;
317 clcd_device.irq[0] = IRQ_EB11MP_CLCD;
318 wdog_device.irq[0] = IRQ_EB11MP_WDOG;
319 gpio0_device.irq[0] = IRQ_EB11MP_GPIO0;
320 gpio1_device.irq[0] = IRQ_EB11MP_GPIO1;
321 gpio2_device.irq[0] = IRQ_EB11MP_GPIO2;
322 rtc_device.irq[0] = IRQ_EB11MP_RTC;
323 sci0_device.irq[0] = IRQ_EB11MP_SCI;
324 ssp0_device.irq[0] = IRQ_EB11MP_SSP;
325 aaci_device.irq[0] = IRQ_EB11MP_AACI;
326 mmc0_device.irq[0] = IRQ_EB11MP_MMCI0A;
327 mmc0_device.irq[1] = IRQ_EB11MP_MMCI0B;
328 kmi0_device.irq[0] = IRQ_EB11MP_KMI0;
329 kmi1_device.irq[0] = IRQ_EB11MP_KMI1;
330
331 /* platform devices */
Catalin Marinasbe4f3c82008-04-18 22:43:09 +0100332 realview_eb_eth_resources[1].start = IRQ_EB11MP_ETH;
333 realview_eb_eth_resources[1].end = IRQ_EB11MP_ETH;
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100334}
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100335
Catalin Marinas8cc4c542008-02-04 17:43:02 +0100336static void __init realview_eb_timer_init(void)
337{
338 unsigned int timer_irq;
339
Catalin Marinas80192732008-04-18 22:43:11 +0100340 timer0_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE);
341 timer1_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE) + 0x20;
342 timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE);
343 timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20;
344
Catalin Marinas39e823e2008-02-04 17:45:03 +0100345 if (core_tile_eb11mp()) {
346#ifdef CONFIG_LOCAL_TIMERS
347 twd_base_addr = __io_address(REALVIEW_EB11MP_TWD_BASE);
348 twd_size = REALVIEW_EB11MP_TWD_SIZE;
349#endif
Catalin Marinas8cc4c542008-02-04 17:43:02 +0100350 timer_irq = IRQ_EB11MP_TIMER0_1;
Catalin Marinas39e823e2008-02-04 17:45:03 +0100351 } else
Catalin Marinas8cc4c542008-02-04 17:43:02 +0100352 timer_irq = IRQ_EB_TIMER0_1;
353
354 realview_timer_init(timer_irq);
355}
356
357static struct sys_timer realview_eb_timer = {
358 .init = realview_eb_timer_init,
359};
360
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000361static void __init realview_eb_init(void)
362{
363 int i;
364
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100365 if (core_tile_eb11mp()) {
366 realview_eb11mp_fixup();
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100367
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100368 /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
369 * Bits: .... ...0 0111 1001 0000 .... .... .... */
370 l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff);
371 }
372
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000373 clk_register(&realview_clcd_clk);
374
Catalin Marinasa44ddfd2008-04-18 22:43:10 +0100375 realview_flash_register(&realview_eb_flash_resource, 1);
Russell King6b65cd72006-12-10 21:21:32 +0100376 platform_device_register(&realview_i2c_device);
Catalin Marinasbe4f3c82008-04-18 22:43:09 +0100377 eth_device_register();
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000378
379 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
380 struct amba_device *d = amba_devs[i];
381 amba_device_register(d, &iomem_resource);
382 }
383
384#ifdef CONFIG_LEDS
385 leds_event = realview_leds_event;
386#endif
387}
388
389MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
390 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000391 .phys_io = REALVIEW_UART0_BASE,
392 .io_pg_offst = (IO_ADDRESS(REALVIEW_UART0_BASE) >> 18) & 0xfffc,
393 .boot_params = 0x00000100,
394 .map_io = realview_eb_map_io,
395 .init_irq = gic_init_irq,
Catalin Marinas8cc4c542008-02-04 17:43:02 +0100396 .timer = &realview_eb_timer,
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000397 .init_machine = realview_eb_init,
398MACHINE_END