blob: db40e5d30c965ecf1e8351872aace9a4a03d1297 [file] [log] [blame]
David Collins4614cb92012-08-20 12:17:09 -07001/*
2 * Copyright (c) 2012, Code Aurora Forum. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14/*
15 * This file contains regulator configuration and mappings for targets
16 * consisting of MSM8930 and PM8917.
17 */
18
19#include <linux/regulator/pm8xxx-regulator.h>
20
21#include "board-8930.h"
22
23#define VREG_CONSUMERS(_id) \
24 static struct regulator_consumer_supply vreg_consumers_##_id[]
25
26/*
27 * Consumer specific regulator names:
28 * regulator name consumer dev_name
29 */
30VREG_CONSUMERS(L1) = {
31 REGULATOR_SUPPLY("8917_l1", NULL),
32};
33VREG_CONSUMERS(L2) = {
34 REGULATOR_SUPPLY("8917_l2", NULL),
35 REGULATOR_SUPPLY("iris_vdddig", "wcnss_wlan.0"),
36 REGULATOR_SUPPLY("dsi_vdda", "mipi_dsi.1"),
37 REGULATOR_SUPPLY("mipi_csi_vdd", "msm_csid.0"),
38 REGULATOR_SUPPLY("mipi_csi_vdd", "msm_csid.1"),
39 REGULATOR_SUPPLY("mipi_csi_vdd", "msm_csid.2"),
40};
41VREG_CONSUMERS(L3) = {
42 REGULATOR_SUPPLY("8917_l3", NULL),
43 REGULATOR_SUPPLY("HSUSB_3p3", "msm_otg"),
44};
45VREG_CONSUMERS(L4) = {
46 REGULATOR_SUPPLY("8917_l4", NULL),
47 REGULATOR_SUPPLY("HSUSB_1p8", "msm_otg"),
48 REGULATOR_SUPPLY("iris_vddxo", "wcnss_wlan.0"),
49};
50VREG_CONSUMERS(L5) = {
51 REGULATOR_SUPPLY("8917_l5", NULL),
52 REGULATOR_SUPPLY("sdc_vdd", "msm_sdcc.1"),
53};
54VREG_CONSUMERS(L6) = {
55 REGULATOR_SUPPLY("8917_l6", NULL),
56 REGULATOR_SUPPLY("sdc_vdd", "msm_sdcc.3"),
57};
58VREG_CONSUMERS(L7) = {
59 REGULATOR_SUPPLY("8917_l7", NULL),
60 REGULATOR_SUPPLY("sdc_vdd_io", "msm_sdcc.3"),
61};
62VREG_CONSUMERS(L8) = {
63 REGULATOR_SUPPLY("8917_l8", NULL),
64 REGULATOR_SUPPLY("dsi_vdc", "mipi_dsi.1"),
65};
66VREG_CONSUMERS(L9) = {
67 REGULATOR_SUPPLY("8917_l9", NULL),
68 REGULATOR_SUPPLY("vdd_ana", "3-004a"),
69 REGULATOR_SUPPLY("vdd", "3-0024"),
70 REGULATOR_SUPPLY("vdd", "12-0018"),
71 REGULATOR_SUPPLY("vdd", "12-0068"),
72};
73VREG_CONSUMERS(L10) = {
74 REGULATOR_SUPPLY("8917_l10", NULL),
75 REGULATOR_SUPPLY("iris_vddpa", "wcnss_wlan.0"),
76};
77VREG_CONSUMERS(L11) = {
78 REGULATOR_SUPPLY("8917_l11", NULL),
79 REGULATOR_SUPPLY("cam_vana", "4-001a"),
80 REGULATOR_SUPPLY("cam_vana", "4-006c"),
81 REGULATOR_SUPPLY("cam_vana", "4-0048"),
82 REGULATOR_SUPPLY("cam_vana", "4-0020"),
83};
84VREG_CONSUMERS(L12) = {
85 REGULATOR_SUPPLY("8917_l12", NULL),
86 REGULATOR_SUPPLY("cam_vdig", "4-001a"),
87 REGULATOR_SUPPLY("cam_vdig", "4-006c"),
88 REGULATOR_SUPPLY("cam_vdig", "4-0048"),
89 REGULATOR_SUPPLY("cam_vdig", "4-0020"),
90};
91VREG_CONSUMERS(L14) = {
92 REGULATOR_SUPPLY("8917_l14", NULL),
93 REGULATOR_SUPPLY("pa_therm", "pm8xxx-adc"),
94};
95VREG_CONSUMERS(L15) = {
96 REGULATOR_SUPPLY("8917_l15", NULL),
97};
98VREG_CONSUMERS(L16) = {
99 REGULATOR_SUPPLY("8917_l16", NULL),
100 REGULATOR_SUPPLY("cam_vaf", "4-001a"),
101 REGULATOR_SUPPLY("cam_vaf", "4-006c"),
102 REGULATOR_SUPPLY("cam_vaf", "4-0048"),
103 REGULATOR_SUPPLY("cam_vaf", "4-0020"),
104};
105VREG_CONSUMERS(L17) = {
106 REGULATOR_SUPPLY("8917_l17", NULL),
107};
108VREG_CONSUMERS(L18) = {
109 REGULATOR_SUPPLY("8917_l18", NULL),
110};
111VREG_CONSUMERS(L21) = {
112 REGULATOR_SUPPLY("8917_l21", NULL),
113};
114VREG_CONSUMERS(L22) = {
115 REGULATOR_SUPPLY("8917_l22", NULL),
116};
117VREG_CONSUMERS(L23) = {
118 REGULATOR_SUPPLY("8917_l23", NULL),
119 REGULATOR_SUPPLY("dsi_vddio", "mipi_dsi.1"),
120 REGULATOR_SUPPLY("hdmi_avdd", "hdmi_msm.0"),
121 REGULATOR_SUPPLY("hdmi_vcc", "hdmi_msm.0"),
122 REGULATOR_SUPPLY("pll_vdd", "pil_riva"),
123 REGULATOR_SUPPLY("pll_vdd", "pil_qdsp6v4.1"),
124 REGULATOR_SUPPLY("pll_vdd", "pil_qdsp6v4.2"),
125};
126VREG_CONSUMERS(L24) = {
127 REGULATOR_SUPPLY("8917_l24", NULL),
128 REGULATOR_SUPPLY("riva_vddmx", "wcnss_wlan.0"),
129};
130VREG_CONSUMERS(L25) = {
131 REGULATOR_SUPPLY("8917_l25", NULL),
132 REGULATOR_SUPPLY("VDDD_CDC_D", "sitar-slim"),
133 REGULATOR_SUPPLY("CDC_VDDA_A_1P2V", "sitar-slim"),
134 REGULATOR_SUPPLY("VDDD_CDC_D", "sitar1p1-slim"),
135 REGULATOR_SUPPLY("CDC_VDDA_A_1P2V", "sitar1p1-slim"),
136 REGULATOR_SUPPLY("mhl_avcc12", "0-0039"),
137};
138VREG_CONSUMERS(L26) = {
139 REGULATOR_SUPPLY("8921_l26", NULL),
140 REGULATOR_SUPPLY("core_vdd", "pil_qdsp6v4.0"),
141};
142VREG_CONSUMERS(L27) = {
143 REGULATOR_SUPPLY("8921_l27", NULL),
144 REGULATOR_SUPPLY("core_vdd", "pil_qdsp6v4.2"),
145};
146VREG_CONSUMERS(L28) = {
147 REGULATOR_SUPPLY("8921_l28", NULL),
148 REGULATOR_SUPPLY("core_vdd", "pil_qdsp6v4.1"),
149};
150VREG_CONSUMERS(L29) = {
151 REGULATOR_SUPPLY("8921_l29", NULL),
152};
153VREG_CONSUMERS(L30) = {
154 REGULATOR_SUPPLY("8917_l30", NULL),
155};
156VREG_CONSUMERS(L31) = {
157 REGULATOR_SUPPLY("8917_l31", NULL),
158};
159VREG_CONSUMERS(L32) = {
160 REGULATOR_SUPPLY("8917_l32", NULL),
161};
162VREG_CONSUMERS(L33) = {
163 REGULATOR_SUPPLY("8917_l33", NULL),
164};
165VREG_CONSUMERS(L34) = {
166 REGULATOR_SUPPLY("8917_l34", NULL),
167};
168VREG_CONSUMERS(L35) = {
169 REGULATOR_SUPPLY("8917_l35", NULL),
170};
171VREG_CONSUMERS(L36) = {
172 REGULATOR_SUPPLY("8917_l36", NULL),
173};
174VREG_CONSUMERS(S1) = {
175 REGULATOR_SUPPLY("8917_s1", NULL),
176};
177VREG_CONSUMERS(S2) = {
178 REGULATOR_SUPPLY("8917_s2", NULL),
179 REGULATOR_SUPPLY("iris_vddrfa", "wcnss_wlan.0"),
180};
181VREG_CONSUMERS(S3) = {
182 REGULATOR_SUPPLY("8917_s3", NULL),
183 REGULATOR_SUPPLY("riva_vddcx", "wcnss_wlan.0"),
184};
185VREG_CONSUMERS(S4) = {
186 REGULATOR_SUPPLY("8917_s4", NULL),
187 REGULATOR_SUPPLY("vdd_dig", "3-004a"),
188 REGULATOR_SUPPLY("sdc_vdd_io", "msm_sdcc.1"),
189 REGULATOR_SUPPLY("VDDIO_CDC", "sitar-slim"),
190 REGULATOR_SUPPLY("CDC_VDDA_TX", "sitar-slim"),
191 REGULATOR_SUPPLY("CDC_VDDA_RX", "sitar-slim"),
192 REGULATOR_SUPPLY("VDDIO_CDC", "sitar1p1-slim"),
193 REGULATOR_SUPPLY("CDC_VDDA_TX", "sitar1p1-slim"),
194 REGULATOR_SUPPLY("CDC_VDDA_RX", "sitar1p1-slim"),
195 REGULATOR_SUPPLY("vddp", "0-0048"),
196 REGULATOR_SUPPLY("mhl_iovcc18", "0-0039"),
197 REGULATOR_SUPPLY("CDC_VDD_CP", "sitar-slim"),
198 REGULATOR_SUPPLY("CDC_VDD_CP", "sitar1p1-slim"),
199};
200VREG_CONSUMERS(S5) = {
201 REGULATOR_SUPPLY("8917_s5", NULL),
202 REGULATOR_SUPPLY("krait0", "acpuclk-8627"),
203 REGULATOR_SUPPLY("krait0", "acpuclk-8930"),
204 REGULATOR_SUPPLY("krait0", "acpuclk-8930aa"),
205};
206VREG_CONSUMERS(S6) = {
207 REGULATOR_SUPPLY("8917_s6", NULL),
208 REGULATOR_SUPPLY("krait1", "acpuclk-8627"),
209 REGULATOR_SUPPLY("krait1", "acpuclk-8930"),
210 REGULATOR_SUPPLY("krait1", "acpuclk-8930aa"),
211};
212VREG_CONSUMERS(S7) = {
213 REGULATOR_SUPPLY("8917_s7", NULL),
214};
215VREG_CONSUMERS(S8) = {
216 REGULATOR_SUPPLY("8917_s8", NULL),
217};
218VREG_CONSUMERS(LVS1) = {
219 REGULATOR_SUPPLY("8917_lvs1", NULL),
220 REGULATOR_SUPPLY("iris_vddio", "wcnss_wlan.0"),
221 REGULATOR_SUPPLY("riva_vddpx", "wcnss_wlan.0"),
222};
223VREG_CONSUMERS(LVS3) = {
224 REGULATOR_SUPPLY("8917_lvs3", NULL),
225};
226VREG_CONSUMERS(LVS4) = {
227 REGULATOR_SUPPLY("8917_lvs4", NULL),
228 REGULATOR_SUPPLY("vcc_i2c", "3-004a"),
229 REGULATOR_SUPPLY("vcc_i2c", "3-0024"),
230 REGULATOR_SUPPLY("vcc_i2c", "0-0048"),
231 REGULATOR_SUPPLY("vddio", "12-0018"),
232 REGULATOR_SUPPLY("vlogic", "12-0068"),
233};
234VREG_CONSUMERS(LVS5) = {
235 REGULATOR_SUPPLY("8917_lvs5", NULL),
236 REGULATOR_SUPPLY("cam_vio", "4-001a"),
237 REGULATOR_SUPPLY("cam_vio", "4-006c"),
238 REGULATOR_SUPPLY("cam_vio", "4-0048"),
239 REGULATOR_SUPPLY("cam_vio", "4-0020"),
240};
241VREG_CONSUMERS(LVS6) = {
242 REGULATOR_SUPPLY("8917_lvs6", NULL),
243};
244VREG_CONSUMERS(LVS7) = {
245 REGULATOR_SUPPLY("8917_lvs7", NULL),
246};
247VREG_CONSUMERS(USB_OTG) = {
248 REGULATOR_SUPPLY("8921_usb_otg", NULL),
249 REGULATOR_SUPPLY("vbus_otg", "msm_otg"),
250};
251VREG_CONSUMERS(BOOST) = {
252 REGULATOR_SUPPLY("8917_boost", NULL),
253 REGULATOR_SUPPLY("hdmi_mvs", "hdmi_msm.0"),
254 REGULATOR_SUPPLY("mhl_usb_hs_switch", "msm_otg"),
255};
256VREG_CONSUMERS(VDD_DIG_CORNER) = {
257 REGULATOR_SUPPLY("vdd_dig_corner", NULL),
258 REGULATOR_SUPPLY("hsusb_vdd_dig", "msm_otg"),
259};
260
261
262#define PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, _modes, _ops, \
263 _apply_uV, _pull_down, _always_on, _supply_regulator, \
264 _system_uA, _enable_time, _reg_id) \
265 { \
266 .init_data = { \
267 .constraints = { \
268 .valid_modes_mask = _modes, \
269 .valid_ops_mask = _ops, \
270 .min_uV = _min_uV, \
271 .max_uV = _max_uV, \
272 .input_uV = _max_uV, \
273 .apply_uV = _apply_uV, \
274 .always_on = _always_on, \
275 .name = _name, \
276 }, \
277 .num_consumer_supplies = \
278 ARRAY_SIZE(vreg_consumers_##_id), \
279 .consumer_supplies = vreg_consumers_##_id, \
280 .supply_regulator = _supply_regulator, \
281 }, \
282 .id = _reg_id, \
283 .pull_down_enable = _pull_down, \
284 .system_uA = _system_uA, \
285 .enable_time = _enable_time, \
286 }
287
288#define PM8XXX_LDO(_id, _name, _always_on, _pull_down, _min_uV, _max_uV, \
289 _enable_time, _supply_regulator, _system_uA, _reg_id) \
290 PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \
291 | REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE | \
292 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
293 REGULATOR_CHANGE_DRMS, 0, _pull_down, _always_on, \
294 _supply_regulator, _system_uA, _enable_time, _reg_id)
295
296#define PM8XXX_NLDO1200(_id, _name, _always_on, _pull_down, _min_uV, \
297 _max_uV, _enable_time, _supply_regulator, _system_uA, _reg_id) \
298 PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \
299 | REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE | \
300 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
301 REGULATOR_CHANGE_DRMS, 0, _pull_down, _always_on, \
302 _supply_regulator, _system_uA, _enable_time, _reg_id)
303
304#define PM8XXX_SMPS(_id, _name, _always_on, _pull_down, _min_uV, _max_uV, \
305 _enable_time, _supply_regulator, _system_uA, _reg_id) \
306 PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \
307 | REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE | \
308 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
309 REGULATOR_CHANGE_DRMS, 0, _pull_down, _always_on, \
310 _supply_regulator, _system_uA, _enable_time, _reg_id)
311
312#define PM8XXX_FTSMPS(_id, _name, _always_on, _pull_down, _min_uV, _max_uV, \
313 _enable_time, _supply_regulator, _system_uA, _reg_id) \
314 PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, REGULATOR_MODE_NORMAL, \
315 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS \
316 | REGULATOR_CHANGE_MODE, 0, _pull_down, _always_on, \
317 _supply_regulator, _system_uA, _enable_time, _reg_id)
318
319#define PM8XXX_VS(_id, _name, _always_on, _pull_down, _enable_time, \
320 _supply_regulator, _reg_id) \
321 PM8XXX_VREG_INIT(_id, _name, 0, 0, 0, REGULATOR_CHANGE_STATUS, 0, \
322 _pull_down, _always_on, _supply_regulator, 0, _enable_time, \
323 _reg_id)
324
325#define PM8XXX_VS300(_id, _name, _always_on, _pull_down, _enable_time, \
326 _supply_regulator, _reg_id) \
327 PM8XXX_VREG_INIT(_id, _name, 0, 0, 0, REGULATOR_CHANGE_STATUS, 0, \
328 _pull_down, _always_on, _supply_regulator, 0, _enable_time, \
329 _reg_id)
330
331#define PM8XXX_BOOST(_id, _name, _always_on, _min_uV, _max_uV, _enable_time, \
332 _supply_regulator, _reg_id) \
333 PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, 0, \
334 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, 0, 0, \
335 _always_on, _supply_regulator, 0, _enable_time, _reg_id)
336
337/* Pin control initialization */
338#define PM8XXX_PC(_id, _name, _always_on, _pin_fn, _pin_ctrl, \
339 _supply_regulator, _reg_id) \
340 { \
341 .init_data = { \
342 .constraints = { \
343 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
344 .always_on = _always_on, \
345 .name = _name, \
346 }, \
347 .num_consumer_supplies = \
348 ARRAY_SIZE(vreg_consumers_##_id##_PC), \
349 .consumer_supplies = vreg_consumers_##_id##_PC, \
350 .supply_regulator = _supply_regulator, \
351 }, \
352 .id = _reg_id, \
353 .pin_fn = PM8XXX_VREG_PIN_FN_##_pin_fn, \
354 .pin_ctrl = _pin_ctrl, \
355 }
356
357#define RPM_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, _default_uV, \
358 _peak_uA, _avg_uA, _pull_down, _pin_ctrl, _freq, _pin_fn, \
359 _force_mode, _sleep_set_force_mode, _power_mode, _state, \
360 _sleep_selectable, _always_on, _supply_regulator, _system_uA) \
361 { \
362 .init_data = { \
363 .constraints = { \
364 .valid_modes_mask = _modes, \
365 .valid_ops_mask = _ops, \
366 .min_uV = _min_uV, \
367 .max_uV = _max_uV, \
368 .input_uV = _min_uV, \
369 .apply_uV = _apply_uV, \
370 .always_on = _always_on, \
371 }, \
372 .num_consumer_supplies = \
373 ARRAY_SIZE(vreg_consumers_##_id), \
374 .consumer_supplies = vreg_consumers_##_id, \
375 .supply_regulator = _supply_regulator, \
376 }, \
377 .id = RPM_VREG_ID_PM8917_##_id, \
378 .default_uV = _default_uV, \
379 .peak_uA = _peak_uA, \
380 .avg_uA = _avg_uA, \
381 .pull_down_enable = _pull_down, \
382 .pin_ctrl = _pin_ctrl, \
383 .freq = RPM_VREG_FREQ_##_freq, \
384 .pin_fn = _pin_fn, \
385 .force_mode = _force_mode, \
386 .sleep_set_force_mode = _sleep_set_force_mode, \
387 .power_mode = _power_mode, \
388 .state = _state, \
389 .sleep_selectable = _sleep_selectable, \
390 .system_uA = _system_uA, \
391 }
392
393#define RPM_LDO(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
394 _supply_regulator, _system_uA, _init_peak_uA) \
395 RPM_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \
396 | REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE \
397 | REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE \
398 | REGULATOR_CHANGE_DRMS, 0, _max_uV, _init_peak_uA, 0, _pd, \
399 RPM_VREG_PIN_CTRL_NONE, NONE, RPM_VREG_PIN_FN_8930_NONE, \
400 RPM_VREG_FORCE_MODE_8930_NONE, \
401 RPM_VREG_FORCE_MODE_8930_NONE, RPM_VREG_POWER_MODE_8930_PWM, \
402 RPM_VREG_STATE_OFF, _sleep_selectable, _always_on, \
403 _supply_regulator, _system_uA)
404
405#define RPM_SMPS(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
406 _supply_regulator, _system_uA, _freq, _force_mode, \
407 _sleep_set_force_mode) \
408 RPM_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \
409 | REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE \
410 | REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE \
411 | REGULATOR_CHANGE_DRMS, 0, _min_uV, _system_uA, 0, _pd, \
412 RPM_VREG_PIN_CTRL_NONE, _freq, RPM_VREG_PIN_FN_8930_NONE, \
413 RPM_VREG_FORCE_MODE_8930_##_force_mode, \
414 RPM_VREG_FORCE_MODE_8930_##_sleep_set_force_mode, \
415 RPM_VREG_POWER_MODE_8930_PWM, RPM_VREG_STATE_OFF, \
416 _sleep_selectable, _always_on, _supply_regulator, _system_uA)
417
418#define RPM_VS(_id, _always_on, _pd, _sleep_selectable, _supply_regulator) \
419 RPM_INIT(_id, 0, 0, 0, REGULATOR_CHANGE_STATUS, 0, 0, 1000, 1000, _pd, \
420 RPM_VREG_PIN_CTRL_NONE, NONE, RPM_VREG_PIN_FN_8930_NONE, \
421 RPM_VREG_FORCE_MODE_8930_NONE, \
422 RPM_VREG_FORCE_MODE_8930_NONE, RPM_VREG_POWER_MODE_8930_PWM, \
423 RPM_VREG_STATE_OFF, _sleep_selectable, _always_on, \
424 _supply_regulator, 0)
425
426#define RPM_NCP(_id, _always_on, _sleep_selectable, _min_uV, _max_uV, \
427 _supply_regulator, _freq) \
428 RPM_INIT(_id, _min_uV, _max_uV, 0, REGULATOR_CHANGE_VOLTAGE \
429 | REGULATOR_CHANGE_STATUS, 0, _max_uV, 1000, 1000, 0, \
430 RPM_VREG_PIN_CTRL_NONE, _freq, RPM_VREG_PIN_FN_8930_NONE, \
431 RPM_VREG_FORCE_MODE_8930_NONE, \
432 RPM_VREG_FORCE_MODE_8930_NONE, RPM_VREG_POWER_MODE_8930_PWM, \
433 RPM_VREG_STATE_OFF, _sleep_selectable, _always_on, \
434 _supply_regulator, 0)
435
436#define RPM_CORNER(_id, _always_on, _sleep_selectable, _min_uV, _max_uV, \
437 _supply_regulator) \
438 RPM_INIT(_id, _min_uV, _max_uV, 0, REGULATOR_CHANGE_VOLTAGE \
439 | REGULATOR_CHANGE_STATUS, 0, _max_uV, 0, 0, 0, \
440 RPM_VREG_PIN_CTRL_NONE, NONE, RPM_VREG_PIN_FN_8930_NONE, \
441 RPM_VREG_FORCE_MODE_8930_NONE, \
442 RPM_VREG_FORCE_MODE_8930_NONE, RPM_VREG_POWER_MODE_8930_PWM, \
443 RPM_VREG_STATE_OFF, _sleep_selectable, _always_on, \
444 _supply_regulator, 0)
445
446/* Pin control initialization */
447#define RPM_PC_INIT(_id, _always_on, _pin_fn, _pin_ctrl, _supply_regulator) \
448 { \
449 .init_data = { \
450 .constraints = { \
451 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
452 .always_on = _always_on, \
453 }, \
454 .num_consumer_supplies = \
455 ARRAY_SIZE(vreg_consumers_##_id##_PC), \
456 .consumer_supplies = vreg_consumers_##_id##_PC, \
457 .supply_regulator = _supply_regulator, \
458 }, \
459 .id = RPM_VREG_ID_PM8917_##_id##_PC, \
460 .pin_fn = RPM_VREG_PIN_FN_8930_##_pin_fn, \
461 .pin_ctrl = _pin_ctrl, \
462 }
463
464#define GPIO_VREG(_id, _reg_name, _gpio_label, _gpio, _supply_regulator) \
465 [MSM8930_GPIO_VREG_ID_##_id] = { \
466 .init_data = { \
467 .constraints = { \
468 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
469 }, \
470 .num_consumer_supplies = \
471 ARRAY_SIZE(vreg_consumers_##_id), \
472 .consumer_supplies = vreg_consumers_##_id, \
473 .supply_regulator = _supply_regulator, \
474 }, \
475 .regulator_name = _reg_name, \
476 .gpio_label = _gpio_label, \
477 .gpio = _gpio, \
478 }
479
480#define SAW_VREG_INIT(_id, _name, _min_uV, _max_uV) \
481 { \
482 .constraints = { \
483 .name = _name, \
484 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, \
485 .min_uV = _min_uV, \
486 .max_uV = _max_uV, \
487 }, \
488 .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_##_id), \
489 .consumer_supplies = vreg_consumers_##_id, \
490 }
491
492/* GPIO regulator constraints */
493struct gpio_regulator_platform_data
494msm8930_pm8917_gpio_regulator_pdata[] __devinitdata = {
495 /* ID vreg_name gpio_label gpio supply */
496};
497
498/* SAW regulator constraints */
499struct regulator_init_data msm8930_pm8917_saw_regulator_core0_pdata =
500 /* ID vreg_name min_uV max_uV */
501 SAW_VREG_INIT(S5, "8917_s5", 850000, 1300000);
502struct regulator_init_data msm8930_pm8917_saw_regulator_core1_pdata =
503 SAW_VREG_INIT(S6, "8917_s6", 850000, 1300000);
504
505/* PM8917 regulator constraints */
506struct pm8xxx_regulator_platform_data
507msm8930_pm8917_regulator_pdata[] __devinitdata = {
508 /*
509 * ID name always_on pd min_uV max_uV en_t supply
510 * system_uA reg_ID
511 */
512 PM8XXX_NLDO1200(L26, "8921_l26", 0, 1, 375000, 1050000, 200, "8917_s7",
513 0, 0),
514 PM8XXX_NLDO1200(L27, "8921_l27", 0, 1, 375000, 1050000, 200, "8917_s7",
515 0, 1),
516 PM8XXX_NLDO1200(L28, "8921_l28", 0, 1, 375000, 1050000, 200, "8917_s7",
517 0, 2),
518 PM8XXX_LDO(L29, "8921_l29", 0, 1, 1800000, 1800000, 200, "8917_s8",
519 0, 3),
520 PM8XXX_LDO(L30, "8917_l30", 0, 1, 1800000, 1800000, 200, NULL,
521 0, 4),
522 PM8XXX_LDO(L31, "8917_l31", 0, 1, 1800000, 1800000, 200, NULL,
523 0, 5),
524 PM8XXX_LDO(L32, "8917_l32", 0, 1, 2800000, 2800000, 200, NULL,
525 0, 6),
526 PM8XXX_LDO(L33, "8917_l33", 0, 1, 2800000, 2800000, 200, NULL,
527 0, 7),
528 PM8XXX_LDO(L34, "8917_l34", 0, 1, 1800000, 1800000, 200, NULL,
529 0, 8),
530 PM8XXX_LDO(L35, "8917_l35", 0, 1, 3000000, 3000000, 200, NULL,
531 0, 9),
532 PM8XXX_LDO(L36, "8917_l36", 0, 1, 1800000, 1800000, 200, NULL,
533 0, 10),
534 /*
535 * ID name always_on min_uV max_uV en_t supply reg_ID
536 */
537 PM8XXX_BOOST(BOOST, "8917_boost", 0, 5000000, 5000000, 500, NULL, 11),
538
539 /* ID name always_on pd en_t supply reg_ID */
540 PM8XXX_VS300(USB_OTG, "8921_usb_otg", 0, 1, 0, "8917_boost", 12),
541};
542
543static struct rpm_regulator_init_data
544msm8930_rpm_regulator_init_data[] __devinitdata = {
545 /* ID a_on pd ss min_uV max_uV supply sys_uA freq fm ss_fm */
546 RPM_SMPS(S1, 1, 1, 0, 1300000, 1300000, NULL, 100000, 3p20, NONE, NONE),
547 RPM_SMPS(S2, 0, 1, 0, 1300000, 1300000, NULL, 0, 1p60, NONE, NONE),
548 RPM_SMPS(S3, 0, 1, 1, 500000, 1150000, NULL, 100000, 4p80, AUTO, LPM),
549 RPM_SMPS(S4, 1, 1, 0, 1800000, 1800000, NULL, 100000, 1p60, AUTO, LPM),
550 RPM_SMPS(S7, 0, 1, 0, 1150000, 1150000, NULL, 100000, 3p20, NONE, NONE),
551 RPM_SMPS(S8, 1, 1, 1, 2050000, 2050000, NULL, 100000, 1p60, NONE, NONE),
552
553 /* ID a_on pd ss min_uV max_uV supply sys_uA init_ip */
554 RPM_LDO(L1, 1, 1, 0, 1050000, 1050000, "8917_s4", 0, 10000),
555 RPM_LDO(L2, 0, 1, 0, 1200000, 1200000, "8917_s4", 0, 0),
556 RPM_LDO(L3, 0, 1, 0, 3075000, 3075000, NULL, 0, 0),
557 RPM_LDO(L4, 1, 1, 0, 1800000, 1800000, NULL, 10000, 10000),
558 RPM_LDO(L5, 0, 1, 0, 2950000, 2950000, NULL, 0, 0),
559 RPM_LDO(L6, 0, 1, 0, 2950000, 2950000, NULL, 0, 0),
560 RPM_LDO(L7, 1, 1, 0, 1850000, 2950000, NULL, 10000, 10000),
561 RPM_LDO(L8, 0, 1, 0, 2800000, 2800000, NULL, 0, 0),
562 RPM_LDO(L9, 0, 1, 0, 2850000, 2850000, NULL, 0, 0),
563 RPM_LDO(L10, 0, 1, 0, 2900000, 2900000, NULL, 0, 0),
564 RPM_LDO(L11, 0, 1, 0, 2850000, 2850000, NULL, 0, 0),
565 RPM_LDO(L12, 0, 1, 0, 1200000, 1200000, "8917_s4", 0, 0),
566 RPM_LDO(L14, 0, 1, 0, 1800000, 1800000, NULL, 0, 0),
567 RPM_LDO(L15, 0, 1, 0, 1800000, 2950000, NULL, 0, 0),
568 RPM_LDO(L16, 0, 1, 0, 2850000, 2850000, NULL, 0, 0),
569 RPM_LDO(L17, 0, 1, 0, 1800000, 2950000, NULL, 0, 0),
570 RPM_LDO(L18, 0, 1, 0, 1200000, 1200000, "8917_s4", 0, 0),
571 RPM_LDO(L21, 0, 1, 0, 1900000, 1900000, "8917_s8", 0, 0),
572 RPM_LDO(L22, 0, 1, 0, 2750000, 2750000, NULL, 0, 0),
573 RPM_LDO(L23, 1, 1, 1, 1800000, 1800000, "8917_s8", 10000, 10000),
574 RPM_LDO(L24, 0, 1, 1, 500000, 1150000, "8917_s1", 10000, 10000),
575 RPM_LDO(L25, 1, 1, 0, 1250000, 1250000, "8917_s1", 10000, 10000),
576
577 /* ID a_on pd ss supply */
578 RPM_VS(LVS1, 0, 1, 0, "8917_s4"),
579 RPM_VS(LVS3, 0, 1, 0, "8917_s4"),
580 RPM_VS(LVS4, 0, 1, 0, "8917_s4"),
581 RPM_VS(LVS5, 0, 1, 0, "8917_s4"),
582 RPM_VS(LVS6, 0, 1, 0, "8917_s4"),
583 RPM_VS(LVS7, 0, 1, 0, "8917_s4"),
584
585 /* ID a_on ss min_corner max_corner supply */
586 RPM_CORNER(VDD_DIG_CORNER, 0, 1, RPM_VREG_CORNER_NONE,
587 RPM_VREG_CORNER_HIGH, NULL),
588};
589
590int msm8930_pm8917_regulator_pdata_len __devinitdata =
591 ARRAY_SIZE(msm8930_pm8917_regulator_pdata);
592
593#define RPM_REG_MAP(_id, _sleep_also, _voter, _supply, _dev_name) \
594 { \
595 .vreg_id = RPM_VREG_ID_PM8917_##_id, \
596 .sleep_also = _sleep_also, \
597 .voter = _voter, \
598 .supply = _supply, \
599 .dev_name = _dev_name, \
600 }
601
602static struct rpm_regulator_consumer_mapping
603 msm_rpm_regulator_consumer_mapping[] __devinitdata = {
604 RPM_REG_MAP(L23, 0, 1, "krait0_l23", "acpuclk-8930"),
605 RPM_REG_MAP(S8, 0, 1, "krait0_s8", "acpuclk-8930"),
606 RPM_REG_MAP(L23, 0, 2, "krait1_l23", "acpuclk-8930"),
607 RPM_REG_MAP(S8, 0, 2, "krait1_s8", "acpuclk-8930"),
608 RPM_REG_MAP(L23, 0, 6, "l2_l23", "acpuclk-8930"),
609 RPM_REG_MAP(S8, 0, 6, "l2_s8", "acpuclk-8930"),
610 RPM_REG_MAP(L24, 0, 1, "krait0_mem", "acpuclk-8930"),
611 RPM_REG_MAP(L24, 0, 2, "krait1_mem", "acpuclk-8930"),
612 RPM_REG_MAP(VDD_DIG_CORNER, 0, 1, "krait0_dig", "acpuclk-8930"),
613 RPM_REG_MAP(VDD_DIG_CORNER, 0, 2, "krait1_dig", "acpuclk-8930"),
614
615 RPM_REG_MAP(L23, 0, 1, "krait0_hfpll", "acpuclk-8627"),
616 RPM_REG_MAP(L23, 0, 2, "krait1_hfpll", "acpuclk-8627"),
617 RPM_REG_MAP(L23, 0, 6, "l2_hfpll", "acpuclk-8627"),
618 RPM_REG_MAP(L24, 0, 1, "krait0_mem", "acpuclk-8627"),
619 RPM_REG_MAP(L24, 0, 2, "krait1_mem", "acpuclk-8627"),
620 RPM_REG_MAP(VDD_DIG_CORNER, 0, 1, "krait0_dig", "acpuclk-8627"),
621 RPM_REG_MAP(VDD_DIG_CORNER, 0, 2, "krait1_dig", "acpuclk-8627"),
622
623 RPM_REG_MAP(L23, 0, 1, "krait0_hfpll", "acpuclk-8930aa"),
624 RPM_REG_MAP(L23, 0, 2, "krait1_hfpll", "acpuclk-8930aa"),
625 RPM_REG_MAP(L23, 0, 6, "l2_hfpll", "acpuclk-8930aa"),
626 RPM_REG_MAP(L24, 0, 1, "krait0_mem", "acpuclk-8930aa"),
627 RPM_REG_MAP(L24, 0, 2, "krait1_mem", "acpuclk-8930aa"),
628 RPM_REG_MAP(VDD_DIG_CORNER, 0, 1, "krait0_dig", "acpuclk-8930aa"),
629 RPM_REG_MAP(VDD_DIG_CORNER, 0, 2, "krait1_dig", "acpuclk-8930aa"),
630};
631
632struct rpm_regulator_platform_data
633msm8930_pm8917_rpm_regulator_pdata __devinitdata = {
634 .init_data = msm8930_rpm_regulator_init_data,
635 .num_regulators = ARRAY_SIZE(msm8930_rpm_regulator_init_data),
636 .version = RPM_VREG_VERSION_8930_PM8917,
637 .vreg_id_vdd_mem = RPM_VREG_ID_PM8917_L24,
638 .vreg_id_vdd_dig = RPM_VREG_ID_PM8917_VDD_DIG_CORNER,
639 .consumer_map = msm_rpm_regulator_consumer_mapping,
640 .consumer_map_len = ARRAY_SIZE(msm_rpm_regulator_consumer_mapping),
641};