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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Copyright 2001 MontaVista Software Inc.
3 * Author: MontaVista Software, Inc.
4 * ahennessy@mvista.com
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 *
10 * Copyright (C) 2000-2001 Toshiba Corporation
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 *
17 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
20 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
23 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
24 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * You should have received a copy of the GNU General Public License along
29 * with this program; if not, write to the Free Software Foundation, Inc.,
30 * 675 Mass Ave, Cambridge, MA 02139, USA.
31 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070032#include <linux/init.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070033#include <linux/sched.h>
34#include <linux/types.h>
35#include <linux/interrupt.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070036
37#include <asm/io.h>
38#include <asm/mipsregs.h>
39#include <asm/system.h>
40
Linus Torvalds1da177e2005-04-16 15:20:36 -070041#include <asm/processor.h>
Atsushi Nemoto22b1d702008-07-11 00:31:36 +090042#include <asm/txx9/jmr3927.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070043
44#if JMR3927_IRQ_END > NR_IRQS
45#error JMR3927_IRQ_END > NR_IRQS
46#endif
47
Linus Torvalds1da177e2005-04-16 15:20:36 -070048static unsigned char irc_level[TX3927_NUM_IR] = {
49 5, 5, 5, 5, 5, 5, /* INT[5:0] */
50 7, 7, /* SIO */
51 5, 5, 5, 0, 0, /* DMA, PIO, PCI */
52 6, 6, 6 /* TMR */
53};
54
Linus Torvalds1da177e2005-04-16 15:20:36 -070055/*
56 * CP0_STATUS is a thread's resource (saved/restored on context switch).
Atsushi Nemoto21274352007-03-15 00:58:28 +090057 * So disable_irq/enable_irq MUST handle IOC/IRC registers.
Linus Torvalds1da177e2005-04-16 15:20:36 -070058 */
Atsushi Nemoto21274352007-03-15 00:58:28 +090059static void mask_irq_ioc(unsigned int irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -070060{
61 /* 0: mask */
Atsushi Nemoto21274352007-03-15 00:58:28 +090062 unsigned int irq_nr = irq - JMR3927_IRQ_IOC;
Linus Torvalds1da177e2005-04-16 15:20:36 -070063 unsigned char imask = jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR);
64 unsigned int bit = 1 << irq_nr;
65 jmr3927_ioc_reg_out(imask & ~bit, JMR3927_IOC_INTM_ADDR);
66 /* flush write buffer */
67 (void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR);
68}
Atsushi Nemoto21274352007-03-15 00:58:28 +090069static void unmask_irq_ioc(unsigned int irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -070070{
71 /* 0: mask */
Atsushi Nemoto21274352007-03-15 00:58:28 +090072 unsigned int irq_nr = irq - JMR3927_IRQ_IOC;
Linus Torvalds1da177e2005-04-16 15:20:36 -070073 unsigned char imask = jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR);
74 unsigned int bit = 1 << irq_nr;
75 jmr3927_ioc_reg_out(imask | bit, JMR3927_IOC_INTM_ADDR);
76 /* flush write buffer */
77 (void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR);
78}
79
Ralf Baechle937a8012006-10-07 19:44:33 +010080asmlinkage void plat_irq_dispatch(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -070081{
Atsushi Nemoto21274352007-03-15 00:58:28 +090082 unsigned long cp0_cause = read_c0_cause();
Linus Torvalds1da177e2005-04-16 15:20:36 -070083 int irq;
84
Atsushi Nemoto21274352007-03-15 00:58:28 +090085 if ((cp0_cause & CAUSEF_IP7) == 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -070086 return;
Atsushi Nemoto21274352007-03-15 00:58:28 +090087 irq = (cp0_cause >> CAUSEB_IP2) & 0x0f;
Linus Torvalds1da177e2005-04-16 15:20:36 -070088
Ralf Baechle937a8012006-10-07 19:44:33 +010089 do_IRQ(irq + JMR3927_IRQ_IRC);
Linus Torvalds1da177e2005-04-16 15:20:36 -070090}
91
Ralf Baechle937a8012006-10-07 19:44:33 +010092static irqreturn_t jmr3927_ioc_interrupt(int irq, void *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -070093{
94 unsigned char istat = jmr3927_ioc_reg_in(JMR3927_IOC_INTS2_ADDR);
95 int i;
96
97 for (i = 0; i < JMR3927_NR_IRQ_IOC; i++) {
98 if (istat & (1 << i)) {
99 irq = JMR3927_IRQ_IOC + i;
Ralf Baechle937a8012006-10-07 19:44:33 +0100100 do_IRQ(irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700101 }
102 }
Sergei Shtylylov702a96a2005-11-18 22:20:31 +0300103 return IRQ_HANDLED;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700104}
105
106static struct irqaction ioc_action = {
Thomas Gleixner4e451712007-08-28 09:03:01 +0000107 .handler = jmr3927_ioc_interrupt,
108 .mask = CPU_MASK_NONE,
109 .name = "IOC",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700110};
111
Atsushi Nemoto89d63fe2008-07-11 00:33:08 +0900112#ifdef CONFIG_PCI
Ralf Baechle937a8012006-10-07 19:44:33 +0100113static irqreturn_t jmr3927_pcierr_interrupt(int irq, void *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700114{
115 printk(KERN_WARNING "PCI error interrupt (irq 0x%x).\n", irq);
116 printk(KERN_WARNING "pcistat:%02x, lbstat:%04lx\n",
117 tx3927_pcicptr->pcistat, tx3927_pcicptr->lbstat);
Sergei Shtylylov702a96a2005-11-18 22:20:31 +0300118
119 return IRQ_HANDLED;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700120}
121static struct irqaction pcierr_action = {
Thomas Gleixner4e451712007-08-28 09:03:01 +0000122 .handler = jmr3927_pcierr_interrupt,
123 .mask = CPU_MASK_NONE,
124 .name = "PCI error",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700125};
Atsushi Nemoto89d63fe2008-07-11 00:33:08 +0900126#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700127
Atsushi Nemoto21274352007-03-15 00:58:28 +0900128static void __init jmr3927_irq_init(void);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700129
130void __init arch_init_irq(void)
131{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700132 /* Now, interrupt control disabled, */
133 /* all IRC interrupts are masked, */
134 /* all IRC interrupt mode are Low Active. */
135
Linus Torvalds1da177e2005-04-16 15:20:36 -0700136 /* mask all IOC interrupts */
137 jmr3927_ioc_reg_out(0, JMR3927_IOC_INTM_ADDR);
138 /* setup IOC interrupt mode (SOFT:High Active, Others:Low Active) */
139 jmr3927_ioc_reg_out(JMR3927_IOC_INTF_SOFT, JMR3927_IOC_INTP_ADDR);
140
Linus Torvalds1da177e2005-04-16 15:20:36 -0700141 /* clear PCI Soft interrupts */
142 jmr3927_ioc_reg_out(0, JMR3927_IOC_INTS1_ADDR);
143 /* clear PCI Reset interrupts */
144 jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
145
Atsushi Nemoto21274352007-03-15 00:58:28 +0900146 jmr3927_irq_init();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700147
148 /* setup IOC interrupt 1 (PCI, MODEM) */
149 setup_irq(JMR3927_IRQ_IOCINT, &ioc_action);
150
Linus Torvalds1da177e2005-04-16 15:20:36 -0700151#ifdef CONFIG_PCI
152 setup_irq(JMR3927_IRQ_IRC_PCI, &pcierr_action);
153#endif
154
155 /* enable all CPU interrupt bits. */
156 set_c0_status(ST0_IM); /* IE bit is still 0. */
157}
158
Atsushi Nemoto21274352007-03-15 00:58:28 +0900159static struct irq_chip jmr3927_irq_ioc = {
160 .name = "jmr3927_ioc",
161 .ack = mask_irq_ioc,
162 .mask = mask_irq_ioc,
163 .mask_ack = mask_irq_ioc,
164 .unmask = unmask_irq_ioc,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700165};
166
Atsushi Nemoto21274352007-03-15 00:58:28 +0900167static void __init jmr3927_irq_init(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700168{
169 u32 i;
170
Atsushi Nemotoc87abd72007-08-02 23:36:02 +0900171 txx9_irq_init(TX3927_IRC_REG);
172 for (i = 0; i < TXx9_MAX_IR; i++)
173 txx9_irq_set_pri(i, irc_level[i]);
Atsushi Nemoto21274352007-03-15 00:58:28 +0900174 for (i = JMR3927_IRQ_IOC; i < JMR3927_IRQ_IOC + JMR3927_NR_IRQ_IOC; i++)
175 set_irq_chip_and_handler(i, &jmr3927_irq_ioc, handle_level_irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700176}