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Luciano Coelhof5fc0f82009-08-06 16:25:28 +03001/*
2 * This file is part of wl1271
3 *
4 * Copyright (C) 1998-2009 Texas Instruments. All rights reserved.
5 * Copyright (C) 2008-2009 Nokia Corporation
6 *
7 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
21 * 02110-1301 USA
22 *
23 */
24
25#ifndef __WL1271_H__
26#define __WL1271_H__
27
28#include <linux/mutex.h>
29#include <linux/completion.h>
30#include <linux/spinlock.h>
31#include <linux/list.h>
32#include <linux/bitops.h>
33#include <net/mac80211.h>
34
Juuso Oikarinen2b60100b2009-10-13 12:47:39 +030035#include "wl1271_conf.h"
36
Luciano Coelhof5fc0f82009-08-06 16:25:28 +030037#define DRIVER_NAME "wl1271"
38#define DRIVER_PREFIX DRIVER_NAME ": "
39
40enum {
41 DEBUG_NONE = 0,
42 DEBUG_IRQ = BIT(0),
43 DEBUG_SPI = BIT(1),
44 DEBUG_BOOT = BIT(2),
45 DEBUG_MAILBOX = BIT(3),
46 DEBUG_NETLINK = BIT(4),
47 DEBUG_EVENT = BIT(5),
48 DEBUG_TX = BIT(6),
49 DEBUG_RX = BIT(7),
50 DEBUG_SCAN = BIT(8),
51 DEBUG_CRYPT = BIT(9),
52 DEBUG_PSM = BIT(10),
53 DEBUG_MAC80211 = BIT(11),
54 DEBUG_CMD = BIT(12),
55 DEBUG_ACX = BIT(13),
56 DEBUG_ALL = ~0,
57};
58
59#define DEBUG_LEVEL (DEBUG_NONE)
60
61#define DEBUG_DUMP_LIMIT 1024
62
63#define wl1271_error(fmt, arg...) \
64 printk(KERN_ERR DRIVER_PREFIX "ERROR " fmt "\n", ##arg)
65
66#define wl1271_warning(fmt, arg...) \
67 printk(KERN_WARNING DRIVER_PREFIX "WARNING " fmt "\n", ##arg)
68
69#define wl1271_notice(fmt, arg...) \
70 printk(KERN_INFO DRIVER_PREFIX fmt "\n", ##arg)
71
72#define wl1271_info(fmt, arg...) \
73 printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg)
74
75#define wl1271_debug(level, fmt, arg...) \
76 do { \
77 if (level & DEBUG_LEVEL) \
78 printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg); \
79 } while (0)
80
81#define wl1271_dump(level, prefix, buf, len) \
82 do { \
83 if (level & DEBUG_LEVEL) \
84 print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
85 DUMP_PREFIX_OFFSET, 16, 1, \
86 buf, \
87 min_t(size_t, len, DEBUG_DUMP_LIMIT), \
88 0); \
89 } while (0)
90
91#define wl1271_dump_ascii(level, prefix, buf, len) \
92 do { \
93 if (level & DEBUG_LEVEL) \
94 print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
95 DUMP_PREFIX_OFFSET, 16, 1, \
96 buf, \
97 min_t(size_t, len, DEBUG_DUMP_LIMIT), \
98 true); \
99 } while (0)
100
101#define WL1271_DEFAULT_RX_CONFIG (CFG_UNI_FILTER_EN | \
Juuso Oikarinenc87dec92009-10-08 21:56:31 +0300102 CFG_BSSID_FILTER_EN | \
103 CFG_MC_FILTER_EN)
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300104
105#define WL1271_DEFAULT_RX_FILTER (CFG_RX_RCTS_ACK | CFG_RX_PRSP_EN | \
106 CFG_RX_MGMT_EN | CFG_RX_DATA_EN | \
107 CFG_RX_CTL_EN | CFG_RX_BCN_EN | \
108 CFG_RX_AUTH_EN | CFG_RX_ASSOC_EN)
109
Juuso Oikarinen45b531a2009-10-13 12:47:41 +0300110#define WL1271_DEFAULT_BASIC_RATE_SET (CONF_TX_RATE_MASK_ALL)
Juuso Oikarinend94cd292009-10-08 21:56:25 +0300111
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300112#define WL1271_FW_NAME "wl1271-fw.bin"
113#define WL1271_NVS_NAME "wl1271-nvs.bin"
Luciano Coelho8cf5e8e2009-12-11 15:40:53 +0200114#define WL1271_NVS_LEN 468
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300115
Juuso Oikarinen545f1da2009-10-08 21:56:23 +0300116/*
Teemu Paasikivi1ebec3d2009-10-13 12:47:48 +0300117 * Enable/disable 802.11a support for WL1273
118 */
119#undef WL1271_80211A_ENABLED
120
121/*
Juuso Oikarinen545f1da2009-10-08 21:56:23 +0300122 * FIXME: for the wl1271, a busy word count of 1 here will result in a more
123 * optimal SPI interface. There is some SPI bug however, causing RXS time outs
Juuso Oikarinenc6d5d062009-10-13 12:47:47 +0300124 * with this mode occasionally on boot, so lets have three for now. A value of
125 * three should make sure, that the chipset will always be ready, though this
126 * will impact throughput and latencies slightly.
Juuso Oikarinen545f1da2009-10-08 21:56:23 +0300127 */
Juuso Oikarinenc6d5d062009-10-13 12:47:47 +0300128#define WL1271_BUSY_WORD_CNT 3
Juuso Oikarinen545f1da2009-10-08 21:56:23 +0300129#define WL1271_BUSY_WORD_LEN (WL1271_BUSY_WORD_CNT * sizeof(u32))
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300130
131#define WL1271_ELP_HW_STATE_ASLEEP 0
132#define WL1271_ELP_HW_STATE_IRQ 1
133
Juuso Oikarinend94cd292009-10-08 21:56:25 +0300134#define WL1271_DEFAULT_BEACON_INT 100
135#define WL1271_DEFAULT_DTIM_PERIOD 1
136
Juuso Oikarinenc87dec92009-10-08 21:56:31 +0300137#define ACX_TX_DESCRIPTORS 32
Juuso Oikarinenbe7078c2009-10-08 21:56:26 +0300138
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300139enum wl1271_state {
140 WL1271_STATE_OFF,
141 WL1271_STATE_ON,
142 WL1271_STATE_PLT,
143};
144
145enum wl1271_partition_type {
146 PART_DOWN,
147 PART_WORK,
148 PART_DRPW,
149
150 PART_TABLE_LEN
151};
152
153struct wl1271_partition {
154 u32 size;
155 u32 start;
156};
157
158struct wl1271_partition_set {
159 struct wl1271_partition mem;
160 struct wl1271_partition reg;
Juuso Oikarinen451de972009-10-12 15:08:46 +0300161 struct wl1271_partition mem2;
162 struct wl1271_partition mem3;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300163};
164
165struct wl1271;
166
167/* FIXME: I'm not sure about this structure name */
168struct wl1271_chip {
169 u32 id;
170 char fw_ver[21];
171};
172
173struct wl1271_stats {
174 struct acx_statistics *fw_stats;
175 unsigned long fw_stats_update;
176
177 unsigned int retry_count;
178 unsigned int excessive_retries;
179};
180
181struct wl1271_debugfs {
182 struct dentry *rootdir;
183 struct dentry *fw_statistics;
184
185 struct dentry *tx_internal_desc_overflow;
186
187 struct dentry *rx_out_of_mem;
188 struct dentry *rx_hdr_overflow;
189 struct dentry *rx_hw_stuck;
190 struct dentry *rx_dropped;
191 struct dentry *rx_fcs_err;
192 struct dentry *rx_xfr_hint_trig;
193 struct dentry *rx_path_reset;
194 struct dentry *rx_reset_counter;
195
196 struct dentry *dma_rx_requested;
197 struct dentry *dma_rx_errors;
198 struct dentry *dma_tx_requested;
199 struct dentry *dma_tx_errors;
200
201 struct dentry *isr_cmd_cmplt;
202 struct dentry *isr_fiqs;
203 struct dentry *isr_rx_headers;
204 struct dentry *isr_rx_mem_overflow;
205 struct dentry *isr_rx_rdys;
206 struct dentry *isr_irqs;
207 struct dentry *isr_tx_procs;
208 struct dentry *isr_decrypt_done;
209 struct dentry *isr_dma0_done;
210 struct dentry *isr_dma1_done;
211 struct dentry *isr_tx_exch_complete;
212 struct dentry *isr_commands;
213 struct dentry *isr_rx_procs;
214 struct dentry *isr_hw_pm_mode_changes;
215 struct dentry *isr_host_acknowledges;
216 struct dentry *isr_pci_pm;
217 struct dentry *isr_wakeups;
218 struct dentry *isr_low_rssi;
219
220 struct dentry *wep_addr_key_count;
221 struct dentry *wep_default_key_count;
222 /* skipping wep.reserved */
223 struct dentry *wep_key_not_found;
224 struct dentry *wep_decrypt_fail;
225 struct dentry *wep_packets;
226 struct dentry *wep_interrupt;
227
228 struct dentry *pwr_ps_enter;
229 struct dentry *pwr_elp_enter;
230 struct dentry *pwr_missing_bcns;
231 struct dentry *pwr_wake_on_host;
232 struct dentry *pwr_wake_on_timer_exp;
233 struct dentry *pwr_tx_with_ps;
234 struct dentry *pwr_tx_without_ps;
235 struct dentry *pwr_rcvd_beacons;
236 struct dentry *pwr_power_save_off;
237 struct dentry *pwr_enable_ps;
238 struct dentry *pwr_disable_ps;
239 struct dentry *pwr_fix_tsf_ps;
240 /* skipping cont_miss_bcns_spread for now */
241 struct dentry *pwr_rcvd_awake_beacons;
242
243 struct dentry *mic_rx_pkts;
244 struct dentry *mic_calc_failure;
245
246 struct dentry *aes_encrypt_fail;
247 struct dentry *aes_decrypt_fail;
248 struct dentry *aes_encrypt_packets;
249 struct dentry *aes_decrypt_packets;
250 struct dentry *aes_encrypt_interrupt;
251 struct dentry *aes_decrypt_interrupt;
252
253 struct dentry *event_heart_beat;
254 struct dentry *event_calibration;
255 struct dentry *event_rx_mismatch;
256 struct dentry *event_rx_mem_empty;
257 struct dentry *event_rx_pool;
258 struct dentry *event_oom_late;
259 struct dentry *event_phy_transmit_error;
260 struct dentry *event_tx_stuck;
261
262 struct dentry *ps_pspoll_timeouts;
263 struct dentry *ps_upsd_timeouts;
264 struct dentry *ps_upsd_max_sptime;
265 struct dentry *ps_upsd_max_apturn;
266 struct dentry *ps_pspoll_max_apturn;
267 struct dentry *ps_pspoll_utilization;
268 struct dentry *ps_upsd_utilization;
269
270 struct dentry *rxpipe_rx_prep_beacon_drop;
271 struct dentry *rxpipe_descr_host_int_trig_rx_data;
272 struct dentry *rxpipe_beacon_buffer_thres_host_int_trig_rx_data;
273 struct dentry *rxpipe_missed_beacon_host_int_trig_rx_data;
274 struct dentry *rxpipe_tx_xfr_host_int_trig_rx_data;
275
276 struct dentry *tx_queue_len;
277
278 struct dentry *retry_count;
279 struct dentry *excessive_retries;
Luciano Coelho98b2a682009-12-11 15:40:52 +0200280 struct dentry *gpio_power;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300281};
282
283#define NUM_TX_QUEUES 4
284#define NUM_RX_PKT_DESC 8
285
286/* FW status registers */
287struct wl1271_fw_status {
Luciano Coelhod0f63b22009-10-15 10:33:29 +0300288 __le32 intr;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300289 u8 fw_rx_counter;
290 u8 drv_rx_counter;
291 u8 reserved;
292 u8 tx_results_counter;
Luciano Coelhod0f63b22009-10-15 10:33:29 +0300293 __le32 rx_pkt_descs[NUM_RX_PKT_DESC];
294 __le32 tx_released_blks[NUM_TX_QUEUES];
295 __le32 fw_localtime;
296 __le32 padding[2];
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300297} __attribute__ ((packed));
298
299struct wl1271_rx_mem_pool_addr {
300 u32 addr;
301 u32 addr_extra;
302};
303
Teemu Paasikiviabb0b3b2009-10-13 12:47:50 +0300304struct wl1271_scan {
305 u8 state;
306 u8 ssid[IW_ESSID_MAX_SIZE+1];
307 size_t ssid_len;
308 u8 active;
309 u8 high_prio;
310 u8 probe_requests;
311};
312
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300313struct wl1271 {
314 struct ieee80211_hw *hw;
315 bool mac80211_registered;
316
317 struct spi_device *spi;
318
319 void (*set_power)(bool enable);
320 int irq;
321
322 spinlock_t wl_lock;
323
324 enum wl1271_state state;
325 struct mutex mutex;
326
Juuso Oikarinen451de972009-10-12 15:08:46 +0300327 struct wl1271_partition_set part;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300328
329 struct wl1271_chip chip;
330
331 int cmd_box_addr;
332 int event_box_addr;
333
334 u8 *fw;
335 size_t fw_len;
336 u8 *nvs;
337 size_t nvs_len;
338
339 u8 bssid[ETH_ALEN];
340 u8 mac_addr[ETH_ALEN];
341 u8 bss_type;
342 u8 ssid[IW_ESSID_MAX_SIZE + 1];
343 u8 ssid_len;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300344 int channel;
345
346 struct wl1271_acx_mem_map *target_mem_map;
347
348 /* Accounting for allocated / available TX blocks on HW */
349 u32 tx_blocks_freed[NUM_TX_QUEUES];
350 u32 tx_blocks_available;
351 u8 tx_results_count;
352
353 /* Transmitted TX packets counter for chipset interface */
354 int tx_packets_count;
355
356 /* Time-offset between host and chipset clocks */
357 int time_offset;
358
359 /* Session counter for the chipset */
360 int session_counter;
361
362 /* Frames scheduled for transmission, not handled yet */
363 struct sk_buff_head tx_queue;
364 bool tx_queue_stopped;
365
366 struct work_struct tx_work;
Juuso Oikarinenc87dec92009-10-08 21:56:31 +0300367
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300368 /* Pending TX frames */
Juuso Oikarinenbe7078c2009-10-08 21:56:26 +0300369 struct sk_buff *tx_frames[ACX_TX_DESCRIPTORS];
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300370
Juuso Oikarinenac4e4ce2009-10-08 21:56:19 +0300371 /* Security sequence number counters */
372 u8 tx_security_last_seq;
373 u16 tx_security_seq_16;
374 u32 tx_security_seq_32;
375
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300376 /* FW Rx counter */
377 u32 rx_counter;
378
379 /* Rx memory pool address */
380 struct wl1271_rx_mem_pool_addr rx_mem_pool_addr;
381
382 /* The target interrupt mask */
383 struct work_struct irq_work;
384
385 /* The mbox event mask */
386 u32 event_mask;
387
388 /* Mailbox pointers */
389 u32 mbox_ptr[2];
390
391 /* Are we currently scanning */
392 bool scanning;
Teemu Paasikiviabb0b3b2009-10-13 12:47:50 +0300393 struct wl1271_scan scan;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300394
395 /* Our association ID */
396 u16 aid;
397
Juuso Oikarinend94cd292009-10-08 21:56:25 +0300398 /* currently configured rate set */
399 u32 basic_rate_set;
400
Juuso Oikarinen8a5a37a2009-10-08 21:56:24 +0300401 /* The current band */
402 enum ieee80211_band band;
403
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300404 /* Default key (for WEP) */
405 u32 default_key;
406
407 unsigned int rx_config;
408 unsigned int rx_filter;
409
410 /* is firmware in elp mode */
411 bool elp;
412
413 struct completion *elp_compl;
Juuso Oikarinen37b70a82009-10-08 21:56:21 +0300414 struct delayed_work elp_work;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300415
416 /* we can be in psm, but not in elp, we have to differentiate */
417 bool psm;
418
419 /* PSM mode requested */
420 bool psm_requested;
421
Juuso Oikarinen19ad0712009-11-02 20:22:11 +0200422 /* retry counter for PSM entries */
423 u8 psm_entry_retry;
424
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300425 /* in dBm */
426 int power_level;
427
428 struct wl1271_stats stats;
429 struct wl1271_debugfs debugfs;
430
431 u32 buffer_32;
432 u32 buffer_cmd;
Juuso Oikarinen545f1da2009-10-08 21:56:23 +0300433 u32 buffer_busyword[WL1271_BUSY_WORD_CNT];
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300434
435 struct wl1271_fw_status *fw_status;
436 struct wl1271_tx_hw_res_if *tx_res_if;
Juuso Oikarinenb771eee2009-10-08 21:56:34 +0300437
438 struct ieee80211_vif *vif;
Luciano Coelhod6e19d12009-10-12 15:08:43 +0300439
440 /* Used for a workaround to send disconnect before rejoining */
441 bool joined;
Juuso Oikarinen2b60100b2009-10-13 12:47:39 +0300442
443 /* Current chipset configuration */
444 struct conf_drv_settings conf;
Juuso Oikarinen01c09162009-10-13 12:47:55 +0300445
446 struct list_head list;
Luciano Coelho98b2a682009-12-11 15:40:52 +0200447
448 bool gpio_power;
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300449};
450
451int wl1271_plt_start(struct wl1271 *wl);
452int wl1271_plt_stop(struct wl1271 *wl);
453
454#define JOIN_TIMEOUT 5000 /* 5000 milliseconds to join */
455
456#define SESSION_COUNTER_MAX 7 /* maximum value for the session counter */
457
458#define WL1271_DEFAULT_POWER_LEVEL 0
459
460#define WL1271_TX_QUEUE_MAX_LENGTH 20
461
462/* WL1271 needs a 200ms sleep after power on */
463#define WL1271_POWER_ON_SLEEP 200 /* in miliseconds */
464
Teemu Paasikivi1ebec3d2009-10-13 12:47:48 +0300465static inline bool wl1271_11a_enabled(void)
466{
467#ifdef WL1271_80211A_ENABLED
468 return true;
469#else
470 return false;
471#endif
472}
473
Luciano Coelhof5fc0f82009-08-06 16:25:28 +0300474#endif